Changeset 1b20da0 in mainline for kernel/arch/sparc64/src/sun4u/start.S

Timestamp:

2018-02-28T17:52:03Z (7 years ago)

Author:

Jiří Zárevúcky <zarevucky.jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

3061bc1

Parents:

df6ded8

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:26:03)

git-committer:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:52:03)

Message:

style: Remove trailing whitespace on non-empty lines, in certain file types.

Command used: tools/srepl '\([^[:space:]]\)\s\+$' '\1' -- *.c *.h *.py *.sh *.s *.S *.ag

File:

• kernel/arch/sparc64/src/sun4u/start.S (modified) (12 diffs)

kernel/arch/sparc64/src/sun4u/start.S

@@ -88 +88 @@
         ! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
         sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
-        srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5     
+        srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
 
         /*
@@ -118 +118 @@
         wrpr %g1, %lo(trap_table), %tba
 
-        /* 
+        /*
          * Take over the DMMU by installing locked TTE entry identically
          * mapping the first 4M of memory.
@@ -135 +135 @@
         ! demap context 0
         SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
-        stxa %g0, [%g1] ASI_DMMU_DEMAP                  
+        stxa %g0, [%g1] ASI_DMMU_DEMAP
         membar #Sync
 
@@ -143 +143 @@
         ! write DTLB tag
         SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
-        stxa %g1, [VA_DMMU_TAG_ACCESS] %asi                     
+        stxa %g1, [VA_DMMU_TAG_ACCESS] %asi
         membar #Sync
 
@@ -164 +164 @@
         ! write DTLB data and install the kernel mapping
         SET_TLB_DATA(g1, g2, TTE_L | TTE_W)     ! use non-global mapping
-        stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG            
+        stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG
         membar #Sync
 
@@ -175 +175 @@
         ! write DTLB tag of context 1 (i.e. MEM_CONTEXT_TEMP)
         SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
-        stxa %g1, [VA_DMMU_TAG_ACCESS] %asi                     
+        stxa %g1, [VA_DMMU_TAG_ACCESS] %asi
         membar #Sync
 
         ! write DTLB data and install the kernel mapping in context 1
         SET_TLB_DATA(g1, g2, TTE_W)                     ! use non-global mapping
-        stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG            
+        stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG
         membar #Sync
         
@@ -213 +213 @@
         ! write ITLB data and install the temporary mapping in context 1
         SET_TLB_DATA(g1, g2, 0)                 ! use non-global mapping
-        stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG            
+        stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG
         flush %g5
         
@@ -223 +223 @@
         ! demap context 0
         SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
-        stxa %g0, [%g1] ASI_IMMU_DEMAP                  
+        stxa %g0, [%g1] ASI_IMMU_DEMAP
         flush %g5
         
@@ -234 +234 @@
         ! write ITLB data and install the permanent kernel mapping in context 0
         SET_TLB_DATA(g1, g2, TTE_L)             ! use non-global mapping
-        stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG            
+        stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG
         flush %g5
 
@@ -242 +242 @@
         ! demap context 1
         SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
-        stxa %g0, [%g1] ASI_IMMU_DEMAP                  
+        stxa %g0, [%g1] ASI_IMMU_DEMAP
         flush %g5
         
@@ -406 +406 @@
  */
 
-.align 32 
+.align 32
 /*
  * This label is used by the fast_data_access_MMU_miss trap handler.
@@ -417 +417 @@
  */
 SYMBOL(end_of_identity)
-        .quad -1 
+        .quad -1
 /*
  * This variable is used by the fast_data_access_MMU_miss trap handler.