Changes in kernel/arch/amd64/src/amd64.c [de96d3b:98a935e] in mainline
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kernel/arch/amd64/src/amd64.c
rde96d3b r98a935e 37 37 #include <stdint.h> 38 38 #include <errno.h> 39 #include <mem w.h>39 #include <mem.h> 40 40 #include <interrupt.h> 41 41 #include <console/console.h> … … 60 60 #include <arch/vreg.h> 61 61 #include <arch/kseg.h> 62 #include <arch/mm/pat.h>63 62 #include <genarch/pic/pic_ops.h> 64 63 … … 116 115 /* Disable alignment check */ 117 116 write_cr0(read_cr0() & ~CR0_AM); 118 119 /* Use PCD+PWT bit combination in PTE to mean write-combining mode. */120 if (pat_supported())121 pat_set_mapping(false, true, true, PAT_TYPE_WRITE_COMBINING);122 117 123 118 if (config.cpu_active == 1) {
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