Changes in kernel/arch/amd64/src/amd64.c [2a103b5:de96d3b] in mainline
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kernel/arch/amd64/src/amd64.c
r2a103b5 rde96d3b 37 37 #include <stdint.h> 38 38 #include <errno.h> 39 #include <mem .h>39 #include <memw.h> 40 40 #include <interrupt.h> 41 41 #include <console/console.h> … … 60 60 #include <arch/vreg.h> 61 61 #include <arch/kseg.h> 62 #include <arch/mm/pat.h> 62 63 #include <genarch/pic/pic_ops.h> 63 64 … … 115 116 /* Disable alignment check */ 116 117 write_cr0(read_cr0() & ~CR0_AM); 118 119 /* Use PCD+PWT bit combination in PTE to mean write-combining mode. */ 120 if (pat_supported()) 121 pat_set_mapping(false, true, true, PAT_TYPE_WRITE_COMBINING); 117 122 118 123 if (config.cpu_active == 1) { … … 224 229 ns16550_out_ptr); 225 230 if (ns16550_instance) { 231 ns16550_format_set(ns16550_instance, 38400, 232 LCR_PARITY_NONE | LCR_STOP_BIT_TWO | LCR_WORD_LEN_8); 226 233 #ifdef CONFIG_NS16550 227 234 srln_instance_t *srln_instance = srln_init();
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