Changeset 0187fd0 in mainline
- Timestamp:
- 2005-11-08T17:21:53Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0b5ac364
- Parents:
- 0060b1d
- Files:
-
- 1 added
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/Makefile.inc
r0060b1d r0187fd0 50 50 ifeq ($(CPU),athlon-xp) 51 51 CFLAGS += -march=athlon-xp -mmmx -msse -m3dnow 52 DEFS += -D FENCES=p352 DEFS += -DCONFIG_FENCES_P3 53 53 CONFIG_SMP = n 54 54 CONFIG_HT = n … … 56 56 ifeq ($(CPU),athlon-mp) 57 57 CFLAGS += -march=athlon-mp -mmmx -msse -m3dnow 58 DEFS += -D FENCES=p358 DEFS += -DCONFIG_FENCES_P3 59 59 CONFIG_HT = n 60 60 endif 61 61 ifeq ($(CPU),pentium3) 62 62 CFLAGS += -march=pentium3 -mmmx -msse 63 DEFS += -D FENCES=p363 DEFS += -DCONFIG_FENCES_P3 64 64 CONFIG_HT = n 65 65 endif 66 66 ifeq ($(CPU),prescott) 67 67 CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 -msse3 68 DEFS += -D FENCES=p468 DEFS += -DCONFIG_FENCES_P4 69 69 endif 70 70 ifeq ($(CPU),pentium4) 71 71 CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 72 DEFS += -D FENCES=p472 DEFS += -DCONFIG_FENCES_P4 73 73 endif 74 74 -
arch/ia32/include/barrier.h
r0060b1d r0187fd0 44 44 #define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory") 45 45 46 #if (FENCES == p4)46 #ifdef CONFIG_FENCES_P4 47 47 # define memory_barrier() __asm__ volatile ("mfence\n" ::: "memory") 48 # define read_barrier() __asm__ volatile ("sfence\n" ::: "memory") 49 # define write_barrier() __asm__ volatile ("lfence\n" ::: "memory") 50 #elif (FENCES == p3) 51 # define memory_barrier() __asm__ volatile ("xchgl %%eax,%%eax\n" ::: "memory") 52 # define read_barrier() __asm__ volatile ("sfence\n" ::: "memory") 53 # define write_barrier() __asm__ volatile ("xchgl %%eax,%%eax\n" ::: "memory") 54 #else 55 # error Unsupported FENCES value 48 # define read_barrier() __asm__ volatile ("lfence\n" ::: "memory") 49 # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") 50 #elif CONFIG_FENCES_P3 51 # define memory_barrier() __asm__ volatile ("\n" ::: "memory") 52 # define read_barrier() __asm__ volatile ("\n" ::: "memory") 53 # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") 56 54 #endif 57 55
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