Changeset 02f441c0 in mainline
- Timestamp:
- 2006-02-27T17:10:04Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 30ab05f
- Parents:
- 481c520
- Files:
-
- 2 added
- 7 edited
- 2 moved
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/Makefile.inc
r481c520 r02f441c0 64 64 CONFIG_PAGE_PT = y 65 65 66 ## Compile with i8042 support. 67 # 68 69 CONFIG_I8042 = y 70 66 71 ## Accepted configuration directives 67 72 # … … 85 90 arch/$(ARCH)/src/context.S \ 86 91 arch/$(ARCH)/src/drivers/ega.c \ 87 arch/$(ARCH)/src/drivers/i8042.c \88 92 arch/$(ARCH)/src/drivers/i8254.c \ 89 93 arch/$(ARCH)/src/drivers/i8259.c \ -
arch/amd64/src/amd64.c
r481c520 r02f441c0 34 34 35 35 #include <arch/ega.h> 36 #include < arch/i8042.h>36 #include <genarch/i8042/i8042.h> 37 37 #include <arch/i8254.h> 38 38 #include <arch/i8259.h> … … 149 149 void arch_post_smp_init(void) 150 150 { 151 151 i8042_init(); /* keyboard controller */ 152 152 } 153 153 -
arch/ia32/Makefile.inc
r481c520 r02f441c0 83 83 CONFIG_PAGE_PT = y 84 84 85 ## Compile with i8042 controller support 86 # 87 88 CONFIG_I8042 = y 89 90 85 91 ## Accepted configuration directives 86 92 # … … 119 125 arch/$(ARCH)/src/mm/page.c \ 120 126 arch/$(ARCH)/src/mm/tlb.c \ 121 arch/$(ARCH)/src/drivers/i8042.c \122 127 arch/$(ARCH)/src/drivers/i8254.c \ 123 128 arch/$(ARCH)/src/drivers/i8259.c \ -
arch/ia32/src/ia32.c
r481c520 r02f441c0 35 35 36 36 #include <arch/ega.h> 37 #include < arch/i8042.h>37 #include <genarch/i8042/i8042.h> 38 38 #include <arch/i8254.h> 39 39 #include <arch/i8259.h> -
arch/sparc64/src/console.c
r481c520 r02f441c0 32 32 #include <genarch/fb/fb.h> 33 33 #include <arch/drivers/fb.h> 34 #include <arch/drivers/keyboard.h> 34 35 #include <genarch/ofw/ofw.h> 35 36 #include <console/chardev.h> -
arch/sparc64/src/mm/tlb.c
r481c520 r02f441c0 41 41 #include <arch/asm.h> 42 42 #include <symtab.h> 43 43 44 #include <arch/drivers/fb.h> 45 #include <arch/drivers/keyboard.h> 44 46 45 47 char *context_encoding[] = { … … 123 125 data.v = true; 124 126 data.size = PAGESIZE_4M; 127 data.pfn = fr.pfn; 128 data.l = true; 129 data.cp = 0; 130 data.cv = 0; 131 data.p = true; 132 data.w = true; 133 data.g = true; 134 135 dtlb_data_in_write(data.value); 136 137 /* 138 * Quick hack: map keyboard 139 */ 140 fr.address = KBD_PHYS_ADDRESS; 141 pg.address = KBD_VIRT_ADDRESS; 142 143 tag.value = ASID_KERNEL; 144 tag.vpn = pg.vpn; 145 146 dtlb_tag_access_write(tag.value); 147 148 data.value = 0; 149 data.v = true; 150 data.size = PAGESIZE_8K; 125 151 data.pfn = fr.pfn; 126 152 data.l = true; -
genarch/Makefile.inc
r481c520 r02f441c0 69 69 DEFS += -DCONFIG_FB 70 70 endif 71 72 ## i8042 controller 73 ifeq ($(CONFIG_I8042),y) 74 GENARCH_SOURCES += \ 75 genarch/src/i8042/i8042.c 76 endif -
genarch/include/i8042/i8042.h
r481c520 r02f441c0 30 30 #define __I8042_H__ 31 31 32 #include <arch/types.h>33 34 32 /** Scancodes. */ 35 33 #define SC_ESC 0x01 -
genarch/src/i8042/i8042.c
r481c520 r02f441c0 27 27 */ 28 28 29 #include < arch/i8042.h>30 #include <arch/ i8259.h>29 #include <genarch/i8042/i8042.h> 30 #include <arch/drivers/i8042.h> 31 31 #include <arch/interrupt.h> 32 32 #include <cpu.h> … … 46 46 */ 47 47 48 #define i8042_DATA 0x6049 #define i8042_STATUS 0x6450 #define i8042_BUFFER_FULL_MASK 0x0151 52 48 /** Keyboard commands. */ 53 49 #define KBD_ENABLE 0xf4 … … 72 68 #define i8042_SET_COMMAND 0x60 73 69 #define i8042_COMMAND 0x49 70 71 #define i8042_BUFFER_FULL_MASK 0x01 74 72 #define i8042_WAIT_MASK 0x02 75 73 … … 85 83 #define LOCKED_CAPSLOCK (1<<0) 86 84 87 #define ACTIVE_READ_BUFF_SIZE 16 /*Must be power of 2*/88 89 __u8 active_read_buff[ACTIVE_READ_BUFF_SIZE]={0};85 #define ACTIVE_READ_BUFF_SIZE 16 /* Must be power of 2 */ 86 87 static __u8 active_read_buff[ACTIVE_READ_BUFF_SIZE]; 90 88 91 89 SPINLOCK_INITIALIZE(keylock); /**< keylock protects keyflags and lockflags. */ … … 269 267 { 270 268 exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt); 271 while (i nb(i8042_STATUS)&i8042_WAIT_MASK) {269 while (i8042_status_read() & i8042_WAIT_MASK) { 272 270 /* wait */ 273 271 } 274 outb(i8042_STATUS,i8042_SET_COMMAND);275 while (i nb(i8042_STATUS)&i8042_WAIT_MASK) {272 i8042_command_write(i8042_SET_COMMAND); 273 while (i8042_status_read() & i8042_WAIT_MASK) { 276 274 /* wait */ 277 275 } 278 outb(i8042_DATA,i8042_COMMAND);276 i8042_data_write(i8042_COMMAND); 279 277 280 278 trap_virtual_enable_irqs(1<<IRQ_KBD); … … 293 291 294 292 trap_virtual_eoi(); 295 x = i nb(i8042_DATA);293 x = i8042_data_read(); 296 294 if (x & KEY_RELEASE) 297 295 key_released(x ^ KEY_RELEASE); … … 410 408 { 411 409 static int i=0; 412 i&=(ACTIVE_READ_BUFF_SIZE-1); 413 if(!active_read_buff[i]) 414 { 410 i &= (ACTIVE_READ_BUFF_SIZE-1); 411 if(!active_read_buff[i]) { 415 412 return 0; 416 413 } … … 421 418 { 422 419 static int i=0; 423 active_read_buff[i] =ch;420 active_read_buff[i] = ch; 424 421 i++; 425 i &=(ACTIVE_READ_BUFF_SIZE-1);422 i &= (ACTIVE_READ_BUFF_SIZE-1); 426 423 active_read_buff[i]=0; 427 424 } … … 501 498 char ch; 502 499 503 while(!(ch=active_read_buff_read())) 504 { 500 while(!(ch = active_read_buff_read())) { 505 501 __u8 x; 506 while (!((x=inb(i8042_STATUS))&i8042_BUFFER_FULL_MASK)); 507 x = inb(i8042_DATA); 502 while (!((x=i8042_status_read() & i8042_BUFFER_FULL_MASK))) 503 ; 504 x = i8042_data_read(); 508 505 if (x & KEY_RELEASE) 509 506 key_released(x ^ KEY_RELEASE);
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