Changeset 05ae7081 in mainline for uspace/lib/libc/arch/sparc64/include/syscall.h
- Timestamp:
- 2007-11-16T16:24:05Z (17 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9cc0d7c
- Parents:
- 454889c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/lib/libc/arch/sparc64/include/syscall.h
r454889c r05ae7081 40 40 41 41 static inline sysarg_t 42 __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3, const sysarg_t p4, const syscall_t id) 42 __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3, 43 const sysarg_t p4, const sysarg_t p5, const sysarg_t p6, const syscall_t id) 43 44 { 44 45 register uint64_t a1 asm("o0") = p1; … … 46 47 register uint64_t a3 asm("o2") = p3; 47 48 register uint64_t a4 asm("o3") = p4; 49 register uint64_t a5 asm("o4") = p5; 50 register uint64_t a6 asm("o5") = p6; 48 51 49 52 asm volatile ( 50 "ta % 5\n"53 "ta %7\n" 51 54 : "=r" (a1) 52 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "i" (id) 55 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), 56 "i" (id) 53 57 : "memory" 54 58 );
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