Changeset 070349e in mainline


Ignore:
Timestamp:
2013-08-02T21:11:23Z (12 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
128de64
Parents:
b9eaa00
Message:

armv6+: Make sure pt entries are at least at PoU.

PoU is coherence level for instructions, data, MMU, on uniprocessor systems.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/arm32/include/arch/mm/page_armv6.h

    rb9eaa00 r070349e  
    205205                p->ns = 0;
    206206        }
     207        DCCMVAU_write((uint32_t)p);
    207208}
    208209
    … …  
    255256                        p->access_permission_1 = PTE_AP1_RO;
    256257        }
     258        DCCMVAU_write((uint32_t)p);
    257259}
    258260
    … …  
    265267        write_barrier();
    266268        p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
     269        DCCMVAU_write((uint32_t)p);
    267270}
    268271
    … …  
    272275
    273276        p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE;
     277        DCCMVAU_write((uint32_t)p);
    274278}
    275279
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