Changes in / [0a208110:087768f] in mainline
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HelenOS.config
r0a208110 r087768f 588 588 @ "ganged" Root hub ports are all powered or all off. 589 589 @ "per_port" Powered status of every root hub port is independent. 590 ! [PLATFORM=ia32|PLATFORM=amd64 |PLATFORM=ppc32] OHCI_POWER_SWITCH (choice)590 ! [PLATFORM=ia32|PLATFORM=amd64] OHCI_POWER_SWITCH (choice) 591 591 592 592 % GRUB boot loader architecture -
boot/arch/ppc32/Makefile.inc
r0a208110 r087768f 43 43 44 44 RD_DRVS += \ 45 infrastructure/rootmac \ 46 bus/pci/pciintel \ 47 bus/usb/ohci \ 48 bus/usb/usbflbk \ 49 bus/usb/usbhub \ 50 bus/usb/usbhid \ 51 bus/usb/usbmast \ 52 bus/usb/usbmid \ 53 bus/usb/vhc 45 infrastructure/rootmac 54 46 55 47 SOURCES = \ -
defaults/ppc32/Makefile.config
r0a208110 r087768f 44 44 CONFIG_MOUNT_DATA = n 45 45 46 # OHCI root hub power switch, ganged is enough47 OHCI_POWER_SWITCH = ganged48 -
uspace/Makefile
r0a208110 r087768f 165 165 DIRS += \ 166 166 drv/infrastructure/rootmac \ 167 drv/bus/pci/pciintel \168 167 srv/hw/bus/cuda_adb 169 168 endif -
uspace/drv/bus/pci/pciintel/pci.c
r0a208110 r087768f 38 38 39 39 #include <assert.h> 40 #include <byteorder.h>41 40 #include <stdio.h> 42 41 #include <errno.h> … … 232 231 void *addr = bus->conf_data_port + (reg & 3); 233 232 234 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));233 pio_write_32(bus->conf_addr_port, conf_addr); 235 234 236 235 switch (len) { 237 236 case 1: 238 /* No endianness change for 1 byte */239 237 buf[0] = pio_read_8(addr); 240 238 break; 241 239 case 2: 242 ((uint16_t *) buf)[0] = uint16_t_le2host(pio_read_16(addr));240 ((uint16_t *) buf)[0] = pio_read_16(addr); 243 241 break; 244 242 case 4: 245 ((uint32_t *) buf)[0] = uint32_t_le2host(pio_read_32(addr));243 ((uint32_t *) buf)[0] = pio_read_32(addr); 246 244 break; 247 245 } … … 256 254 fibril_mutex_lock(&bus->conf_mutex); 257 255 258 const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 256 uint32_t conf_addr; 257 conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 259 258 void *addr = bus->conf_data_port + (reg & 3); 260 259 261 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));260 pio_write_32(bus->conf_addr_port, conf_addr); 262 261 263 262 switch (len) { 264 263 case 1: 265 /* No endianness change for 1 byte */266 264 pio_write_8(addr, buf[0]); 267 265 break; 268 266 case 2: 269 pio_write_16(addr, host2uint16_t_le(((uint16_t *) buf)[0]));267 pio_write_16(addr, ((uint16_t *) buf)[0]); 270 268 break; 271 269 case 4: 272 pio_write_32(addr, host2uint32_t_le(((uint32_t *) buf)[0]));270 pio_write_32(addr, ((uint32_t *) buf)[0]); 273 271 break; 274 272 } … … 652 650 got_res = true; 653 651 654 655 assert(hw_resources.count > 1);656 assert(hw_resources.resources[0].type == IO_RANGE);657 assert(hw_resources.resources[0].res.io_range.size >= 4);658 659 assert(hw_resources.resources[1].type == IO_RANGE);660 assert(hw_resources.resources[1].res.io_range.size >= 4);661 662 652 ddf_msg(LVL_DEBUG, "conf_addr = %" PRIx64 ".", 663 653 hw_resources.resources[0].res.io_range.address); 664 ddf_msg(LVL_DEBUG, "data_addr = %" PRIx64 ".", 665 hw_resources.resources[1].res.io_range.address); 654 655 assert(hw_resources.count > 0); 656 assert(hw_resources.resources[0].type == IO_RANGE); 657 assert(hw_resources.resources[0].res.io_range.size == 8); 666 658 667 659 bus->conf_io_addr = 668 660 (uint32_t) hw_resources.resources[0].res.io_range.address; 669 bus->conf_io_data = 670 (uint32_t) hw_resources.resources[1].res.io_range.address; 671 672 if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 4, 661 662 if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 8, 673 663 &bus->conf_addr_port)) { 674 664 ddf_msg(LVL_ERROR, "Failed to enable configuration ports."); … … 676 666 goto fail; 677 667 } 678 if (pio_enable((void *)(uintptr_t)bus->conf_io_data, 4, 679 &bus->conf_data_port)) { 680 ddf_msg(LVL_ERROR, "Failed to enable configuration ports."); 681 rc = EADDRNOTAVAIL; 682 goto fail; 683 } 668 bus->conf_data_port = (char *) bus->conf_addr_port + 4; 684 669 685 670 /* Make the bus device more visible. It has no use yet. */ -
uspace/drv/bus/pci/pciintel/pci.h
r0a208110 r087768f 46 46 ddf_dev_t *dnode; 47 47 uint32_t conf_io_addr; 48 uint32_t conf_io_data;49 48 void *conf_data_port; 50 49 void *conf_addr_port; -
uspace/drv/bus/usb/ohci/endpoint_list.c
r0a208110 r087768f 162 162 qpos = "NOT FIRST"; 163 163 } 164 assert( ed_next(prev_ed) == addr_to_phys(ep->ed));164 assert((prev_ed->next & ED_NEXT_PTR_MASK) == addr_to_phys(ep->ed)); 165 165 prev_ed->next = ep->ed->next; 166 166 /* Make sure ED is updated */ -
uspace/drv/bus/usb/ohci/hc.c
r0a208110 r087768f 111 111 ohci_regs_t *registers = (ohci_regs_t *) regs; 112 112 cmds[0].addr = (void *) ®isters->interrupt_status; 113 cmds[1].value = OHCI_USED_INTERRUPTS;114 113 cmds[3].addr = (void *) ®isters->interrupt_status; 115 114 … … 242 241 switch (ep->transfer_type) { 243 242 case USB_TRANSFER_CONTROL: 244 OHCI_CLR(instance->registers->control, C_CLE);243 instance->registers->control &= ~C_CLE; 245 244 endpoint_list_add_ep(list, ohci_ep); 246 OHCI_WR(instance->registers->control_current, 0);247 OHCI_SET(instance->registers->control, C_CLE);245 instance->registers->control_current = 0; 246 instance->registers->control |= C_CLE; 248 247 break; 249 248 case USB_TRANSFER_BULK: 250 OHCI_CLR(instance->registers->control, C_BLE);249 instance->registers->control &= ~C_BLE; 251 250 endpoint_list_add_ep(list, ohci_ep); 252 OHCI_WR(instance->registers->bulk_current, 0); 253 OHCI_SET(instance->registers->control, C_BLE); 251 instance->registers->control |= C_BLE; 254 252 break; 255 253 case USB_TRANSFER_ISOCHRONOUS: 256 254 case USB_TRANSFER_INTERRUPT: 257 OHCI_CLR(instance->registers->control, C_PLE |C_IE);255 instance->registers->control &= (~C_PLE & ~C_IE); 258 256 endpoint_list_add_ep(list, ohci_ep); 259 OHCI_SET(instance->registers->control, C_PLE | C_IE);257 instance->registers->control |= C_PLE | C_IE; 260 258 break; 261 259 } … … 275 273 switch (ep->transfer_type) { 276 274 case USB_TRANSFER_CONTROL: 277 OHCI_CLR(instance->registers->control, C_CLE);275 instance->registers->control &= ~C_CLE; 278 276 endpoint_list_remove_ep(list, ohci_ep); 279 OHCI_WR(instance->registers->control_current, 0);280 OHCI_SET(instance->registers->control, C_CLE);277 instance->registers->control_current = 0; 278 instance->registers->control |= C_CLE; 281 279 break; 282 280 case USB_TRANSFER_BULK: 283 OHCI_CLR(instance->registers->control, C_BLE);281 instance->registers->control &= ~C_BLE; 284 282 endpoint_list_remove_ep(list, ohci_ep); 285 OHCI_WR(instance->registers->bulk_current, 0); 286 OHCI_SET(instance->registers->control, C_BLE); 283 instance->registers->control |= C_BLE; 287 284 break; 288 285 case USB_TRANSFER_ISOCHRONOUS: 289 286 case USB_TRANSFER_INTERRUPT: 290 OHCI_CLR(instance->registers->control, C_PLE |C_IE);287 instance->registers->control &= (~C_PLE & ~C_IE); 291 288 endpoint_list_remove_ep(list, ohci_ep); 292 OHCI_SET(instance->registers->control, C_PLE | C_IE);289 instance->registers->control |= C_PLE | C_IE; 293 290 break; 294 291 default: … … 311 308 /* Check for root hub communication */ 312 309 if (batch->ep->address == instance->rh.address) { 313 usb_log_debug("OHCI root hub request.\n");314 310 rh_request(&instance->rh, batch); 315 311 return EOK; … … 327 323 { 328 324 case USB_TRANSFER_CONTROL: 329 OHCI_SET(instance->registers->command_status, CS_CLF);325 instance->registers->command_status |= CS_CLF; 330 326 break; 331 327 case USB_TRANSFER_BULK: 332 OHCI_SET(instance->registers->command_status, CS_BLF);328 instance->registers->command_status |= CS_BLF; 333 329 break; 334 330 default: … … 346 342 void hc_interrupt(hc_t *instance, uint32_t status) 347 343 { 348 status = ohci_reg2host(status);349 344 assert(instance); 350 345 if ((status & ~I_SF) == 0) /* ignore sof status */ … … 357 352 fibril_mutex_lock(&instance->guard); 358 353 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca, 359 OHCI_RD(instance->registers->hcca),354 instance->registers->hcca, 360 355 (void *) addr_to_phys(instance->hcca)); 361 356 usb_log_debug2("Periodic current: %#" PRIx32 ".\n", 362 OHCI_RD(instance->registers->periodic_current));357 instance->registers->periodic_current); 363 358 364 359 link_t *current = list_first(&instance->pending_batches); … … 415 410 416 411 usb_log_debug("Requesting OHCI control.\n"); 417 if ( OHCI_RD(instance->registers->revision)& R_LEGACY_FLAG) {412 if (instance->registers->revision & R_LEGACY_FLAG) { 418 413 /* Turn off legacy emulation, it should be enough to zero 419 414 * the lowest bit, but it caused problems. Thus clear all … … 424 419 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET); 425 420 usb_log_debug("OHCI legacy register %p: %x.\n", 426 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));421 ohci_emulation_reg, *ohci_emulation_reg); 427 422 /* Zero everything but A20State */ 428 OHCI_CLR(*ohci_emulation_reg, ~0x100);423 *ohci_emulation_reg &= 0x100; 429 424 usb_log_debug( 430 425 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n", 431 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));426 ohci_emulation_reg, *ohci_emulation_reg); 432 427 } 433 428 434 429 /* Interrupt routing enabled => smm driver is active */ 435 if ( OHCI_RD(instance->registers->control)& C_IR) {430 if (instance->registers->control & C_IR) { 436 431 usb_log_debug("SMM driver: request ownership change.\n"); 437 OHCI_SET(instance->registers->command_status, CS_OCR);432 instance->registers->command_status |= CS_OCR; 438 433 /* Hope that SMM actually knows its stuff or we can hang here */ 439 while ( OHCI_RD(instance->registers->control & C_IR)) {434 while (instance->registers->control & C_IR) { 440 435 async_usleep(1000); 441 436 } … … 445 440 return; 446 441 } 442 447 443 const unsigned hc_status = C_HCFS_GET(instance->registers->control); 448 444 /* Interrupt routing disabled && status != USB_RESET => BIOS active */ … … 453 449 return; 454 450 } 455 /* HC is suspended assert resume for 20ms */451 /* HC is suspended assert resume for 20ms, */ 456 452 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME); 457 453 async_usleep(20000); … … 477 473 478 474 /* Save contents of fm_interval register */ 479 const uint32_t fm_interval = OHCI_RD(instance->registers->fm_interval);475 const uint32_t fm_interval = instance->registers->fm_interval; 480 476 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval); 481 477 … … 483 479 usb_log_debug2("HC reset.\n"); 484 480 size_t time = 0; 485 OHCI_WR(instance->registers->command_status, CS_HCR);486 while ( OHCI_RD(instance->registers->command_status)& CS_HCR) {481 instance->registers->command_status = CS_HCR; 482 while (instance->registers->command_status & CS_HCR) { 487 483 async_usleep(10); 488 484 time += 10; … … 491 487 492 488 /* Restore fm_interval */ 493 OHCI_WR(instance->registers->fm_interval, fm_interval);494 assert(( OHCI_RD(instance->registers->command_status)& CS_HCR) == 0);489 instance->registers->fm_interval = fm_interval; 490 assert((instance->registers->command_status & CS_HCR) == 0); 495 491 496 492 /* hc is now in suspend state */ 497 493 usb_log_debug2("HC should be in suspend state(%x).\n", 498 OHCI_RD(instance->registers->control));494 instance->registers->control); 499 495 500 496 /* Use HCCA */ 501 OHCI_WR(instance->registers->hcca, addr_to_phys(instance->hcca));497 instance->registers->hcca = addr_to_phys(instance->hcca); 502 498 503 499 /* Use queues */ 504 OHCI_WR(instance->registers->bulk_head,505 instance->lists[USB_TRANSFER_BULK].list_head_pa );500 instance->registers->bulk_head = 501 instance->lists[USB_TRANSFER_BULK].list_head_pa; 506 502 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n", 507 503 instance->lists[USB_TRANSFER_BULK].list_head, 508 504 instance->lists[USB_TRANSFER_BULK].list_head_pa); 509 505 510 OHCI_WR(instance->registers->control_head,511 instance->lists[USB_TRANSFER_CONTROL].list_head_pa );506 instance->registers->control_head = 507 instance->lists[USB_TRANSFER_CONTROL].list_head_pa; 512 508 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n", 513 509 instance->lists[USB_TRANSFER_CONTROL].list_head, … … 515 511 516 512 /* Enable queues */ 517 OHCI_SET(instance->registers->control, (C_PLE | C_IE | C_CLE | C_BLE));518 usb_log_debug ("Queues enabled(%x).\n",519 OHCI_RD(instance->registers->control));513 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE); 514 usb_log_debug2("All queues enabled(%x).\n", 515 instance->registers->control); 520 516 521 517 /* Enable interrupts */ 522 OHCI_WR(instance->registers->interrupt_enable, OHCI_USED_INTERRUPTS);523 usb_log_debug ("Enabled interrupts: %x.\n",524 OHCI_RD(instance->registers->interrupt_enable));525 OHCI_WR(instance->registers->interrupt_enable, I_MI);518 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS; 519 usb_log_debug2("Enabled interrupts: %x.\n", 520 instance->registers->interrupt_enable); 521 instance->registers->interrupt_enable = I_MI; 526 522 527 523 /* Set periodic start to 90% */ 528 const uint32_t frame_length = 529 (fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK; 530 OHCI_WR(instance->registers->periodic_start, 531 ((frame_length / 10) * 9) & PS_MASK << PS_SHIFT); 524 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK); 525 instance->registers->periodic_start = (frame_length / 10) * 9; 532 526 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n", 533 OHCI_RD(instance->registers->periodic_start), 534 OHCI_RD(instance->registers->periodic_start), frame_length); 527 instance->registers->periodic_start, 528 instance->registers->periodic_start, frame_length); 529 535 530 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL); 536 531 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n", 537 OHCI_RD(instance->registers->control));532 instance->registers->control); 538 533 } 539 534 /*----------------------------------------------------------------------------*/ … … 596 591 597 592 for (unsigned i = 0; i < 32; ++i) { 598 OHCI_WR(instance->hcca->int_ep[i],599 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa );593 instance->hcca->int_ep[i] = 594 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa; 600 595 } 601 596 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n", -
uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c
r0a208110 r087768f 58 58 /* Mark as dead, used for dummy EDs at the beginning of 59 59 * endpoint lists. */ 60 OHCI_WR(instance->status, ED_STATUS_K_FLAG);60 instance->status = ED_STATUS_K_FLAG; 61 61 return; 62 62 } … … 65 65 66 66 /* Status: address, endpoint nr, direction mask and max packet size. */ 67 OHCI_WR(instance->status,68 ((ep->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT)67 instance->status = 0 68 | ((ep->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT) 69 69 | ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT) 70 70 | ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT) 71 71 | ((ep->max_packet_size & ED_STATUS_MPS_MASK) 72 << ED_STATUS_MPS_SHIFT) );72 << ED_STATUS_MPS_SHIFT); 73 73 74 74 /* Low speed flag */ 75 75 if (ep->speed == USB_SPEED_LOW) 76 OHCI_SET(instance->status, ED_STATUS_S_FLAG);76 instance->status |= ED_STATUS_S_FLAG; 77 77 78 78 /* Isochronous format flag */ 79 79 if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS) 80 OHCI_SET(instance->status, ED_STATUS_F_FLAG);80 instance->status |= ED_STATUS_F_FLAG; 81 81 82 82 /* Set TD to the list */ 83 83 const uintptr_t pa = addr_to_phys(td); 84 OHCI_WR(instance->td_head, pa & ED_TDHEAD_PTR_MASK);85 OHCI_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK);84 instance->td_head = pa & ED_TDHEAD_PTR_MASK; 85 instance->td_tail = pa & ED_TDTAIL_PTR_MASK; 86 86 87 87 /* Set toggle bit */ 88 88 if (ep->toggle) 89 OHCI_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);89 instance->td_head |= ED_TDHEAD_TOGGLE_CARRY; 90 90 91 91 } -
uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.h
r0a208110 r087768f 40 40 #include <usb/host/endpoint.h> 41 41 42 #include "../ohci_regs.h"43 42 #include "../utils/malloc32.h" 44 43 #include "transfer_descriptor.h" … … 117 116 { 118 117 assert(instance); 119 return (OHCI_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG) 120 || (OHCI_RD(instance->status) & ED_STATUS_K_FLAG); 121 } 122 123 static inline void ed_clear_halt(ed_t *instance) 124 { 125 assert(instance); 126 OHCI_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG); 118 return (instance->td_head & ED_TDHEAD_HALTED_FLAG) 119 || (instance->status & ED_STATUS_K_FLAG); 127 120 } 128 121 … … 135 128 { 136 129 assert(instance); 137 return ( OHCI_RD(instance->td_head)& ED_TDHEAD_PTR_MASK)138 != ( OHCI_RD(instance->td_tail)& ED_TDTAIL_PTR_MASK);130 return (instance->td_head & ED_TDHEAD_PTR_MASK) 131 != (instance->td_tail & ED_TDTAIL_PTR_MASK); 139 132 } 140 133 … … 148 141 assert(instance); 149 142 const uintptr_t pa = addr_to_phys(td); 150 OHCI_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK); 151 } 152 153 static inline uint32_t ed_tail_td(const ed_t *instance) 154 { 155 assert(instance); 156 return OHCI_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK; 157 } 158 159 static inline uint32_t ed_head_td(const ed_t *instance) 160 { 161 assert(instance); 162 return OHCI_RD(instance->td_head) & ED_TDHEAD_PTR_MASK; 143 instance->td_tail = pa & ED_TDTAIL_PTR_MASK; 163 144 } 164 145 … … 174 155 const uint32_t pa = addr_to_phys(next); 175 156 assert((pa & ED_NEXT_PTR_MASK) << ED_NEXT_PTR_SHIFT == pa); 176 OHCI_WR(instance->next, pa); 177 } 178 179 static inline uint32_t ed_next(const ed_t *instance) 180 { 181 assert(instance); 182 return OHCI_RD(instance->next) & ED_NEXT_PTR_MASK; 157 instance->next = pa; 183 158 } 184 159 … … 191 166 { 192 167 assert(instance); 193 return ( OHCI_RD(instance->td_head)& ED_TDHEAD_TOGGLE_CARRY) ? 1 : 0;168 return (instance->td_head & ED_TDHEAD_TOGGLE_CARRY) ? 1 : 0; 194 169 } 195 170 … … 203 178 assert(instance); 204 179 if (toggle) { 205 OHCI_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);180 instance->td_head |= ED_TDHEAD_TOGGLE_CARRY; 206 181 } else { 207 182 /* Clear halted flag when reseting toggle TODO: Why? */ 208 OHCI_CLR(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);209 OHCI_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG);183 instance->td_head &= ~ED_TDHEAD_TOGGLE_CARRY; 184 instance->td_head &= ~ED_TDHEAD_HALTED_FLAG; 210 185 } 211 186 } -
uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c
r0a208110 r087768f 33 33 */ 34 34 #include <usb/usb.h> 35 #include <mem.h>36 #include "../utils/malloc32.h"37 35 #include "transfer_descriptor.h" 38 36 … … 60 58 bzero(instance, sizeof(td_t)); 61 59 /* Set PID and Error code */ 62 OHCI_WR(instance->status,63 ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT)64 | ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT) );60 instance->status = 0 61 | ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT) 62 | ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT); 65 63 66 64 if (toggle == 0 || toggle == 1) { 67 65 /* Set explicit toggle bit */ 68 OHCI_SET(instance->status, TD_STATUS_T_USE_TD_FLAG);69 OHCI_SET(instance->status, toggle ? TD_STATUS_T_FLAG : 0);66 instance->status |= TD_STATUS_T_USE_TD_FLAG; 67 instance->status |= toggle ? TD_STATUS_T_FLAG : 0; 70 68 } 71 69 72 70 /* Alow less data on input. */ 73 71 if (dir == USB_DIRECTION_IN) { 74 OHCI_SET(instance->status, TD_STATUS_ROUND_FLAG);72 instance->status |= TD_STATUS_ROUND_FLAG; 75 73 } 76 74 77 75 if (buffer != NULL) { 78 76 assert(size != 0); 79 OHCI_WR(instance->cbp, addr_to_phys(buffer));80 OHCI_WR(instance->be, addr_to_phys(buffer + size - 1));77 instance->cbp = addr_to_phys(buffer); 78 instance->be = addr_to_phys(buffer + size - 1); 81 79 } 82 80 83 OHCI_WR(instance->next, addr_to_phys(next) & TD_NEXT_PTR_MASK);81 instance->next = addr_to_phys(next) & TD_NEXT_PTR_MASK; 84 82 85 83 } -
uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h
r0a208110 r087768f 38 38 #include <stdint.h> 39 39 40 #include "../ ohci_regs.h"40 #include "../utils/malloc32.h" 41 41 #include "completion_codes.h" 42 42 … … 100 100 { 101 101 assert(instance); 102 const int cc = (OHCI_RD(instance->status)103 >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;102 const int cc = 103 (instance->status >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK; 104 104 /* This value is changed on transfer completion, 105 105 * either to CC_NOERROR or and error code. … … 119 119 { 120 120 assert(instance); 121 const int cc = (OHCI_RD(instance->status)122 >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;121 const int cc = 122 (instance->status >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK; 123 123 return cc_to_rc(cc); 124 124 } … … 136 136 return 0; 137 137 /* Buffer end points to the last byte of transfer buffer, so add 1 */ 138 return OHCI_RD(instance->be) - OHCI_RD(instance->cbp)+ 1;138 return instance->be - instance->cbp + 1; 139 139 } 140 140 #endif -
uspace/drv/bus/usb/ohci/ohci_batch.c
r0a208110 r087768f 199 199 ohci_batch->tds[i]->next, ohci_batch->tds[i]->be); 200 200 201 /* If the TD got all its data through, it will report 0 bytes 202 * remain, the sole exception is INPUT with data rounding flag 203 * (short), i.e. every INPUT. Nice thing is that short packets 204 * will correctly report remaining data, thus making 205 * this computation correct (short packets need to be produced 206 * by the last TD) 207 * NOTE: This also works for CONTROL transfer as 208 * the first TD will return 0 remain. 209 * NOTE: Short packets don't break the assumption that 210 * we leave the very last(unused) TD behind. 211 */ 212 ohci_batch->usb_batch->transfered_size 213 -= td_remain_size(ohci_batch->tds[i]); 214 201 215 ohci_batch->usb_batch->error = td_error(ohci_batch->tds[i]); 202 if (ohci_batch->usb_batch->error == EOK) { 203 /* If the TD got all its data through, it will report 204 * 0 bytes remain, the sole exception is INPUT with 205 * data rounding flag (short), i.e. every INPUT. 206 * Nice thing is that short packets will correctly 207 * report remaining data, thus making this computation 208 * correct (short packets need to be produced by the 209 * last TD) 210 * NOTE: This also works for CONTROL transfer as 211 * the first TD will return 0 remain. 212 * NOTE: Short packets don't break the assumption that 213 * we leave the very last(unused) TD behind. 214 */ 215 ohci_batch->usb_batch->transfered_size 216 -= td_remain_size(ohci_batch->tds[i]); 217 } else { 216 if (ohci_batch->usb_batch->error != EOK) { 218 217 usb_log_debug("Batch %p found error TD(%zu):%08x.\n", 219 218 ohci_batch->usb_batch, i, … … 232 231 233 232 /* Check TD assumption */ 234 assert(ed_head_td(ohci_batch->ed) == 235 addr_to_phys(ohci_batch->tds[leave_td])); 236 237 /* Set tail to the same TD */ 233 const uint32_t pa = 234 addr_to_phys(ohci_batch->tds[leave_td]); 235 assert((ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK) 236 == pa); 237 238 238 ed_set_tail_td(ohci_batch->ed, 239 239 ohci_batch->tds[leave_td]); 240 240 241 241 /* Clear possible ED HALT */ 242 ed_clear_halt(ohci_batch->ed);242 ohci_batch->ed->td_head &= ~ED_TDHEAD_HALTED_FLAG; 243 243 break; 244 244 } … … 253 253 254 254 /* Make sure that we are leaving the right TD behind */ 255 assert(addr_to_phys(ohci_ep->td) == ed_head_td(ohci_batch->ed)); 256 assert(addr_to_phys(ohci_ep->td) == ed_tail_td(ohci_batch->ed)); 257 // const uint32_t pa = addr_to_phys(ohci_ep->td); 258 // assert(pa == (ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK)); 259 // assert(pa == (ohci_batch->ed->td_tail & ED_TDTAIL_PTR_MASK)); 255 const uint32_t pa = addr_to_phys(ohci_ep->td); 256 assert(pa == (ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK)); 257 assert(pa == (ohci_batch->ed->td_tail & ED_TDTAIL_PTR_MASK)); 260 258 261 259 return true; -
uspace/drv/bus/usb/ohci/ohci_regs.h
r0a208110 r087768f 35 35 #define DRV_OHCI_OHCI_REGS_H 36 36 #include <sys/types.h> 37 #include <byteorder.h>38 39 40 /* assume OHCI regs are le */41 #define host2ohci_reg(value) host2uint32_t_le(value)42 #define ohci_reg2host(value) uint32_t_le2host(value)43 44 #define OHCI_WR(reg, val) reg = host2uint32_t_le(val)45 #define OHCI_RD(reg) uint32_t_le2host(reg)46 #define OHCI_SET(reg, val) reg |= host2uint32_t_le(val)47 #define OHCI_CLR(reg, val) reg &= host2uint32_t_le(~val)48 49 37 50 38 #define LEGACY_REGS_OFFSET 0x100 … … 54 42 const ioport32_t revision; 55 43 #define R_REVISION_MASK (0x3f) 44 #define R_REVISION_SHIFT (0) 56 45 #define R_LEGACY_FLAG (0x80) 57 46 58 47 ioport32_t control; 59 /* Control-bulk service ratio */48 #define C_CBSR_MASK (0x3) /* Control-bulk service ratio */ 60 49 #define C_CBSR_1_1 (0x0) 61 50 #define C_CBSR_1_2 (0x1) 62 51 #define C_CBSR_1_3 (0x2) 63 52 #define C_CBSR_1_4 (0x3) 64 #define C_CBSR_MASK (0x3) 65 #define C_CBSR_SHIFT 0 53 #define C_CBSR_SHIFT (0) 66 54 67 55 #define C_PLE (1 << 2) /* Periodic list enable */ … … 70 58 #define C_BLE (1 << 5) /* Bulk list enable */ 71 59 72 /* Host controller functional state */60 #define C_HCFS_MASK (0x3) /* Host controller functional state */ 73 61 #define C_HCFS_RESET (0x0) 74 62 #define C_HCFS_RESUME (0x1) 75 63 #define C_HCFS_OPERATIONAL (0x2) 76 64 #define C_HCFS_SUSPEND (0x3) 77 #define C_HCFS_GET(reg) ((OHCI_RD(reg) >> 6) & 0x3) 78 #define C_HCFS_SET(reg, value) \ 65 #define C_HCFS_SHIFT (6) 66 67 #define C_HCFS_GET(reg) \ 68 ((reg >> C_HCFS_SHIFT) & C_HCFS_MASK) 69 #define C_HCFS_SET(reg, hcfs_state) \ 79 70 do { \ 80 uint32_t r = OHCI_RD(reg); \ 81 r &= ~(0x3 << 6); \ 82 r |= (value & 0x3) << 6; \ 83 OHCI_WR(reg, r); \ 71 reg = (reg & ~(C_HCFS_MASK << C_HCFS_SHIFT)) \ 72 | ((hcfs_state & C_HCFS_MASK) << C_HCFS_SHIFT); \ 84 73 } while (0) 85 74 86 #define C_IR (1 << 8) /* Interrupt routing, make sure it's 0 */ 87 #define C_RWC (1 << 9) /* Remote wakeup connected, host specific */ 75 76 #define C_IR (1 << 8) /* Interrupt routing, make sure it's 0 */ 77 #define C_RWC (1 << 9) /* Remote wakeup connected, host specific */ 88 78 #define C_RWE (1 << 10) /* Remote wakeup enable */ 89 79 … … 93 83 #define CS_BLF (1 << 2) /* Bulk list filled */ 94 84 #define CS_OCR (1 << 3) /* Ownership change request */ 95 #if 096 85 #define CS_SOC_MASK (0x3) /* Scheduling overrun count */ 97 86 #define CS_SOC_SHIFT (16) 98 #endif99 87 100 88 /** Interupt enable/disable/status, … … 113 101 #define I_RHSC (1 << 6) /* Root hub status change */ 114 102 #define I_OC (1 << 30) /* Ownership change */ 115 #define I_MI (1 << 31) /* Master interrupt (a ny/all) */103 #define I_MI (1 << 31) /* Master interrupt (all/any interrupts) */ 116 104 117 105 /** HCCA pointer (see hw_struct hcca.h) */ … … 157 145 /** Remaining bit time in frame to start periodic transfers */ 158 146 ioport32_t periodic_start; 159 #define PS_MASK 0x3fff 160 #define PS_SHIFT 0 147 #define PS_PS_MASK (0x3fff) /* bit time when periodic get priority (0x3e67) */ 161 148 162 149 /** Threshold for starting LS transaction */ … … 166 153 /** The first root hub control register */ 167 154 ioport32_t rh_desc_a; 168 /** Number of downstream ports, max 15 */ 169 #define RHDA_NDS_MASK (0xff) 170 /** Power switching mode: 0-global, 1-per port*/ 171 #define RHDA_PSM_FLAG (1 << 8) 172 /** No power switch: 1-power on, 0-use PSM*/ 173 #define RHDA_NPS_FLAG (1 << 9) 174 /** 1-Compound device, must be 0 */ 175 #define RHDA_DT_FLAG (1 << 10) 176 /** Over-current mode: 0-global, 1-per port */ 177 #define RHDA_OCPM_FLAG (1 << 11) 178 /** OC control: 0-use OCPM, 1-OC off */ 179 #define RHDA_NOCP_FLAG (1 << 12) 180 /** Power on to power good time */ 181 #define RHDA_POTPGT_SHIFT 24 155 #define RHDA_NDS_MASK (0xff) /* Number of downstream ports, max 15 */ 156 #define RHDA_NDS_SHIFT (0) 157 #define RHDA_PSM_FLAG (1 << 8) /* Power switching mode: 0-global, 1-per port*/ 158 #define RHDA_NPS_FLAG (1 << 9) /* No power switch: 1-power on, 0-use PSM*/ 159 #define RHDA_DT_FLAG (1 << 10) /* 1-Compound device, must be 0 */ 160 #define RHDA_OCPM_FLAG (1 << 11) /* Over-current mode: 0-global, 1-per port */ 161 #define RHDA_NOCP_FLAG (1 << 12) /* OC control: 0-use OCPM, 1-OC off */ 162 #define RHDA_POTPGT_MASK (0xff) /* Power on to power good time */ 163 #define RHDA_POTPGT_SHIFT (24) 182 164 183 165 /** The other root hub control register */ 184 166 ioport32_t rh_desc_b; 185 /** Device removable mask */ 186 #define RHDB_DR_SHIFT 0 187 #define RHDB_DR_MASK 0xffff 188 /** Power control mask */ 189 #define RHDB_PCC_MASK (0xffff) 190 #define RHDB_PCC_SHIFT 16 167 #define RHDB_DR_MASK (0xffff) /* Device removable mask */ 168 #define RHDB_DR_SHIFT (0) 169 #define RHDB_PCC_MASK (0xffff) /* Power control mask */ 170 #define RHDB_PCC_SHIFT (16) 171 172 /* Port device removable status */ 173 #define RHDB_DR_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 174 /* Port power control status: 1-per port power control, 0-global power switch */ 175 #define RHDB_PPC_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 191 176 192 177 /** Root hub status register */ 193 178 ioport32_t rh_status; 194 /* read: 0, 195 * write: 0-no effect, 196 * 1-turn off port power for ports 197 * specified in PPCM(RHDB), or all ports, 198 * if power is set globally */ 199 #define RHS_LPS_FLAG (1 << 0) 179 #define RHS_LPS_FLAG (1 << 0)/* read: 0, 180 * write: 0-no effect, 181 * 1-turn off port power for ports 182 * specified in PPCM(RHDB), or all ports, 183 * if power is set globally */ 200 184 #define RHS_CLEAR_GLOBAL_POWER RHS_LPS_FLAG /* synonym for the above */ 201 /** Over-current indicator, if per-port: 0 */ 202 #define RHS_OCI_FLAG (1 << 1) 203 204 /* read: 0-connect status change does not wake HC 205 * 1-connect status change wakes HC 206 * write: 1-set DRWE, 0-no effect */ 207 #define RHS_DRWE_FLAG (1 << 15) 185 #define RHS_OCI_FLAG (1 << 1)/* Over-current indicator, if per-port: 0 */ 186 #define RHS_DRWE_FLAG (1 << 15)/* read: 0-connect status change does not wake HC 187 * 1-connect status change wakes HC 188 * write: 1-set DRWE, 0-no effect */ 208 189 #define RHS_SET_DRWE RHS_DRWE_FLAG 209 /* read: 0, 210 * write: 0-no effect 211 * 1-turn on port power for ports 212 * specified in PPCM(RHDB), or all ports, 213 * if power is set globally */ 214 #define RHS_LPSC_FLAG (1 << 16) 190 #define RHS_LPSC_FLAG (1 << 16)/* read: 0, 191 * write: 0-no effect 192 * 1-turn on port power for ports 193 * specified in PPCM(RHDB), or all ports, 194 * if power is set globally */ 215 195 #define RHS_SET_GLOBAL_POWER RHS_LPSC_FLAG /* synonym for the above */ 216 /** Over-current change indicator*/ 217 #define RHS_OCIC_FLAG (1 << 17) 196 #define RHS_OCIC_FLAG (1 << 17)/* Over-current indicator change */ 218 197 #define RHS_CLEAR_DRWE (1 << 31) 219 198 … … 221 200 ioport32_t rh_port_status[]; 222 201 #define RHPS_CCS_FLAG (1 << 0) /* r: current connect status, 223 * w: 1-clear port enable, 0-N/S*/202 * w: 1-clear port enable, 0-nothing */ 224 203 #define RHPS_CLEAR_PORT_ENABLE RHPS_CCS_FLAG 225 204 #define RHPS_PES_FLAG (1 << 1) /* r: port enable status 226 * w: 1-set port enable, 0-N/S*/205 * w: 1-set port enable, 0-nothing */ 227 206 #define RHPS_SET_PORT_ENABLE RHPS_PES_FLAG 228 207 #define RHPS_PSS_FLAG (1 << 2) /* r: port suspend status 229 * w: 1-set port suspend, 0-N/S*/208 * w: 1-set port suspend, 0-nothing */ 230 209 #define RHPS_SET_PORT_SUSPEND RHPS_PSS_FLAG 231 #define RHPS_POCI_FLAG (1 << 3) /* r: port over-current 232 * (if reports are per-port 233 * w: 1-clear port suspend 234 * (start resume if suspened) 235 * 0-nothing */ 210 #define RHPS_POCI_FLAG (1 << 3) /* r: port over-current (if reports are per-port 211 * w: 1-clear port suspend (start resume 212 * if suspened) 213 * 0-nothing */ 236 214 #define RHPS_CLEAR_PORT_SUSPEND RHPS_POCI_FLAG 237 215 #define RHPS_PRS_FLAG (1 << 4) /* r: port reset status 238 * w: 1-set port reset, 0-N/S*/216 * w: 1-set port reset, 0-nothing */ 239 217 #define RHPS_SET_PORT_RESET RHPS_PRS_FLAG 240 218 #define RHPS_PPS_FLAG (1 << 8) /* r: port power status 241 * w: 1-set port power, 0-N/S*/219 * w: 1-set port power, 0-nothing */ 242 220 #define RHPS_SET_PORT_POWER RHPS_PPS_FLAG 243 221 #define RHPS_LSDA_FLAG (1 << 9) /* r: low speed device attached 244 * w: 1-clear port power, 0-N/S*/222 * w: 1-clear port power, 0-nothing */ 245 223 #define RHPS_CLEAR_PORT_POWER RHPS_LSDA_FLAG 246 #define RHPS_CSC_FLAG (1 << 16) /* connect status change W C*/224 #define RHPS_CSC_FLAG (1 << 16) /* connect status change Write-Clean */ 247 225 #define RHPS_PESC_FLAG (1 << 17) /* port enable status change WC */ 248 226 #define RHPS_PSSC_FLAG (1 << 18) /* port suspend status change WC */ 249 227 #define RHPS_OCIC_FLAG (1 << 19) /* port over-current change WC */ 250 228 #define RHPS_PRSC_FLAG (1 << 20) /* port reset status change WC */ 251 #define RHPS_CHANGE_WC_MASK (0x1f0000)229 #define RHPS_CHANGE_WC_MASK 0x1f0000 252 230 } __attribute__((packed)) ohci_regs_t; 253 231 #endif -
uspace/drv/bus/usb/ohci/root_hub.c
r0a208110 r087768f 33 33 */ 34 34 #include <assert.h> 35 #include <byteorder.h>36 35 #include <errno.h> 37 36 #include <str_error.h> 38 37 #include <fibril_synch.h> 39 38 40 #include <usb/usb.h>41 39 #include <usb/debug.h> 42 40 #include <usb/dev/request.h> 43 41 #include <usb/classes/hub.h> 44 42 43 #include "root_hub.h" 45 44 #include <usb/classes/classes.h> 46 45 #include <usb/classes/hub.h> 47 46 #include <usb/dev/driver.h> 48 47 #include "ohci_regs.h" 49 #include "root_hub.h"50 48 51 49 /** … … 124 122 { 125 123 assert(request); 126 usb_log_debug("Sending interrupt vector(%zu) %hhx:%hhx.\n",127 size, ((uint8_t*)&mask)[0], ((uint8_t*)&mask)[1]);128 124 usb_transfer_batch_finish_error(request, &mask, size, EOK); 129 125 usb_transfer_batch_destroy(request); … … 154 150 155 151 instance->registers = regs; 156 instance->port_count = OHCI_RD(regs->rh_desc_a) & RHDA_NDS_MASK;157 usb_log_debug2("rh_desc_a: %x.\n", OHCI_RD(regs->rh_desc_a));152 instance->port_count = 153 (instance->registers->rh_desc_a >> RHDA_NDS_SHIFT) & RHDA_NDS_MASK; 158 154 if (instance->port_count > 15) { 159 155 usb_log_warning("OHCI specification does not allow more than 15" … … 167 163 168 164 #if defined OHCI_POWER_SWITCH_no 169 usb_log_debug("OHCI rh: Set power mode to no power switching.\n");170 165 /* Set port power mode to no power-switching. (always on) */ 171 OHCI_SET(regs->rh_desc_a, RHDA_NPS_FLAG);166 instance->registers->rh_desc_a |= RHDA_NPS_FLAG; 172 167 173 168 /* Set to no over-current reporting */ 174 OHCI_SET(regs->rh_desc_a, RHDA_NOCP_FLAG);169 instance->registers->rh_desc_a |= RHDA_NOCP_FLAG; 175 170 176 171 #elif defined OHCI_POWER_SWITCH_ganged 177 usb_log_debug("OHCI rh: Set power mode to ganged power switching.\n"); 178 /* Set port power mode to ganged power-switching. */ 179 OHCI_CLR(regs->rh_desc_a, RHDA_NPS_FLAG); 180 OHCI_CLR(regs->rh_desc_a, RHDA_PSM_FLAG); 181 182 /* Turn off power (hub driver will turn this back on)*/ 183 OHCI_WR(regs->rh_status, RHS_CLEAR_GLOBAL_POWER); 172 /* Set port power mode to no ganged power-switching. */ 173 instance->registers->rh_desc_a &= ~RHDA_NPS_FLAG; 174 instance->registers->rh_desc_a &= ~RHDA_PSM_FLAG; 175 instance->registers->rh_status = RHS_CLEAR_GLOBAL_POWER; 184 176 185 177 /* Set to global over-current */ 186 OHCI_CLR(regs->rh_desc_a, RHDA_NOCP_FLAG);187 OHCI_CLR(regs->rh_desc_a, RHDA_OCPM_FLAG);178 instance->registers->rh_desc_a &= ~RHDA_NOCP_FLAG; 179 instance->registers->rh_desc_a &= ~RHDA_OCPM_FLAG; 188 180 #else 189 usb_log_debug("OHCI rh: Set power mode to per-port power switching.\n"); 190 /* Set port power mode to per port power-switching. */ 191 OHCI_CLR(regs->rh_desc_a, RHDA_NPS_FLAG); 192 OHCI_SET(regs->rh_desc_a, RHDA_PSM_FLAG); 181 /* Set port power mode to no per port power-switching. */ 182 instance->registers->rh_desc_a &= ~RHDA_NPS_FLAG; 183 instance->registers->rh_desc_a |= RHDA_PSM_FLAG; 193 184 194 185 /* Control all ports by global switch and turn them off */ 195 OHCI_CLR(regs->rh_desc_b,RHDB_PCC_MASK << RHDB_PCC_SHIFT);196 OHCI_WR(regs->rh_status, RHS_CLEAR_GLOBAL_POWER);186 instance->registers->rh_desc_b &= (RHDB_PCC_MASK << RHDB_PCC_SHIFT); 187 instance->registers->rh_status = RHS_CLEAR_GLOBAL_POWER; 197 188 198 189 /* Return control to per port state */ 199 OHCI_SET(regs->rh_desc_b, RHDB_PCC_MASK << RHDB_PCC_SHIFT); 190 instance->registers->rh_desc_b |= 191 ((1 << (instance->port_count + 1)) - 1) << RHDB_PCC_SHIFT; 200 192 201 193 /* Set per port over-current */ 202 OHCI_CLR(regs->rh_desc_a, RHDA_NOCP_FLAG);203 OHCI_SET(regs->rh_desc_a, RHDA_OCPM_FLAG);194 instance->registers->rh_desc_a &= ~RHDA_NOCP_FLAG; 195 instance->registers->rh_desc_a |= RHDA_OCPM_FLAG; 204 196 #endif 205 197 … … 234 226 fibril_mutex_lock(&instance->guard); 235 227 assert(instance->unfinished_interrupt_transfer == NULL); 236 constuint16_t mask = create_interrupt_mask(instance);228 uint16_t mask = create_interrupt_mask(instance); 237 229 if (mask == 0) { 238 usb_log_debug("No changes (%hx)...\n", mask);230 usb_log_debug("No changes...\n"); 239 231 instance->unfinished_interrupt_transfer = request; 240 232 } else { … … 265 257 if (instance->unfinished_interrupt_transfer) { 266 258 usb_log_debug("Finalizing interrupt transfer\n"); 267 constuint16_t mask = create_interrupt_mask(instance);259 uint16_t mask = create_interrupt_mask(instance); 268 260 interrupt_request(instance->unfinished_interrupt_transfer, 269 261 mask, instance->interrupt_mask_size); … … 290 282 instance->hub_descriptor_size = size; 291 283 292 const uint32_t hub_desc = OHCI_RD(instance->registers->rh_desc_a);293 const uint32_t port_desc = OHCI_RD(instance->registers->rh_desc_b);284 uint32_t hub_desc = instance->registers->rh_desc_a; 285 uint32_t port_desc = instance->registers->rh_desc_b; 294 286 295 287 /* bDescLength */ … … 313 305 instance->descriptors.hub[4] = 0; 314 306 /* bPwrOn2PwrGood */ 315 instance->descriptors.hub[5] = hub_desc >> RHDA_POTPGT_SHIFT; 307 instance->descriptors.hub[5] = 308 (hub_desc >> RHDA_POTPGT_SHIFT) & RHDA_POTPGT_MASK; 316 309 /* bHubContrCurrent, root hubs don't need no power. */ 317 310 instance->descriptors.hub[6] = 0; 318 311 319 312 /* Device Removable and some legacy 1.0 stuff*/ 320 instance->descriptors.hub[7] = (port_desc >> RHDB_DR_SHIFT) & 0xff; 313 instance->descriptors.hub[7] = 314 (port_desc >> RHDB_DR_SHIFT) & RHDB_DR_MASK & 0xff; 321 315 instance->descriptors.hub[8] = 0xff; 322 316 if (instance->interrupt_mask_size == 2) { 323 317 instance->descriptors.hub[8] = 324 (port_desc >> RHDB_DR_SHIFT) >> 8;318 (port_desc >> RHDB_DR_SHIFT) & RHDB_DR_MASK >> 8; 325 319 instance->descriptors.hub[9] = 0xff; 326 320 instance->descriptors.hub[10] = 0xff; … … 347 341 instance->interrupt_mask_size; 348 342 349 instance->descriptors.configuration.total_length = uint16_host2usb(343 instance->descriptors.configuration.total_length = 350 344 sizeof(usb_standard_configuration_descriptor_t) + 351 345 sizeof(usb_standard_endpoint_descriptor_t) + 352 346 sizeof(usb_standard_interface_descriptor_t) + 353 instance->hub_descriptor_size );347 instance->hub_descriptor_size; 354 348 } 355 349 /*----------------------------------------------------------------------------*/ … … 370 364 371 365 /* Only local power source change and over-current change can happen */ 372 if (OHCI_RD(instance->registers->rh_status) 373 & (RHS_LPSC_FLAG | RHS_OCIC_FLAG)) { 366 if (instance->registers->rh_status & (RHS_LPSC_FLAG | RHS_OCIC_FLAG)) { 374 367 mask |= 1; 375 368 } 376 369 for (size_t port = 1; port <= instance->port_count; ++port) { 377 370 /* Write-clean bits are those that indicate change */ 378 if (OHCI_RD(instance->registers->rh_port_status[port - 1]) 379 & RHPS_CHANGE_WC_MASK) { 371 if (RHPS_CHANGE_WC_MASK 372 & instance->registers->rh_port_status[port - 1]) { 373 380 374 mask |= (1 << port); 381 375 } 382 376 } 383 usb_log_debug2("OHCI root hub interrupt mask: %hx.\n", mask);384 return uint16_host2usb(mask);377 /* USB is little endian */ 378 return host2uint32_t_le(mask); 385 379 } 386 380 /*----------------------------------------------------------------------------*/ … … 402 396 usb_device_request_setup_packet_t *request_packet = 403 397 (usb_device_request_setup_packet_t*)request->setup_buffer; 404 405 const uint16_t index = uint16_usb2host(request_packet->index);406 398 407 399 switch (request_packet->request_type) … … 414 406 TRANSFER_END(request, EOVERFLOW); 415 407 } else { 416 const uint32_t data = 417 OHCI_RD(instance->registers->rh_status) & 418 (RHS_LPS_FLAG | RHS_LPSC_FLAG 419 | RHS_OCI_FLAG | RHS_OCIC_FLAG); 408 uint32_t data = instance->registers->rh_status & 409 (RHS_LPS_FLAG | RHS_LPSC_FLAG 410 | RHS_OCI_FLAG | RHS_OCIC_FLAG); 420 411 TRANSFER_END_DATA(request, &data, sizeof(data)); 421 412 } … … 429 420 TRANSFER_END(request, EOVERFLOW); 430 421 } else { 431 const unsigned port =index;422 unsigned port = request_packet->index; 432 423 if (port < 1 || port > instance->port_count) 433 424 TRANSFER_END(request, EINVAL); 434 /* Register format matches the format of port status 435 * field */ 436 const uint32_t data = uint32_usb2host(OHCI_RD( 437 instance->registers->rh_port_status[port - 1])); 425 426 uint32_t data = 427 instance->registers->rh_port_status[port - 1]; 438 428 TRANSFER_END_DATA(request, &data, sizeof(data)); 439 429 } … … 444 434 TRANSFER_END(request, EOVERFLOW); 445 435 } else { 446 constuint16_t data =436 uint16_t data = 447 437 uint16_host2usb(USB_DEVICE_STATUS_SELF_POWERED); 448 438 TRANSFER_END_DATA(request, &data, sizeof(data)); … … 451 441 case SETUP_REQUEST_TO_HOST(USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_INTERFACE): 452 442 /* Hubs are allowed to have only one interface */ 453 if ( index != 0)443 if (request_packet->index != 0) 454 444 TRANSFER_END(request, EINVAL); 455 445 /* Fall through, as the answer will be the same: 0x0000 */ 456 446 case SETUP_REQUEST_TO_HOST(USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_ENDPOINT): 457 447 /* Endpoint 0 (default control) and 1 (interrupt) */ 458 if ( index >= 2)448 if (request_packet->index >= 2) 459 449 TRANSFER_END(request, EINVAL); 460 450 … … 465 455 } else { 466 456 /* Endpoints are OK. (We don't halt) */ 467 constuint16_t data = 0;457 uint16_t data = 0; 468 458 TRANSFER_END_DATA(request, &data, sizeof(data)); 469 459 } … … 492 482 usb_device_request_setup_packet_t *setup_request = 493 483 (usb_device_request_setup_packet_t *) request->setup_buffer; 494 /* "The wValue field specifies the descriptor type in the high byte 495 * and the descriptor index in the low byte (refer to Table 9-5)." */ 496 const int desc_type = uint16_usb2host(setup_request->value) >> 8; 497 switch (desc_type) 484 uint16_t setup_request_value = setup_request->value_high; 485 switch (setup_request_value) 498 486 { 499 487 case USB_DESCTYPE_HUB: … … 542 530 setup_request->value, 543 531 setup_request->request_type, setup_request->request, 544 desc_type, setup_request->index,532 setup_request_value, setup_request->index, 545 533 setup_request->length); 546 534 TRANSFER_END(request, EINVAL); … … 568 556 switch (feature) 569 557 { 570 case USB_HUB_FEATURE_PORT_POWER: /*8*/ 571 { 572 const uint32_t rhda = 573 OHCI_RD(instance->registers->rh_desc_a); 574 /* No power switching */ 575 if (rhda & RHDA_NPS_FLAG) 576 return EOK; 577 /* Ganged power switching, one port powers all */ 578 if (!(rhda & RHDA_PSM_FLAG)) { 579 OHCI_WR(instance->registers->rh_status, 580 RHS_SET_GLOBAL_POWER); 581 return EOK; 582 } 558 case USB_HUB_FEATURE_PORT_POWER: //8 559 /* No power switching */ 560 if (instance->registers->rh_desc_a & RHDA_NPS_FLAG) 561 return EOK; 562 /* Ganged power switching */ 563 if (!(instance->registers->rh_desc_a & RHDA_PSM_FLAG)) { 564 instance->registers->rh_status = RHS_SET_GLOBAL_POWER; 565 return EOK; 583 566 } 584 /* Fall through */ 585 case USB_HUB_FEATURE_PORT_ENABLE: /*1*/ 586 case USB_HUB_FEATURE_PORT_SUSPEND: /*2*/ 587 case USB_HUB_FEATURE_PORT_RESET: /*4*/ 588 usb_log_debug2("Setting port POWER, ENABLE, SUSPEND or RESET " 589 "on port %zu.\n", port); 590 OHCI_WR(instance->registers->rh_port_status[port - 1], 591 1 << feature); 567 case USB_HUB_FEATURE_PORT_ENABLE: //1 568 case USB_HUB_FEATURE_PORT_SUSPEND: //2 569 case USB_HUB_FEATURE_PORT_RESET: //4 570 /* Nice thing is that these shifts correspond to the position 571 * of control bits in register */ 572 instance->registers->rh_port_status[port - 1] = (1 << feature); 592 573 return EOK; 593 574 default: … … 615 596 switch (feature) 616 597 { 617 case USB_HUB_FEATURE_PORT_POWER: /*8*/ 618 { 619 const uint32_t rhda = 620 OHCI_RD(instance->registers->rh_desc_a); 621 /* No power switching */ 622 if (rhda & RHDA_NPS_FLAG) 623 return ENOTSUP; 624 /* Ganged power switching, one port powers all */ 625 if (!(rhda & RHDA_PSM_FLAG)) { 626 OHCI_WR(instance->registers->rh_status, 627 RHS_CLEAR_GLOBAL_POWER); 628 return EOK; 629 } 630 OHCI_WR(instance->registers->rh_port_status[port - 1], 631 RHPS_CLEAR_PORT_POWER); 598 case USB_HUB_FEATURE_PORT_POWER: //8 599 /* No power switching */ 600 if (instance->registers->rh_desc_a & RHDA_NPS_FLAG) 601 return ENOTSUP; 602 /* Ganged power switching */ 603 if (!(instance->registers->rh_desc_a & RHDA_PSM_FLAG)) { 604 instance->registers->rh_status = RHS_CLEAR_GLOBAL_POWER; 632 605 return EOK; 633 606 } 634 635 case USB_HUB_FEATURE_PORT_ENABLE: /*1*/ 636 OHCI_WR(instance->registers->rh_port_status[port - 1], 637 RHPS_CLEAR_PORT_ENABLE); 607 instance->registers->rh_port_status[port - 1] = 608 RHPS_CLEAR_PORT_POWER; 638 609 return EOK; 639 610 640 case USB_HUB_FEATURE_PORT_ SUSPEND: /*2*/641 OHCI_WR(instance->registers->rh_port_status[port - 1],642 RHPS_CLEAR_PORT_SUSPEND);611 case USB_HUB_FEATURE_PORT_ENABLE: //1 612 instance->registers->rh_port_status[port - 1] = 613 RHPS_CLEAR_PORT_ENABLE; 643 614 return EOK; 644 615 645 case USB_HUB_FEATURE_C_PORT_CONNECTION: /*16*/ 646 case USB_HUB_FEATURE_C_PORT_ENABLE: /*17*/ 647 case USB_HUB_FEATURE_C_PORT_SUSPEND: /*18*/ 648 case USB_HUB_FEATURE_C_PORT_OVER_CURRENT: /*19*/ 649 case USB_HUB_FEATURE_C_PORT_RESET: /*20*/ 650 usb_log_debug2("Clearing port C_CONNECTION, C_ENABLE, " 651 "C_SUSPEND, C_OC or C_RESET on port %zu.\n", port); 652 /* Bit offsets correspond to the feature number */ 653 OHCI_WR(instance->registers->rh_port_status[port - 1], 654 1 << feature); 616 case USB_HUB_FEATURE_PORT_SUSPEND: //2 617 instance->registers->rh_port_status[port - 1] = 618 RHPS_CLEAR_PORT_SUSPEND; 619 return EOK; 620 621 case USB_HUB_FEATURE_C_PORT_CONNECTION: //16 622 case USB_HUB_FEATURE_C_PORT_ENABLE: //17 623 case USB_HUB_FEATURE_C_PORT_SUSPEND: //18 624 case USB_HUB_FEATURE_C_PORT_OVER_CURRENT: //19 625 case USB_HUB_FEATURE_C_PORT_RESET: //20 626 /* Nice thing is that these shifts correspond to the position 627 * of control bits in register */ 628 instance->registers->rh_port_status[port - 1] = (1 << feature); 655 629 return EOK; 656 630 … … 680 654 case USB_HUB_REQ_TYPE_SET_PORT_FEATURE: 681 655 usb_log_debug("USB_HUB_REQ_TYPE_SET_PORT_FEATURE\n"); 682 constint ret = set_feature_port(instance,656 int ret = set_feature_port(instance, 683 657 setup_request->value, setup_request->index); 684 658 TRANSFER_END(request, ret); … … 719 693 case USB_HUB_REQ_TYPE_CLEAR_PORT_FEATURE: 720 694 usb_log_debug("USB_HUB_REQ_TYPE_CLEAR_PORT_FEATURE\n"); 721 constint ret = clear_feature_port(instance,695 int ret = clear_feature_port(instance, 722 696 setup_request->value, setup_request->index); 723 697 TRANSFER_END(request, ret); … … 732 706 * as root hubs do not support local power status feature. 733 707 * (OHCI pg. 127) */ 734 if (uint16_usb2host(setup_request->value) 735 == USB_HUB_FEATURE_C_HUB_OVER_CURRENT) { 736 OHCI_WR(instance->registers->rh_status, RHS_OCIC_FLAG); 708 if (setup_request->value == USB_HUB_FEATURE_C_HUB_OVER_CURRENT) { 709 instance->registers->rh_status = RHS_OCIC_FLAG; 737 710 TRANSFER_END(request, EOK); 738 711 } … … 798 771 if (request->buffer_size == 0) 799 772 TRANSFER_END(request, EOVERFLOW); 800 constuint8_t config = 1;773 uint8_t config = 1; 801 774 TRANSFER_END_DATA(request, &config, sizeof(config)); 802 775 … … 817 790 TRANSFER_END(request, EINVAL); 818 791 819 instance->address = uint16_usb2host(setup_request->value);792 instance->address = setup_request->value; 820 793 TRANSFER_END(request, EOK); 821 794 822 795 case USB_DEVREQ_SET_CONFIGURATION: 823 796 usb_log_debug("USB_DEVREQ_SET_CONFIGURATION: %u\n", 824 uint16_usb2host(setup_request->value));797 setup_request->value); 825 798 /* We have only one configuration, it's number is 1 */ 826 799 if (uint16_usb2host(setup_request->value) != 1) -
uspace/drv/bus/usb/usbhid/kbd/kbddev.c
r0a208110 r087768f 71 71 #include "../usbhid.h" 72 72 73 static void default_connection_handler(ddf_fun_t *, ipc_callid_t, ipc_call_t *);74 static ddf_dev_ops_t kbdops = { .default_handler = default_connection_handler };75 73 /*----------------------------------------------------------------------------*/ 76 74 … … 189 187 break; 190 188 } 191 if (kbd_dev->c lient_sess == NULL) {192 kbd_dev->c lient_sess = sess;189 if (kbd_dev->console_sess == NULL) { 190 kbd_dev->console_sess = sess; 193 191 usb_log_debug("%s: OK\n", __FUNCTION__); 194 192 async_answer_0(icallid, EOK); … … 294 292 { 295 293 usb_log_debug2("Sending kbdev event %d/%d to the console\n", type, key); 296 if (kbd_dev->c lient_sess == NULL) {294 if (kbd_dev->console_sess == NULL) { 297 295 usb_log_warning( 298 296 "Connection to console not ready, key discarded.\n"); … … 300 298 } 301 299 302 async_exch_t *exch = async_exchange_begin(kbd_dev->c lient_sess);300 async_exch_t *exch = async_exchange_begin(kbd_dev->console_sess); 303 301 if (exch != NULL) { 304 302 async_msg_2(exch, KBDEV_EVENT, type, key); … … 501 499 /* Store the initialized HID device and HID ops 502 500 * to the DDF function. */ 503 fun->ops = &kbd ops;501 fun->ops = &kbd_dev->ops; 504 502 fun->driver_data = kbd_dev; 505 503 … … 578 576 fibril_mutex_initialize(&kbd_dev->repeat_mtx); 579 577 kbd_dev->initialized = USB_KBD_STATUS_UNINITIALIZED; 578 kbd_dev->ops.default_handler = default_connection_handler; 580 579 581 580 /* Store link to HID device */ … … 738 737 739 738 /* Hangup session to the console. */ 740 if (kbd_dev->c lient_sess)741 async_hangup(kbd_dev->c lient_sess);739 if (kbd_dev->console_sess) 740 async_hangup(kbd_dev->console_sess); 742 741 743 742 //assert(!fibril_mutex_is_locked((*kbd_dev)->repeat_mtx)); -
uspace/drv/bus/usb/usbhid/kbd/kbddev.h
r0a208110 r087768f 82 82 unsigned lock_keys; 83 83 84 /** IPC session to client (for sending key events). */ 85 async_sess_t *client_sess; 84 /** IPC session to the console device (for sending key events). */ 85 async_sess_t *console_sess; 86 87 /** @todo What is this actually? */ 88 ddf_dev_ops_t ops; 86 89 87 90 /** Information for auto-repeat of keys. */ -
uspace/drv/bus/usb/usbhid/mouse/mousedev.c
r0a208110 r087768f 54 54 #define NAME "mouse" 55 55 56 static void default_connection_handler(ddf_fun_t *, ipc_callid_t, ipc_call_t *); 57 58 static ddf_dev_ops_t ops = { .default_handler = default_connection_handler }; 59 60 /*----------------------------------------------------------------------------*/ 56 /*----------------------------------------------------------------------------*/ 57 61 58 const usb_endpoint_description_t usb_hid_mouse_poll_endpoint_description = { 62 59 .transfer_type = USB_TRANSFER_INTERRUPT, … … 224 221 assert(index < mouse_dev->buttons_count); 225 222 226 if (mouse_dev->buttons[index] != field->value) {223 if (mouse_dev->buttons[index] == 0 && field->value != 0) { 227 224 async_exch_t *exch = 228 225 async_exchange_begin(mouse_dev->mouse_sess); 229 226 if (exch != NULL) { 230 227 async_req_2_0(exch, MOUSEEV_BUTTON_EVENT, 231 field->usage, (field->value != 0) ? 1 : 0); 228 field->usage, 1); 229 async_exchange_end(exch); 230 mouse_dev->buttons[index] = field->value; 231 } 232 233 } else if (mouse_dev->buttons[index] != 0 && field->value == 0) { 234 async_exch_t *exch = 235 async_exchange_begin(mouse_dev->mouse_sess); 236 if (exch != NULL) { 237 async_req_2_0(exch, MOUSEEV_BUTTON_EVENT, 238 field->usage, 0); 232 239 async_exchange_end(exch); 233 240 mouse_dev->buttons[index] = field->value; … … 272 279 } 273 280 274 fun->ops = & ops;281 fun->ops = &mouse->ops; 275 282 fun->driver_data = mouse; 276 283 … … 295 302 } 296 303 mouse->mouse_fun = fun; 304 297 305 return EOK; 298 306 } … … 371 379 } 372 380 381 // set handler for incoming calls 382 mouse_dev->ops.default_handler = default_connection_handler; 383 373 384 // TODO: how to know if the device supports the request??? 374 385 usbhid_req_set_idle(&hid_dev->usb_dev->ctrl_pipe, -
uspace/drv/bus/usb/usbhid/mouse/mousedev.h
r0a208110 r087768f 46 46 /** Container for USB mouse device. */ 47 47 typedef struct { 48 /** IPC session to cons umer. */48 /** IPC session to console (consumer). */ 49 49 async_sess_t *mouse_sess; 50 50 … … 53 53 size_t buttons_count; 54 54 55 ddf_dev_ops_t ops; 55 56 /* DDF mouse function */ 56 57 ddf_fun_t *mouse_fun; -
uspace/drv/bus/usb/usbhub/port.c
r0a208110 r087768f 353 353 .request = USB_HUB_REQUEST_GET_STATUS, 354 354 .value = 0, 355 .index = uint16_host2usb(port->port_number),355 .index = port->port_number, 356 356 .length = sizeof(usb_port_status_t), 357 357 }; -
uspace/drv/bus/usb/usbhub/status.h
r0a208110 r087768f 42 42 * should not be accessed directly, use supplied getter/setter methods. 43 43 * 44 * For more information refer to tables 11-15 and 11-16 in 45 * "Universal Serial Bus Specification Revision 1.1" pages 274 and 277 46 * (290 and 293 in pdf) 44 * For more information refer to table 11-15 in 45 * "Universal Serial Bus Specification Revision 1.1" 47 46 * 48 47 */ -
uspace/drv/infrastructure/rootmac/rootmac.c
r0a208110 r087768f 52 52 } rootmac_fun_t; 53 53 54 static hw_resource_t pci_conf_regs[] = { 55 { 56 .type = IO_RANGE, 57 .res.io_range = { 58 .address = 0xfec00000, 59 .size = 4, 60 .endianness = LITTLE_ENDIAN 61 } 62 }, 63 { 64 .type = IO_RANGE, 65 .res.io_range = { 66 .address = 0xfee00000, 67 .size = 4, 68 .endianness = LITTLE_ENDIAN 69 } 54 static hw_resource_t pci_conf_regs = { 55 .type = IO_RANGE, 56 .res.io_range = { 57 .address = 0xCF8, 58 .size = 8, 59 .endianness = LITTLE_ENDIAN 70 60 } 71 61 }; … … 73 63 static rootmac_fun_t pci_data = { 74 64 .hw_resources = { 75 2,76 pci_conf_regs65 1, 66 &pci_conf_regs 77 67 } 78 68 }; … … 138 128 { 139 129 /* Register functions */ 140 if (!rootmac_add_fun(dev, "pci0", " intel_pci", &pci_data))130 if (!rootmac_add_fun(dev, "pci0", "pangea_pci", &pci_data)) 141 131 ddf_msg(LVL_ERROR, "Failed to add functions for Mac platform."); 142 132 -
uspace/drv/infrastructure/rootpc/rootpc.c
r0a208110 r087768f 77 77 }; 78 78 79 static hw_resource_t pci_conf_regs[] = { 80 { 81 .type = IO_RANGE, 82 .res.io_range = { 83 .address = 0xCF8, 84 .size = 4, 85 .endianness = LITTLE_ENDIAN 86 } 87 }, 88 { 89 .type = IO_RANGE, 90 .res.io_range = { 91 .address = 0xCFC, 92 .size = 4, 93 .endianness = LITTLE_ENDIAN 94 } 79 static hw_resource_t pci_conf_regs = { 80 .type = IO_RANGE, 81 .res.io_range = { 82 .address = 0xCF8, 83 .size = 8, 84 .endianness = LITTLE_ENDIAN 95 85 } 96 86 }; … … 98 88 static rootpc_fun_t pci_data = { 99 89 .hw_resources = { 100 sizeof(pci_conf_regs)/sizeof(pci_conf_regs[0]),101 pci_conf_regs90 1, 91 &pci_conf_regs 102 92 } 103 93 }; -
uspace/lib/drv/generic/remote_usb.c
r0a208110 r087768f 56 56 { 57 57 if (!exch) 58 return E BADMEM;58 return EINVAL; 59 59 sysarg_t addr; 60 60 const int ret = async_req_1_1(exch, DEV_IFACE_ID(USB_DEV_IFACE), … … 75 75 { 76 76 if (!exch) 77 return E BADMEM;77 return EINVAL; 78 78 sysarg_t iface_no; 79 79 const int ret = async_req_1_1(exch, DEV_IFACE_ID(USB_DEV_IFACE), … … 92 92 { 93 93 if (!exch) 94 return E BADMEM;94 return EINVAL; 95 95 devman_handle_t h; 96 96 const int ret = async_req_1_1(exch, DEV_IFACE_ID(USB_DEV_IFACE), -
uspace/lib/drv/generic/remote_usbhc.c
r0a208110 r087768f 165 165 { 166 166 if (!exch || !address) 167 return E BADMEM;167 return EINVAL; 168 168 sysarg_t new_address; 169 169 const int ret = async_req_4_1(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), … … 178 178 { 179 179 if (!exch) 180 return E BADMEM;180 return EINVAL; 181 181 return async_req_3_0(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), 182 182 IPC_M_USBHC_BIND_ADDRESS, address, handle); … … 187 187 { 188 188 if (!exch) 189 return E BADMEM;189 return EINVAL; 190 190 sysarg_t h; 191 191 const int ret = async_req_2_1(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), … … 199 199 { 200 200 if (!exch) 201 return E BADMEM;201 return EINVAL; 202 202 return async_req_2_0(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), 203 203 IPC_M_USBHC_RELEASE_ADDRESS, address); … … 209 209 { 210 210 if (!exch) 211 return E BADMEM;211 return EINVAL; 212 212 const usb_target_t target = 213 213 {{ .address = address, .endpoint = endpoint }}; … … 225 225 { 226 226 if (!exch) 227 return E BADMEM;227 return EINVAL; 228 228 return async_req_4_0(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), 229 229 IPC_M_USBHC_UNREGISTER_ENDPOINT, address, endpoint, direction); … … 234 234 size_t *rec_size) 235 235 { 236 if (!exch)237 return EBADMEM;238 239 236 if (size == 0 && setup == 0) 240 237 return EOK; 241 238 239 if (!exch) 240 return EINVAL; 242 241 const usb_target_t target = 243 242 {{ .address = address, .endpoint = endpoint }}; … … 289 288 usb_endpoint_t endpoint, uint64_t setup, const void *data, size_t size) 290 289 { 291 if (!exch)292 return EBADMEM;293 294 290 if (size == 0 && setup == 0) 295 291 return EOK; 296 292 293 if (!exch) 294 return EINVAL; 297 295 const usb_target_t target = 298 296 {{ .address = address, .endpoint = endpoint }}; -
uspace/lib/usbdev/src/pipesinit.c
r0a208110 r087768f 154 154 usb_endpoint_mapping_t *mapping, size_t mapping_count, 155 155 usb_standard_interface_descriptor_t *interface, 156 usb_standard_endpoint_descriptor_t *endpoint _desc,156 usb_standard_endpoint_descriptor_t *endpoint, 157 157 usb_device_connection_t *wire) 158 158 { … … 163 163 164 164 /* Actual endpoint number is in bits 0..3 */ 165 const usb_endpoint_t ep_no = endpoint _desc->endpoint_address & 0x0F;165 const usb_endpoint_t ep_no = endpoint->endpoint_address & 0x0F; 166 166 167 167 const usb_endpoint_description_t description = { 168 168 /* Endpoint direction is set by bit 7 */ 169 .direction = (endpoint _desc->endpoint_address & 128)169 .direction = (endpoint->endpoint_address & 128) 170 170 ? USB_DIRECTION_IN : USB_DIRECTION_OUT, 171 171 /* Transfer type is in bits 0..2 and 172 172 * the enum values corresponds 1:1 */ 173 .transfer_type = endpoint _desc->attributes & 3,173 .transfer_type = endpoint->attributes & 3, 174 174 175 175 /* Get interface characteristics. */ … … 194 194 195 195 int rc = usb_pipe_initialize(&ep_mapping->pipe, wire, 196 ep_no, description.transfer_type, 197 uint16_usb2host(endpoint_desc->max_packet_size), 196 ep_no, description.transfer_type, endpoint->max_packet_size, 198 197 description.direction); 199 198 if (rc != EOK) { … … 202 201 203 202 ep_mapping->present = true; 204 ep_mapping->descriptor = endpoint _desc;203 ep_mapping->descriptor = endpoint; 205 204 ep_mapping->interface = interface; 206 205 -
uspace/lib/usbdev/src/request.c
r0a208110 r087768f 114 114 * (in native endianness). 115 115 * @param actual_data_size Actual size of transfered data 116 * 116 * (in native endianness). 117 117 * @return Error code. 118 118 * @retval EBADMEM @p pipe is NULL. … … 147 147 | (request_type << 5) | recipient, 148 148 .request = request, 149 .value = uint16_host2usb(value),150 .index = uint16_host2usb(index),151 .length = uint16_host2usb(data_size),149 .value = value, 150 .index = index, 151 .length = (uint16_t) data_size, 152 152 }; 153 153 … … 375 375 usb_standard_device_descriptor_t descriptor_tmp; 376 376 int rc = usb_request_get_descriptor(pipe, 377 USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_DEVICE, 377 USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_DEVICE, 378 378 USB_DESCTYPE_DEVICE, 0, 0, 379 379 &descriptor_tmp, sizeof(descriptor_tmp), … … 435 435 /* Everything is okay, copy the descriptor. */ 436 436 memcpy(descriptor, &descriptor_tmp, sizeof(descriptor_tmp)); 437 437 438 return EOK; 438 439 } … … 494 495 return ENOENT; 495 496 } 496 497 const size_t total_length = uint16_usb2host(bare_config.total_length); 498 if (total_length < sizeof(bare_config)) { 497 if (bare_config.total_length < sizeof(bare_config)) { 499 498 return ELIMIT; 500 499 } 501 500 502 void *buffer = malloc( total_length);501 void *buffer = malloc(bare_config.total_length); 503 502 if (buffer == NULL) { 504 503 return ENOMEM; … … 507 506 size_t transferred = 0; 508 507 rc = usb_request_get_full_configuration_descriptor(pipe, index, 509 buffer, total_length, &transferred);508 buffer, bare_config.total_length, &transferred); 510 509 if (rc != EOK) { 511 510 free(buffer); … … 513 512 } 514 513 515 if (transferred != total_length) {514 if (transferred != bare_config.total_length) { 516 515 free(buffer); 517 516 return ELIMIT; … … 523 522 524 523 if (descriptor_size != NULL) { 525 *descriptor_size = total_length;524 *descriptor_size = bare_config.total_length; 526 525 } 527 526 -
uspace/lib/usbhid/src/hidreport.c
r0a208110 r087768f 50 50 #include <usb/hid/hidreport.h> 51 51 52 static int usb_hid_get_report_descriptor(usb_device_t *dev, 52 static int usb_hid_get_report_descriptor(usb_device_t *dev, 53 53 uint8_t **report_desc, size_t *size) 54 54 { … … 69 69 * First nested descriptor of the configuration descriptor. 70 70 */ 71 const uint8_t *d = 72 usb_dp_get_nested_descriptor(&parser, &parser_data, 71 const uint8_t *d = 72 usb_dp_get_nested_descriptor(&parser, &parser_data, 73 73 dev->descriptors.configuration); 74 74 … … 78 78 int i = 0; 79 79 while (d != NULL && i < dev->interface_no) { 80 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 80 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 81 81 dev->descriptors.configuration, d); 82 82 ++i; … … 99 99 */ 100 100 while (d != NULL && *(d + 1) != USB_DESCTYPE_HID) { 101 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 101 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 102 102 iface_desc, d); 103 103 } … … 114 114 } 115 115 116 usb_standard_hid_descriptor_t *hid_desc = 116 usb_standard_hid_descriptor_t *hid_desc = 117 117 (usb_standard_hid_descriptor_t *)d; 118 118 119 uint16_t length = uint16_usb2host(hid_desc->report_desc_info.length);119 uint16_t length = hid_desc->report_desc_info.length; 120 120 size_t actual_size = 0; 121 121
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