Changeset 0882a9a in mainline for arch/mips32/include/mm/tlb.h

Timestamp:

2006-02-10T16:11:14Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

ecbdc724

Parents:

d0a0f12

Message:

Make use of one unused bit in PTE formats of amd64, ia32 and mips32 to store 1 in valid mappings.
This helps to distinguish valid entries from not present entries with 0 content (i.e. not present
entries with PFN 0 and other bits cleared).

File:

• arch/mips32/include/mm/tlb.h (modified) (1 diff)

arch/mips32/include/mm/tlb.h

@@ -64 +64 @@
 };
 
-union pte {
-        entry_lo_t lo;
-        struct {
-                unsigned : 30;
-                unsigned w : 1;         /* writable */
-                unsigned a : 1;         /* accessed */
-        } __attribute__ ((packed));
+/** Page Table Entry. */
+struct pte {
+        unsigned g : 1;                 /**< Global bit. */
+        unsigned p : 1;                 /**< Present bit. */
+        unsigned d : 1;                 /**< Dirty bit. */
+        unsigned cacheable : 1;         /**< Cacheable bit. */
+        unsigned : 1;                   /**< Unused. */
+        unsigned soft_valid : 1;        /**< Valid content even if not present. */
+        unsigned pfn : 24;              /**< Physical frame number. */
+        unsigned w : 1;                 /**< Page writable bit. */
+        unsigned a : 1;                 /**< Accessed bit. */
 };