Changeset 08f747e in mainline for kernel/arch/amd64/include/mm/page.h


Ignore:
Timestamp:
2010-11-26T21:49:30Z (14 years ago)
Author:
Vojtech Horky <vojtechhorky@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
8e423a2d, dac43be
Parents:
e4dbfda (diff), da55d5b (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge development/ changes

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/amd64/include/mm/page.h

    re4dbfda r08f747e  
    5555#ifndef __ASM__
    5656
    57 #define KA2PA(x)  (((uintptr_t) (x)) - 0xffff800000000000)
    58 #define PA2KA(x)  (((uintptr_t) (x)) + 0xffff800000000000)
     57#define KA2PA(x)  (((uintptr_t) (x)) - UINT64_C(0xffff800000000000))
     58#define PA2KA(x)  (((uintptr_t) (x)) + UINT64_C(0xffff800000000000))
    5959
    6060#else /* __ASM__ */
     
    7878
    7979/* Macros calculating indices into page tables in each level. */
    80 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ff)
    81 #define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ff)
    82 #define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ff)
    83 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
     80#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ffU)
     81#define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ffU)
     82#define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ffU)
     83#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ffU)
    8484
    8585/* Get PTE address accessors for each level. */
     
    205205        pte_t *p = &pt[i];
    206206       
    207         p->addr_12_31 = (a >> 12) & 0xfffff;
     207        p->addr_12_31 = (a >> 12) & UINT32_C(0xfffff);
    208208        p->addr_32_51 = a >> 32;
    209209}
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