Changeset 096d11e5 in mainline


Ignore:
Timestamp:
2005-12-22T11:09:02Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
2cf5634
Parents:
d53aba3f
Message:

sparc64 work.
Add functions to read and write TICK and TICK_compare registers.
Add types describing TICK and TICK_compare registers.

Location:
arch/sparc64/include
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • arch/sparc64/include/asm.h

    rd53aba3f r096d11e5  
    5757}
    5858
     59/** Read TICK_compare Register.
     60 *
     61 * @return Value of TICK_comapre register.
     62 */
     63static inline __u64 tick_compare_read(void)
     64{
     65        __u64 v;
     66       
     67        __asm__ volatile ("rd %%tick_cmpr, %0\n" : "=r" (v));
     68       
     69        return v;
     70}
     71
     72/** Write TICK_compare Register.
     73 *
     74 * @param New value of TICK_comapre register.
     75 */
     76static inline void tick_compare_write(__u64 v)
     77{
     78        __asm__ volatile ("wr %0, %1, %%tick_cmpr\n" : : "r" (v), "i" (0));
     79}
     80
     81/** Read TICK Register.
     82 *
     83 * @return Value of TICK register.
     84 */
     85static inline __u64 tick_read(void)
     86{
     87        __u64 v;
     88       
     89        __asm__ volatile ("rdpr %%tick, %0\n" : "=r" (v));
     90       
     91        return v;
     92}
     93
     94/** Write TICK Register.
     95 *
     96 * @param New value of TICK register.
     97 */
     98static inline void tick_write(__u64 v)
     99{
     100        __asm__ volatile ("wrpr %0, %1, %%tick\n" : : "r" (v), "i" (0));
     101}
     102
    59103
    60104/** Enable interrupts.
    … …  
    197241}
    198242
     243
     244
    199245void cpu_halt(void);
    200246void cpu_sleep(void);

  • arch/sparc64/include/mm/mmu.h

    rd53aba3f r096d11e5  
    104104
    105105/** Disable or Enable IMMU. */
    106 static inline immu_set(bool enable)
     106static inline void immu_set(bool enable)
    107107{
    108108        lsu_cr_reg_t cr;
    … …  
    115115
    116116/** Disable or Enable DMMU. */
    117 static inline dmmu_set(bool enable)
     117static inline void dmmu_set(bool enable)
    118118{
    119119        lsu_cr_reg_t cr;

  • arch/sparc64/include/mm/tlb.h

    rd53aba3f r096d11e5  
    115115 * @param value Value to be written.
    116116 */
    117 static inline __u64 itlb_data_access_write(index_t entry, __u64 value)
     117static inline void itlb_data_access_write(index_t entry, __u64 value)
    118118{
    119119        tlb_data_access_addr_t reg;
    … …  
    145145 * @param value Value to be written.
    146146 */
    147 static inline __u64 dtlb_data_access_write(index_t entry, __u64 value)
     147static inline void dtlb_data_access_write(index_t entry, __u64 value)
    148148{
    149149        tlb_data_access_addr_t reg;

  • arch/sparc64/include/register.h

    rd53aba3f r096d11e5  
    3737        struct {
    3838                __u16 manuf;    /**< Manufacturer code. */
    39                 __u16 impl;
     39                __u16 impl;     /**< Implementation code. */
    4040                __u8 mask;      /**< Mask set revision. */
    4141                unsigned : 8;
    … …  
    6767typedef union pstate_reg pstate_reg_t;
    6868
     69/** TICK Register. */
     70union tick_reg {
     71        __u64 value;
     72        struct {
     73                unsigned npt : 1;       /**< Non-privileged Trap enable. */
     74                __u64 counter : 63;     /**< Elapsed CPU clck cycle counter. */
     75        } __attribute__ ((packed));
     76};
     77typedef union tick_reg tick_reg_t;
     78
     79/** TICK_compare Register. */
     80union tick_compare_reg {
     81        __u64 value;
     82        struct {
     83                unsigned int_dis : 1;   /**< TICK_INT interrupt enable. */
     84                __u64 tick_cmpr : 63;   /**< Compare value for TICK interrupts. */
     85        } __attribute__ ((packed));
     86};
     87typedef union tick_compare_reg tick_compare_reg_t;
     88
    6989#endif
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