Changes in / [087768f:0a208110] in mainline
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HelenOS.config
r087768f r0a208110 588 588 @ "ganged" Root hub ports are all powered or all off. 589 589 @ "per_port" Powered status of every root hub port is independent. 590 ! [PLATFORM=ia32|PLATFORM=amd64 ] OHCI_POWER_SWITCH (choice)590 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ppc32] OHCI_POWER_SWITCH (choice) 591 591 592 592 % GRUB boot loader architecture -
boot/arch/ppc32/Makefile.inc
r087768f r0a208110 43 43 44 44 RD_DRVS += \ 45 infrastructure/rootmac 45 infrastructure/rootmac \ 46 bus/pci/pciintel \ 47 bus/usb/ohci \ 48 bus/usb/usbflbk \ 49 bus/usb/usbhub \ 50 bus/usb/usbhid \ 51 bus/usb/usbmast \ 52 bus/usb/usbmid \ 53 bus/usb/vhc 46 54 47 55 SOURCES = \ -
defaults/ppc32/Makefile.config
r087768f r0a208110 44 44 CONFIG_MOUNT_DATA = n 45 45 46 # OHCI root hub power switch, ganged is enough 47 OHCI_POWER_SWITCH = ganged 48 -
uspace/Makefile
r087768f r0a208110 165 165 DIRS += \ 166 166 drv/infrastructure/rootmac \ 167 drv/bus/pci/pciintel \ 167 168 srv/hw/bus/cuda_adb 168 169 endif -
uspace/drv/bus/pci/pciintel/pci.c
r087768f r0a208110 38 38 39 39 #include <assert.h> 40 #include <byteorder.h> 40 41 #include <stdio.h> 41 42 #include <errno.h> … … 231 232 void *addr = bus->conf_data_port + (reg & 3); 232 233 233 pio_write_32(bus->conf_addr_port, conf_addr);234 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr)); 234 235 235 236 switch (len) { 236 237 case 1: 238 /* No endianness change for 1 byte */ 237 239 buf[0] = pio_read_8(addr); 238 240 break; 239 241 case 2: 240 ((uint16_t *) buf)[0] = pio_read_16(addr);242 ((uint16_t *) buf)[0] = uint16_t_le2host(pio_read_16(addr)); 241 243 break; 242 244 case 4: 243 ((uint32_t *) buf)[0] = pio_read_32(addr);245 ((uint32_t *) buf)[0] = uint32_t_le2host(pio_read_32(addr)); 244 246 break; 245 247 } … … 254 256 fibril_mutex_lock(&bus->conf_mutex); 255 257 256 uint32_t conf_addr; 257 conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 258 const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 258 259 void *addr = bus->conf_data_port + (reg & 3); 259 260 260 pio_write_32(bus->conf_addr_port, conf_addr);261 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr)); 261 262 262 263 switch (len) { 263 264 case 1: 265 /* No endianness change for 1 byte */ 264 266 pio_write_8(addr, buf[0]); 265 267 break; 266 268 case 2: 267 pio_write_16(addr, ((uint16_t *) buf)[0]);269 pio_write_16(addr, host2uint16_t_le(((uint16_t *) buf)[0])); 268 270 break; 269 271 case 4: 270 pio_write_32(addr, ((uint32_t *) buf)[0]);272 pio_write_32(addr, host2uint32_t_le(((uint32_t *) buf)[0])); 271 273 break; 272 274 } … … 650 652 got_res = true; 651 653 654 655 assert(hw_resources.count > 1); 656 assert(hw_resources.resources[0].type == IO_RANGE); 657 assert(hw_resources.resources[0].res.io_range.size >= 4); 658 659 assert(hw_resources.resources[1].type == IO_RANGE); 660 assert(hw_resources.resources[1].res.io_range.size >= 4); 661 652 662 ddf_msg(LVL_DEBUG, "conf_addr = %" PRIx64 ".", 653 663 hw_resources.resources[0].res.io_range.address); 654 655 assert(hw_resources.count > 0); 656 assert(hw_resources.resources[0].type == IO_RANGE); 657 assert(hw_resources.resources[0].res.io_range.size == 8); 664 ddf_msg(LVL_DEBUG, "data_addr = %" PRIx64 ".", 665 hw_resources.resources[1].res.io_range.address); 658 666 659 667 bus->conf_io_addr = 660 668 (uint32_t) hw_resources.resources[0].res.io_range.address; 661 662 if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 8, 669 bus->conf_io_data = 670 (uint32_t) hw_resources.resources[1].res.io_range.address; 671 672 if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 4, 663 673 &bus->conf_addr_port)) { 664 674 ddf_msg(LVL_ERROR, "Failed to enable configuration ports."); … … 666 676 goto fail; 667 677 } 668 bus->conf_data_port = (char *) bus->conf_addr_port + 4; 678 if (pio_enable((void *)(uintptr_t)bus->conf_io_data, 4, 679 &bus->conf_data_port)) { 680 ddf_msg(LVL_ERROR, "Failed to enable configuration ports."); 681 rc = EADDRNOTAVAIL; 682 goto fail; 683 } 669 684 670 685 /* Make the bus device more visible. It has no use yet. */ -
uspace/drv/bus/pci/pciintel/pci.h
r087768f r0a208110 46 46 ddf_dev_t *dnode; 47 47 uint32_t conf_io_addr; 48 uint32_t conf_io_data; 48 49 void *conf_data_port; 49 50 void *conf_addr_port; -
uspace/drv/bus/usb/ohci/endpoint_list.c
r087768f r0a208110 162 162 qpos = "NOT FIRST"; 163 163 } 164 assert( (prev_ed->next & ED_NEXT_PTR_MASK) == addr_to_phys(ep->ed));164 assert(ed_next(prev_ed) == addr_to_phys(ep->ed)); 165 165 prev_ed->next = ep->ed->next; 166 166 /* Make sure ED is updated */ -
uspace/drv/bus/usb/ohci/hc.c
r087768f r0a208110 111 111 ohci_regs_t *registers = (ohci_regs_t *) regs; 112 112 cmds[0].addr = (void *) ®isters->interrupt_status; 113 cmds[1].value = OHCI_USED_INTERRUPTS; 113 114 cmds[3].addr = (void *) ®isters->interrupt_status; 114 115 … … 241 242 switch (ep->transfer_type) { 242 243 case USB_TRANSFER_CONTROL: 243 instance->registers->control &= ~C_CLE;244 OHCI_CLR(instance->registers->control, C_CLE); 244 245 endpoint_list_add_ep(list, ohci_ep); 245 instance->registers->control_current = 0;246 instance->registers->control |= C_CLE;246 OHCI_WR(instance->registers->control_current, 0); 247 OHCI_SET(instance->registers->control, C_CLE); 247 248 break; 248 249 case USB_TRANSFER_BULK: 249 instance->registers->control &= ~C_BLE;250 OHCI_CLR(instance->registers->control, C_BLE); 250 251 endpoint_list_add_ep(list, ohci_ep); 251 instance->registers->control |= C_BLE; 252 OHCI_WR(instance->registers->bulk_current, 0); 253 OHCI_SET(instance->registers->control, C_BLE); 252 254 break; 253 255 case USB_TRANSFER_ISOCHRONOUS: 254 256 case USB_TRANSFER_INTERRUPT: 255 instance->registers->control &= (~C_PLE & ~C_IE);257 OHCI_CLR(instance->registers->control, C_PLE | C_IE); 256 258 endpoint_list_add_ep(list, ohci_ep); 257 instance->registers->control |= C_PLE | C_IE;259 OHCI_SET(instance->registers->control, C_PLE | C_IE); 258 260 break; 259 261 } … … 273 275 switch (ep->transfer_type) { 274 276 case USB_TRANSFER_CONTROL: 275 instance->registers->control &= ~C_CLE;277 OHCI_CLR(instance->registers->control, C_CLE); 276 278 endpoint_list_remove_ep(list, ohci_ep); 277 instance->registers->control_current = 0;278 instance->registers->control |= C_CLE;279 OHCI_WR(instance->registers->control_current, 0); 280 OHCI_SET(instance->registers->control, C_CLE); 279 281 break; 280 282 case USB_TRANSFER_BULK: 281 instance->registers->control &= ~C_BLE;283 OHCI_CLR(instance->registers->control, C_BLE); 282 284 endpoint_list_remove_ep(list, ohci_ep); 283 instance->registers->control |= C_BLE; 285 OHCI_WR(instance->registers->bulk_current, 0); 286 OHCI_SET(instance->registers->control, C_BLE); 284 287 break; 285 288 case USB_TRANSFER_ISOCHRONOUS: 286 289 case USB_TRANSFER_INTERRUPT: 287 instance->registers->control &= (~C_PLE & ~C_IE);290 OHCI_CLR(instance->registers->control, C_PLE | C_IE); 288 291 endpoint_list_remove_ep(list, ohci_ep); 289 instance->registers->control |= C_PLE | C_IE;292 OHCI_SET(instance->registers->control, C_PLE | C_IE); 290 293 break; 291 294 default: … … 308 311 /* Check for root hub communication */ 309 312 if (batch->ep->address == instance->rh.address) { 313 usb_log_debug("OHCI root hub request.\n"); 310 314 rh_request(&instance->rh, batch); 311 315 return EOK; … … 323 327 { 324 328 case USB_TRANSFER_CONTROL: 325 instance->registers->command_status |= CS_CLF;329 OHCI_SET(instance->registers->command_status, CS_CLF); 326 330 break; 327 331 case USB_TRANSFER_BULK: 328 instance->registers->command_status |= CS_BLF;332 OHCI_SET(instance->registers->command_status, CS_BLF); 329 333 break; 330 334 default: … … 342 346 void hc_interrupt(hc_t *instance, uint32_t status) 343 347 { 348 status = ohci_reg2host(status); 344 349 assert(instance); 345 350 if ((status & ~I_SF) == 0) /* ignore sof status */ … … 352 357 fibril_mutex_lock(&instance->guard); 353 358 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca, 354 instance->registers->hcca,359 OHCI_RD(instance->registers->hcca), 355 360 (void *) addr_to_phys(instance->hcca)); 356 361 usb_log_debug2("Periodic current: %#" PRIx32 ".\n", 357 instance->registers->periodic_current);362 OHCI_RD(instance->registers->periodic_current)); 358 363 359 364 link_t *current = list_first(&instance->pending_batches); … … 410 415 411 416 usb_log_debug("Requesting OHCI control.\n"); 412 if ( instance->registers->revision& R_LEGACY_FLAG) {417 if (OHCI_RD(instance->registers->revision) & R_LEGACY_FLAG) { 413 418 /* Turn off legacy emulation, it should be enough to zero 414 419 * the lowest bit, but it caused problems. Thus clear all … … 419 424 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET); 420 425 usb_log_debug("OHCI legacy register %p: %x.\n", 421 ohci_emulation_reg, *ohci_emulation_reg);426 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg)); 422 427 /* Zero everything but A20State */ 423 *ohci_emulation_reg &= 0x100;428 OHCI_CLR(*ohci_emulation_reg, ~0x100); 424 429 usb_log_debug( 425 430 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n", 426 ohci_emulation_reg, *ohci_emulation_reg);431 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg)); 427 432 } 428 433 429 434 /* Interrupt routing enabled => smm driver is active */ 430 if ( instance->registers->control& C_IR) {435 if (OHCI_RD(instance->registers->control) & C_IR) { 431 436 usb_log_debug("SMM driver: request ownership change.\n"); 432 instance->registers->command_status |= CS_OCR;437 OHCI_SET(instance->registers->command_status, CS_OCR); 433 438 /* Hope that SMM actually knows its stuff or we can hang here */ 434 while ( instance->registers->control & C_IR) {439 while (OHCI_RD(instance->registers->control & C_IR)) { 435 440 async_usleep(1000); 436 441 } … … 440 445 return; 441 446 } 442 443 447 const unsigned hc_status = C_HCFS_GET(instance->registers->control); 444 448 /* Interrupt routing disabled && status != USB_RESET => BIOS active */ … … 449 453 return; 450 454 } 451 /* HC is suspended assert resume for 20ms ,*/455 /* HC is suspended assert resume for 20ms */ 452 456 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME); 453 457 async_usleep(20000); … … 473 477 474 478 /* Save contents of fm_interval register */ 475 const uint32_t fm_interval = instance->registers->fm_interval;479 const uint32_t fm_interval = OHCI_RD(instance->registers->fm_interval); 476 480 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval); 477 481 … … 479 483 usb_log_debug2("HC reset.\n"); 480 484 size_t time = 0; 481 instance->registers->command_status = CS_HCR;482 while ( instance->registers->command_status& CS_HCR) {485 OHCI_WR(instance->registers->command_status, CS_HCR); 486 while (OHCI_RD(instance->registers->command_status) & CS_HCR) { 483 487 async_usleep(10); 484 488 time += 10; … … 487 491 488 492 /* Restore fm_interval */ 489 instance->registers->fm_interval = fm_interval;490 assert(( instance->registers->command_status& CS_HCR) == 0);493 OHCI_WR(instance->registers->fm_interval, fm_interval); 494 assert((OHCI_RD(instance->registers->command_status) & CS_HCR) == 0); 491 495 492 496 /* hc is now in suspend state */ 493 497 usb_log_debug2("HC should be in suspend state(%x).\n", 494 instance->registers->control);498 OHCI_RD(instance->registers->control)); 495 499 496 500 /* Use HCCA */ 497 instance->registers->hcca = addr_to_phys(instance->hcca);501 OHCI_WR(instance->registers->hcca, addr_to_phys(instance->hcca)); 498 502 499 503 /* Use queues */ 500 instance->registers->bulk_head =501 instance->lists[USB_TRANSFER_BULK].list_head_pa ;504 OHCI_WR(instance->registers->bulk_head, 505 instance->lists[USB_TRANSFER_BULK].list_head_pa); 502 506 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n", 503 507 instance->lists[USB_TRANSFER_BULK].list_head, 504 508 instance->lists[USB_TRANSFER_BULK].list_head_pa); 505 509 506 instance->registers->control_head =507 instance->lists[USB_TRANSFER_CONTROL].list_head_pa ;510 OHCI_WR(instance->registers->control_head, 511 instance->lists[USB_TRANSFER_CONTROL].list_head_pa); 508 512 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n", 509 513 instance->lists[USB_TRANSFER_CONTROL].list_head, … … 511 515 512 516 /* Enable queues */ 513 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);514 usb_log_debug 2("All queues enabled(%x).\n",515 instance->registers->control);517 OHCI_SET(instance->registers->control, (C_PLE | C_IE | C_CLE | C_BLE)); 518 usb_log_debug("Queues enabled(%x).\n", 519 OHCI_RD(instance->registers->control)); 516 520 517 521 /* Enable interrupts */ 518 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;519 usb_log_debug 2("Enabled interrupts: %x.\n",520 instance->registers->interrupt_enable);521 instance->registers->interrupt_enable = I_MI;522 OHCI_WR(instance->registers->interrupt_enable, OHCI_USED_INTERRUPTS); 523 usb_log_debug("Enabled interrupts: %x.\n", 524 OHCI_RD(instance->registers->interrupt_enable)); 525 OHCI_WR(instance->registers->interrupt_enable, I_MI); 522 526 523 527 /* Set periodic start to 90% */ 524 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK); 525 instance->registers->periodic_start = (frame_length / 10) * 9; 528 const uint32_t frame_length = 529 (fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK; 530 OHCI_WR(instance->registers->periodic_start, 531 ((frame_length / 10) * 9) & PS_MASK << PS_SHIFT); 526 532 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n", 527 instance->registers->periodic_start, 528 instance->registers->periodic_start, frame_length); 529 533 OHCI_RD(instance->registers->periodic_start), 534 OHCI_RD(instance->registers->periodic_start), frame_length); 530 535 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL); 531 536 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n", 532 instance->registers->control);537 OHCI_RD(instance->registers->control)); 533 538 } 534 539 /*----------------------------------------------------------------------------*/ … … 591 596 592 597 for (unsigned i = 0; i < 32; ++i) { 593 instance->hcca->int_ep[i] =594 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa ;598 OHCI_WR(instance->hcca->int_ep[i], 599 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa); 595 600 } 596 601 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n", -
uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c
r087768f r0a208110 58 58 /* Mark as dead, used for dummy EDs at the beginning of 59 59 * endpoint lists. */ 60 instance->status = ED_STATUS_K_FLAG;60 OHCI_WR(instance->status, ED_STATUS_K_FLAG); 61 61 return; 62 62 } … … 65 65 66 66 /* Status: address, endpoint nr, direction mask and max packet size. */ 67 instance->status = 068 |((ep->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT)67 OHCI_WR(instance->status, 68 ((ep->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT) 69 69 | ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT) 70 70 | ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT) 71 71 | ((ep->max_packet_size & ED_STATUS_MPS_MASK) 72 << ED_STATUS_MPS_SHIFT) ;72 << ED_STATUS_MPS_SHIFT)); 73 73 74 74 /* Low speed flag */ 75 75 if (ep->speed == USB_SPEED_LOW) 76 instance->status |= ED_STATUS_S_FLAG;76 OHCI_SET(instance->status, ED_STATUS_S_FLAG); 77 77 78 78 /* Isochronous format flag */ 79 79 if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS) 80 instance->status |= ED_STATUS_F_FLAG;80 OHCI_SET(instance->status, ED_STATUS_F_FLAG); 81 81 82 82 /* Set TD to the list */ 83 83 const uintptr_t pa = addr_to_phys(td); 84 instance->td_head = pa & ED_TDHEAD_PTR_MASK;85 instance->td_tail = pa & ED_TDTAIL_PTR_MASK;84 OHCI_WR(instance->td_head, pa & ED_TDHEAD_PTR_MASK); 85 OHCI_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK); 86 86 87 87 /* Set toggle bit */ 88 88 if (ep->toggle) 89 instance->td_head |= ED_TDHEAD_TOGGLE_CARRY;89 OHCI_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY); 90 90 91 91 } -
uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.h
r087768f r0a208110 40 40 #include <usb/host/endpoint.h> 41 41 42 #include "../ohci_regs.h" 42 43 #include "../utils/malloc32.h" 43 44 #include "transfer_descriptor.h" … … 116 117 { 117 118 assert(instance); 118 return (instance->td_head & ED_TDHEAD_HALTED_FLAG) 119 || (instance->status & ED_STATUS_K_FLAG); 119 return (OHCI_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG) 120 || (OHCI_RD(instance->status) & ED_STATUS_K_FLAG); 121 } 122 123 static inline void ed_clear_halt(ed_t *instance) 124 { 125 assert(instance); 126 OHCI_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG); 120 127 } 121 128 … … 128 135 { 129 136 assert(instance); 130 return ( instance->td_head& ED_TDHEAD_PTR_MASK)131 != ( instance->td_tail& ED_TDTAIL_PTR_MASK);137 return (OHCI_RD(instance->td_head) & ED_TDHEAD_PTR_MASK) 138 != (OHCI_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK); 132 139 } 133 140 … … 141 148 assert(instance); 142 149 const uintptr_t pa = addr_to_phys(td); 143 instance->td_tail = pa & ED_TDTAIL_PTR_MASK; 150 OHCI_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK); 151 } 152 153 static inline uint32_t ed_tail_td(const ed_t *instance) 154 { 155 assert(instance); 156 return OHCI_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK; 157 } 158 159 static inline uint32_t ed_head_td(const ed_t *instance) 160 { 161 assert(instance); 162 return OHCI_RD(instance->td_head) & ED_TDHEAD_PTR_MASK; 144 163 } 145 164 … … 155 174 const uint32_t pa = addr_to_phys(next); 156 175 assert((pa & ED_NEXT_PTR_MASK) << ED_NEXT_PTR_SHIFT == pa); 157 instance->next = pa; 176 OHCI_WR(instance->next, pa); 177 } 178 179 static inline uint32_t ed_next(const ed_t *instance) 180 { 181 assert(instance); 182 return OHCI_RD(instance->next) & ED_NEXT_PTR_MASK; 158 183 } 159 184 … … 166 191 { 167 192 assert(instance); 168 return ( instance->td_head& ED_TDHEAD_TOGGLE_CARRY) ? 1 : 0;193 return (OHCI_RD(instance->td_head) & ED_TDHEAD_TOGGLE_CARRY) ? 1 : 0; 169 194 } 170 195 … … 178 203 assert(instance); 179 204 if (toggle) { 180 instance->td_head |= ED_TDHEAD_TOGGLE_CARRY;205 OHCI_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY); 181 206 } else { 182 207 /* Clear halted flag when reseting toggle TODO: Why? */ 183 instance->td_head &= ~ED_TDHEAD_TOGGLE_CARRY;184 instance->td_head &= ~ED_TDHEAD_HALTED_FLAG;208 OHCI_CLR(instance->td_head, ED_TDHEAD_TOGGLE_CARRY); 209 OHCI_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG); 185 210 } 186 211 } -
uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c
r087768f r0a208110 33 33 */ 34 34 #include <usb/usb.h> 35 #include <mem.h> 36 #include "../utils/malloc32.h" 35 37 #include "transfer_descriptor.h" 36 38 … … 58 60 bzero(instance, sizeof(td_t)); 59 61 /* Set PID and Error code */ 60 instance->status = 061 |((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT)62 | ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT) ;62 OHCI_WR(instance->status, 63 ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT) 64 | ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT)); 63 65 64 66 if (toggle == 0 || toggle == 1) { 65 67 /* Set explicit toggle bit */ 66 instance->status |= TD_STATUS_T_USE_TD_FLAG;67 instance->status |= toggle ? TD_STATUS_T_FLAG : 0;68 OHCI_SET(instance->status, TD_STATUS_T_USE_TD_FLAG); 69 OHCI_SET(instance->status, toggle ? TD_STATUS_T_FLAG : 0); 68 70 } 69 71 70 72 /* Alow less data on input. */ 71 73 if (dir == USB_DIRECTION_IN) { 72 instance->status |= TD_STATUS_ROUND_FLAG;74 OHCI_SET(instance->status, TD_STATUS_ROUND_FLAG); 73 75 } 74 76 75 77 if (buffer != NULL) { 76 78 assert(size != 0); 77 instance->cbp = addr_to_phys(buffer);78 instance->be = addr_to_phys(buffer + size - 1);79 OHCI_WR(instance->cbp, addr_to_phys(buffer)); 80 OHCI_WR(instance->be, addr_to_phys(buffer + size - 1)); 79 81 } 80 82 81 instance->next = addr_to_phys(next) & TD_NEXT_PTR_MASK;83 OHCI_WR(instance->next, addr_to_phys(next) & TD_NEXT_PTR_MASK); 82 84 83 85 } -
uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h
r087768f r0a208110 38 38 #include <stdint.h> 39 39 40 #include "../ utils/malloc32.h"40 #include "../ohci_regs.h" 41 41 #include "completion_codes.h" 42 42 … … 100 100 { 101 101 assert(instance); 102 const int cc = 103 (instance->status>> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;102 const int cc =(OHCI_RD(instance->status) 103 >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK; 104 104 /* This value is changed on transfer completion, 105 105 * either to CC_NOERROR or and error code. … … 119 119 { 120 120 assert(instance); 121 const int cc = 122 (instance->status>> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;121 const int cc = (OHCI_RD(instance->status) 122 >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK; 123 123 return cc_to_rc(cc); 124 124 } … … 136 136 return 0; 137 137 /* Buffer end points to the last byte of transfer buffer, so add 1 */ 138 return instance->be - instance->cbp+ 1;138 return OHCI_RD(instance->be) - OHCI_RD(instance->cbp) + 1; 139 139 } 140 140 #endif -
uspace/drv/bus/usb/ohci/ohci_batch.c
r087768f r0a208110 199 199 ohci_batch->tds[i]->next, ohci_batch->tds[i]->be); 200 200 201 /* If the TD got all its data through, it will report 0 bytes202 * remain, the sole exception is INPUT with data rounding flag203 * (short), i.e. every INPUT. Nice thing is that short packets204 * will correctly report remaining data, thus making205 * this computation correct (short packets need to be produced206 * by the last TD)207 * NOTE: This also works for CONTROL transfer as208 * the first TD will return 0 remain.209 * NOTE: Short packets don't break the assumption that210 * we leave the very last(unused) TD behind.211 */212 ohci_batch->usb_batch->transfered_size213 -= td_remain_size(ohci_batch->tds[i]);214 215 201 ohci_batch->usb_batch->error = td_error(ohci_batch->tds[i]); 216 if (ohci_batch->usb_batch->error != EOK) { 202 if (ohci_batch->usb_batch->error == EOK) { 203 /* If the TD got all its data through, it will report 204 * 0 bytes remain, the sole exception is INPUT with 205 * data rounding flag (short), i.e. every INPUT. 206 * Nice thing is that short packets will correctly 207 * report remaining data, thus making this computation 208 * correct (short packets need to be produced by the 209 * last TD) 210 * NOTE: This also works for CONTROL transfer as 211 * the first TD will return 0 remain. 212 * NOTE: Short packets don't break the assumption that 213 * we leave the very last(unused) TD behind. 214 */ 215 ohci_batch->usb_batch->transfered_size 216 -= td_remain_size(ohci_batch->tds[i]); 217 } else { 217 218 usb_log_debug("Batch %p found error TD(%zu):%08x.\n", 218 219 ohci_batch->usb_batch, i, … … 231 232 232 233 /* Check TD assumption */ 233 const uint32_t pa = 234 addr_to_phys(ohci_batch->tds[leave_td]); 235 assert((ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK) 236 == pa); 237 234 assert(ed_head_td(ohci_batch->ed) == 235 addr_to_phys(ohci_batch->tds[leave_td])); 236 237 /* Set tail to the same TD */ 238 238 ed_set_tail_td(ohci_batch->ed, 239 239 ohci_batch->tds[leave_td]); 240 240 241 241 /* Clear possible ED HALT */ 242 ohci_batch->ed->td_head &= ~ED_TDHEAD_HALTED_FLAG;242 ed_clear_halt(ohci_batch->ed); 243 243 break; 244 244 } … … 253 253 254 254 /* Make sure that we are leaving the right TD behind */ 255 const uint32_t pa = addr_to_phys(ohci_ep->td); 256 assert(pa == (ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK)); 257 assert(pa == (ohci_batch->ed->td_tail & ED_TDTAIL_PTR_MASK)); 255 assert(addr_to_phys(ohci_ep->td) == ed_head_td(ohci_batch->ed)); 256 assert(addr_to_phys(ohci_ep->td) == ed_tail_td(ohci_batch->ed)); 257 // const uint32_t pa = addr_to_phys(ohci_ep->td); 258 // assert(pa == (ohci_batch->ed->td_head & ED_TDHEAD_PTR_MASK)); 259 // assert(pa == (ohci_batch->ed->td_tail & ED_TDTAIL_PTR_MASK)); 258 260 259 261 return true; -
uspace/drv/bus/usb/ohci/ohci_regs.h
r087768f r0a208110 35 35 #define DRV_OHCI_OHCI_REGS_H 36 36 #include <sys/types.h> 37 #include <byteorder.h> 38 39 40 /* assume OHCI regs are le */ 41 #define host2ohci_reg(value) host2uint32_t_le(value) 42 #define ohci_reg2host(value) uint32_t_le2host(value) 43 44 #define OHCI_WR(reg, val) reg = host2uint32_t_le(val) 45 #define OHCI_RD(reg) uint32_t_le2host(reg) 46 #define OHCI_SET(reg, val) reg |= host2uint32_t_le(val) 47 #define OHCI_CLR(reg, val) reg &= host2uint32_t_le(~val) 48 37 49 38 50 #define LEGACY_REGS_OFFSET 0x100 … … 42 54 const ioport32_t revision; 43 55 #define R_REVISION_MASK (0x3f) 44 #define R_REVISION_SHIFT (0)45 56 #define R_LEGACY_FLAG (0x80) 46 57 47 58 ioport32_t control; 48 #define C_CBSR_MASK (0x3)/* Control-bulk service ratio */59 /* Control-bulk service ratio */ 49 60 #define C_CBSR_1_1 (0x0) 50 61 #define C_CBSR_1_2 (0x1) 51 62 #define C_CBSR_1_3 (0x2) 52 63 #define C_CBSR_1_4 (0x3) 53 #define C_CBSR_SHIFT (0) 64 #define C_CBSR_MASK (0x3) 65 #define C_CBSR_SHIFT 0 54 66 55 67 #define C_PLE (1 << 2) /* Periodic list enable */ … … 58 70 #define C_BLE (1 << 5) /* Bulk list enable */ 59 71 60 #define C_HCFS_MASK (0x3)/* Host controller functional state */72 /* Host controller functional state */ 61 73 #define C_HCFS_RESET (0x0) 62 74 #define C_HCFS_RESUME (0x1) 63 75 #define C_HCFS_OPERATIONAL (0x2) 64 76 #define C_HCFS_SUSPEND (0x3) 65 #define C_HCFS_SHIFT (6) 66 67 #define C_HCFS_GET(reg) \ 68 ((reg >> C_HCFS_SHIFT) & C_HCFS_MASK) 69 #define C_HCFS_SET(reg, hcfs_state) \ 77 #define C_HCFS_GET(reg) ((OHCI_RD(reg) >> 6) & 0x3) 78 #define C_HCFS_SET(reg, value) \ 70 79 do { \ 71 reg = (reg & ~(C_HCFS_MASK << C_HCFS_SHIFT)) \ 72 | ((hcfs_state & C_HCFS_MASK) << C_HCFS_SHIFT); \ 80 uint32_t r = OHCI_RD(reg); \ 81 r &= ~(0x3 << 6); \ 82 r |= (value & 0x3) << 6; \ 83 OHCI_WR(reg, r); \ 73 84 } while (0) 74 85 75 76 #define C_IR (1 << 8) /* Interrupt routing, make sure it's 0 */ 77 #define C_RWC (1 << 9) /* Remote wakeup connected, host specific */ 86 #define C_IR (1 << 8) /* Interrupt routing, make sure it's 0 */ 87 #define C_RWC (1 << 9) /* Remote wakeup connected, host specific */ 78 88 #define C_RWE (1 << 10) /* Remote wakeup enable */ 79 89 … … 83 93 #define CS_BLF (1 << 2) /* Bulk list filled */ 84 94 #define CS_OCR (1 << 3) /* Ownership change request */ 95 #if 0 85 96 #define CS_SOC_MASK (0x3) /* Scheduling overrun count */ 86 97 #define CS_SOC_SHIFT (16) 98 #endif 87 99 88 100 /** Interupt enable/disable/status, … … 101 113 #define I_RHSC (1 << 6) /* Root hub status change */ 102 114 #define I_OC (1 << 30) /* Ownership change */ 103 #define I_MI (1 << 31) /* Master interrupt (a ll/any interrupts) */115 #define I_MI (1 << 31) /* Master interrupt (any/all) */ 104 116 105 117 /** HCCA pointer (see hw_struct hcca.h) */ … … 145 157 /** Remaining bit time in frame to start periodic transfers */ 146 158 ioport32_t periodic_start; 147 #define PS_PS_MASK (0x3fff) /* bit time when periodic get priority (0x3e67) */ 159 #define PS_MASK 0x3fff 160 #define PS_SHIFT 0 148 161 149 162 /** Threshold for starting LS transaction */ … … 153 166 /** The first root hub control register */ 154 167 ioport32_t rh_desc_a; 155 #define RHDA_NDS_MASK (0xff) /* Number of downstream ports, max 15 */ 156 #define RHDA_NDS_SHIFT (0) 157 #define RHDA_PSM_FLAG (1 << 8) /* Power switching mode: 0-global, 1-per port*/ 158 #define RHDA_NPS_FLAG (1 << 9) /* No power switch: 1-power on, 0-use PSM*/ 159 #define RHDA_DT_FLAG (1 << 10) /* 1-Compound device, must be 0 */ 160 #define RHDA_OCPM_FLAG (1 << 11) /* Over-current mode: 0-global, 1-per port */ 161 #define RHDA_NOCP_FLAG (1 << 12) /* OC control: 0-use OCPM, 1-OC off */ 162 #define RHDA_POTPGT_MASK (0xff) /* Power on to power good time */ 163 #define RHDA_POTPGT_SHIFT (24) 168 /** Number of downstream ports, max 15 */ 169 #define RHDA_NDS_MASK (0xff) 170 /** Power switching mode: 0-global, 1-per port*/ 171 #define RHDA_PSM_FLAG (1 << 8) 172 /** No power switch: 1-power on, 0-use PSM*/ 173 #define RHDA_NPS_FLAG (1 << 9) 174 /** 1-Compound device, must be 0 */ 175 #define RHDA_DT_FLAG (1 << 10) 176 /** Over-current mode: 0-global, 1-per port */ 177 #define RHDA_OCPM_FLAG (1 << 11) 178 /** OC control: 0-use OCPM, 1-OC off */ 179 #define RHDA_NOCP_FLAG (1 << 12) 180 /** Power on to power good time */ 181 #define RHDA_POTPGT_SHIFT 24 164 182 165 183 /** The other root hub control register */ 166 184 ioport32_t rh_desc_b; 167 #define RHDB_DR_MASK (0xffff) /* Device removable mask */ 168 #define RHDB_DR_SHIFT (0) 169 #define RHDB_PCC_MASK (0xffff) /* Power control mask */ 170 #define RHDB_PCC_SHIFT (16) 171 172 /* Port device removable status */ 173 #define RHDB_DR_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 174 /* Port power control status: 1-per port power control, 0-global power switch */ 175 #define RHDB_PPC_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 185 /** Device removable mask */ 186 #define RHDB_DR_SHIFT 0 187 #define RHDB_DR_MASK 0xffff 188 /** Power control mask */ 189 #define RHDB_PCC_MASK (0xffff) 190 #define RHDB_PCC_SHIFT 16 176 191 177 192 /** Root hub status register */ 178 193 ioport32_t rh_status; 179 #define RHS_LPS_FLAG (1 << 0)/* read: 0, 180 * write: 0-no effect, 181 * 1-turn off port power for ports 182 * specified in PPCM(RHDB), or all ports, 183 * if power is set globally */ 194 /* read: 0, 195 * write: 0-no effect, 196 * 1-turn off port power for ports 197 * specified in PPCM(RHDB), or all ports, 198 * if power is set globally */ 199 #define RHS_LPS_FLAG (1 << 0) 184 200 #define RHS_CLEAR_GLOBAL_POWER RHS_LPS_FLAG /* synonym for the above */ 185 #define RHS_OCI_FLAG (1 << 1)/* Over-current indicator, if per-port: 0 */ 186 #define RHS_DRWE_FLAG (1 << 15)/* read: 0-connect status change does not wake HC 187 * 1-connect status change wakes HC 188 * write: 1-set DRWE, 0-no effect */ 201 /** Over-current indicator, if per-port: 0 */ 202 #define RHS_OCI_FLAG (1 << 1) 203 204 /* read: 0-connect status change does not wake HC 205 * 1-connect status change wakes HC 206 * write: 1-set DRWE, 0-no effect */ 207 #define RHS_DRWE_FLAG (1 << 15) 189 208 #define RHS_SET_DRWE RHS_DRWE_FLAG 190 #define RHS_LPSC_FLAG (1 << 16)/* read: 0, 191 * write: 0-no effect 192 * 1-turn on port power for ports 193 * specified in PPCM(RHDB), or all ports, 194 * if power is set globally */ 209 /* read: 0, 210 * write: 0-no effect 211 * 1-turn on port power for ports 212 * specified in PPCM(RHDB), or all ports, 213 * if power is set globally */ 214 #define RHS_LPSC_FLAG (1 << 16) 195 215 #define RHS_SET_GLOBAL_POWER RHS_LPSC_FLAG /* synonym for the above */ 196 #define RHS_OCIC_FLAG (1 << 17)/* Over-current indicator change */ 216 /** Over-current change indicator*/ 217 #define RHS_OCIC_FLAG (1 << 17) 197 218 #define RHS_CLEAR_DRWE (1 << 31) 198 219 … … 200 221 ioport32_t rh_port_status[]; 201 222 #define RHPS_CCS_FLAG (1 << 0) /* r: current connect status, 202 * w: 1-clear port enable, 0-nothing*/223 * w: 1-clear port enable, 0-N/S*/ 203 224 #define RHPS_CLEAR_PORT_ENABLE RHPS_CCS_FLAG 204 225 #define RHPS_PES_FLAG (1 << 1) /* r: port enable status 205 * w: 1-set port enable, 0-nothing*/226 * w: 1-set port enable, 0-N/S */ 206 227 #define RHPS_SET_PORT_ENABLE RHPS_PES_FLAG 207 228 #define RHPS_PSS_FLAG (1 << 2) /* r: port suspend status 208 * w: 1-set port suspend, 0-nothing*/229 * w: 1-set port suspend, 0-N/S */ 209 230 #define RHPS_SET_PORT_SUSPEND RHPS_PSS_FLAG 210 #define RHPS_POCI_FLAG (1 << 3) /* r: port over-current (if reports are per-port 211 * w: 1-clear port suspend (start resume 212 * if suspened) 213 * 0-nothing */ 231 #define RHPS_POCI_FLAG (1 << 3) /* r: port over-current 232 * (if reports are per-port 233 * w: 1-clear port suspend 234 * (start resume if suspened) 235 * 0-nothing */ 214 236 #define RHPS_CLEAR_PORT_SUSPEND RHPS_POCI_FLAG 215 237 #define RHPS_PRS_FLAG (1 << 4) /* r: port reset status 216 * w: 1-set port reset, 0-nothing*/238 * w: 1-set port reset, 0-N/S */ 217 239 #define RHPS_SET_PORT_RESET RHPS_PRS_FLAG 218 240 #define RHPS_PPS_FLAG (1 << 8) /* r: port power status 219 * w: 1-set port power, 0-nothing*/241 * w: 1-set port power, 0-N/S */ 220 242 #define RHPS_SET_PORT_POWER RHPS_PPS_FLAG 221 243 #define RHPS_LSDA_FLAG (1 << 9) /* r: low speed device attached 222 * w: 1-clear port power, 0-nothing*/244 * w: 1-clear port power, 0-N/S*/ 223 245 #define RHPS_CLEAR_PORT_POWER RHPS_LSDA_FLAG 224 #define RHPS_CSC_FLAG (1 << 16) /* connect status change W rite-Clean*/246 #define RHPS_CSC_FLAG (1 << 16) /* connect status change WC */ 225 247 #define RHPS_PESC_FLAG (1 << 17) /* port enable status change WC */ 226 248 #define RHPS_PSSC_FLAG (1 << 18) /* port suspend status change WC */ 227 249 #define RHPS_OCIC_FLAG (1 << 19) /* port over-current change WC */ 228 250 #define RHPS_PRSC_FLAG (1 << 20) /* port reset status change WC */ 229 #define RHPS_CHANGE_WC_MASK 0x1f0000251 #define RHPS_CHANGE_WC_MASK (0x1f0000) 230 252 } __attribute__((packed)) ohci_regs_t; 231 253 #endif -
uspace/drv/bus/usb/ohci/root_hub.c
r087768f r0a208110 33 33 */ 34 34 #include <assert.h> 35 #include <byteorder.h> 35 36 #include <errno.h> 36 37 #include <str_error.h> 37 38 #include <fibril_synch.h> 38 39 40 #include <usb/usb.h> 39 41 #include <usb/debug.h> 40 42 #include <usb/dev/request.h> 41 43 #include <usb/classes/hub.h> 42 44 43 #include "root_hub.h"44 45 #include <usb/classes/classes.h> 45 46 #include <usb/classes/hub.h> 46 47 #include <usb/dev/driver.h> 47 48 #include "ohci_regs.h" 49 #include "root_hub.h" 48 50 49 51 /** … … 122 124 { 123 125 assert(request); 126 usb_log_debug("Sending interrupt vector(%zu) %hhx:%hhx.\n", 127 size, ((uint8_t*)&mask)[0], ((uint8_t*)&mask)[1]); 124 128 usb_transfer_batch_finish_error(request, &mask, size, EOK); 125 129 usb_transfer_batch_destroy(request); … … 150 154 151 155 instance->registers = regs; 152 instance->port_count = 153 (instance->registers->rh_desc_a >> RHDA_NDS_SHIFT) & RHDA_NDS_MASK;156 instance->port_count = OHCI_RD(regs->rh_desc_a) & RHDA_NDS_MASK; 157 usb_log_debug2("rh_desc_a: %x.\n", OHCI_RD(regs->rh_desc_a)); 154 158 if (instance->port_count > 15) { 155 159 usb_log_warning("OHCI specification does not allow more than 15" … … 163 167 164 168 #if defined OHCI_POWER_SWITCH_no 169 usb_log_debug("OHCI rh: Set power mode to no power switching.\n"); 165 170 /* Set port power mode to no power-switching. (always on) */ 166 instance->registers->rh_desc_a |= RHDA_NPS_FLAG;171 OHCI_SET(regs->rh_desc_a, RHDA_NPS_FLAG); 167 172 168 173 /* Set to no over-current reporting */ 169 instance->registers->rh_desc_a |= RHDA_NOCP_FLAG;174 OHCI_SET(regs->rh_desc_a, RHDA_NOCP_FLAG); 170 175 171 176 #elif defined OHCI_POWER_SWITCH_ganged 172 /* Set port power mode to no ganged power-switching. */ 173 instance->registers->rh_desc_a &= ~RHDA_NPS_FLAG; 174 instance->registers->rh_desc_a &= ~RHDA_PSM_FLAG; 175 instance->registers->rh_status = RHS_CLEAR_GLOBAL_POWER; 177 usb_log_debug("OHCI rh: Set power mode to ganged power switching.\n"); 178 /* Set port power mode to ganged power-switching. */ 179 OHCI_CLR(regs->rh_desc_a, RHDA_NPS_FLAG); 180 OHCI_CLR(regs->rh_desc_a, RHDA_PSM_FLAG); 181 182 /* Turn off power (hub driver will turn this back on)*/ 183 OHCI_WR(regs->rh_status, RHS_CLEAR_GLOBAL_POWER); 176 184 177 185 /* Set to global over-current */ 178 instance->registers->rh_desc_a &= ~RHDA_NOCP_FLAG;179 instance->registers->rh_desc_a &= ~RHDA_OCPM_FLAG;186 OHCI_CLR(regs->rh_desc_a, RHDA_NOCP_FLAG); 187 OHCI_CLR(regs->rh_desc_a, RHDA_OCPM_FLAG); 180 188 #else 181 /* Set port power mode to no per port power-switching. */ 182 instance->registers->rh_desc_a &= ~RHDA_NPS_FLAG; 183 instance->registers->rh_desc_a |= RHDA_PSM_FLAG; 189 usb_log_debug("OHCI rh: Set power mode to per-port power switching.\n"); 190 /* Set port power mode to per port power-switching. */ 191 OHCI_CLR(regs->rh_desc_a, RHDA_NPS_FLAG); 192 OHCI_SET(regs->rh_desc_a, RHDA_PSM_FLAG); 184 193 185 194 /* Control all ports by global switch and turn them off */ 186 instance->registers->rh_desc_b &= (RHDB_PCC_MASK << RHDB_PCC_SHIFT);187 instance->registers->rh_status = RHS_CLEAR_GLOBAL_POWER;195 OHCI_CLR(regs->rh_desc_b, RHDB_PCC_MASK << RHDB_PCC_SHIFT); 196 OHCI_WR(regs->rh_status, RHS_CLEAR_GLOBAL_POWER); 188 197 189 198 /* Return control to per port state */ 190 instance->registers->rh_desc_b |= 191 ((1 << (instance->port_count + 1)) - 1) << RHDB_PCC_SHIFT; 199 OHCI_SET(regs->rh_desc_b, RHDB_PCC_MASK << RHDB_PCC_SHIFT); 192 200 193 201 /* Set per port over-current */ 194 instance->registers->rh_desc_a &= ~RHDA_NOCP_FLAG;195 instance->registers->rh_desc_a |= RHDA_OCPM_FLAG;202 OHCI_CLR(regs->rh_desc_a, RHDA_NOCP_FLAG); 203 OHCI_SET(regs->rh_desc_a, RHDA_OCPM_FLAG); 196 204 #endif 197 205 … … 226 234 fibril_mutex_lock(&instance->guard); 227 235 assert(instance->unfinished_interrupt_transfer == NULL); 228 uint16_t mask = create_interrupt_mask(instance);236 const uint16_t mask = create_interrupt_mask(instance); 229 237 if (mask == 0) { 230 usb_log_debug("No changes ...\n");238 usb_log_debug("No changes(%hx)...\n", mask); 231 239 instance->unfinished_interrupt_transfer = request; 232 240 } else { … … 257 265 if (instance->unfinished_interrupt_transfer) { 258 266 usb_log_debug("Finalizing interrupt transfer\n"); 259 uint16_t mask = create_interrupt_mask(instance);267 const uint16_t mask = create_interrupt_mask(instance); 260 268 interrupt_request(instance->unfinished_interrupt_transfer, 261 269 mask, instance->interrupt_mask_size); … … 282 290 instance->hub_descriptor_size = size; 283 291 284 uint32_t hub_desc = instance->registers->rh_desc_a;285 uint32_t port_desc = instance->registers->rh_desc_b;292 const uint32_t hub_desc = OHCI_RD(instance->registers->rh_desc_a); 293 const uint32_t port_desc = OHCI_RD(instance->registers->rh_desc_b); 286 294 287 295 /* bDescLength */ … … 305 313 instance->descriptors.hub[4] = 0; 306 314 /* bPwrOn2PwrGood */ 307 instance->descriptors.hub[5] = 308 (hub_desc >> RHDA_POTPGT_SHIFT) & RHDA_POTPGT_MASK; 315 instance->descriptors.hub[5] = hub_desc >> RHDA_POTPGT_SHIFT; 309 316 /* bHubContrCurrent, root hubs don't need no power. */ 310 317 instance->descriptors.hub[6] = 0; 311 318 312 319 /* Device Removable and some legacy 1.0 stuff*/ 313 instance->descriptors.hub[7] = 314 (port_desc >> RHDB_DR_SHIFT) & RHDB_DR_MASK & 0xff; 320 instance->descriptors.hub[7] = (port_desc >> RHDB_DR_SHIFT) & 0xff; 315 321 instance->descriptors.hub[8] = 0xff; 316 322 if (instance->interrupt_mask_size == 2) { 317 323 instance->descriptors.hub[8] = 318 (port_desc >> RHDB_DR_SHIFT) & RHDB_DR_MASK>> 8;324 (port_desc >> RHDB_DR_SHIFT) >> 8; 319 325 instance->descriptors.hub[9] = 0xff; 320 326 instance->descriptors.hub[10] = 0xff; … … 341 347 instance->interrupt_mask_size; 342 348 343 instance->descriptors.configuration.total_length = 349 instance->descriptors.configuration.total_length = uint16_host2usb( 344 350 sizeof(usb_standard_configuration_descriptor_t) + 345 351 sizeof(usb_standard_endpoint_descriptor_t) + 346 352 sizeof(usb_standard_interface_descriptor_t) + 347 instance->hub_descriptor_size ;353 instance->hub_descriptor_size); 348 354 } 349 355 /*----------------------------------------------------------------------------*/ … … 364 370 365 371 /* Only local power source change and over-current change can happen */ 366 if (instance->registers->rh_status & (RHS_LPSC_FLAG | RHS_OCIC_FLAG)) { 372 if (OHCI_RD(instance->registers->rh_status) 373 & (RHS_LPSC_FLAG | RHS_OCIC_FLAG)) { 367 374 mask |= 1; 368 375 } 369 376 for (size_t port = 1; port <= instance->port_count; ++port) { 370 377 /* Write-clean bits are those that indicate change */ 371 if (RHPS_CHANGE_WC_MASK 372 & instance->registers->rh_port_status[port - 1]) { 373 378 if (OHCI_RD(instance->registers->rh_port_status[port - 1]) 379 & RHPS_CHANGE_WC_MASK) { 374 380 mask |= (1 << port); 375 381 } 376 382 } 377 /* USB is little endian */378 return host2uint32_t_le(mask);383 usb_log_debug2("OHCI root hub interrupt mask: %hx.\n", mask); 384 return uint16_host2usb(mask); 379 385 } 380 386 /*----------------------------------------------------------------------------*/ … … 396 402 usb_device_request_setup_packet_t *request_packet = 397 403 (usb_device_request_setup_packet_t*)request->setup_buffer; 404 405 const uint16_t index = uint16_usb2host(request_packet->index); 398 406 399 407 switch (request_packet->request_type) … … 406 414 TRANSFER_END(request, EOVERFLOW); 407 415 } else { 408 uint32_t data = instance->registers->rh_status & 409 (RHS_LPS_FLAG | RHS_LPSC_FLAG 410 | RHS_OCI_FLAG | RHS_OCIC_FLAG); 416 const uint32_t data = 417 OHCI_RD(instance->registers->rh_status) & 418 (RHS_LPS_FLAG | RHS_LPSC_FLAG 419 | RHS_OCI_FLAG | RHS_OCIC_FLAG); 411 420 TRANSFER_END_DATA(request, &data, sizeof(data)); 412 421 } … … 420 429 TRANSFER_END(request, EOVERFLOW); 421 430 } else { 422 unsigned port = request_packet->index;431 const unsigned port = index; 423 432 if (port < 1 || port > instance->port_count) 424 433 TRANSFER_END(request, EINVAL); 425 426 uint32_t data = 427 instance->registers->rh_port_status[port - 1]; 434 /* Register format matches the format of port status 435 * field */ 436 const uint32_t data = uint32_usb2host(OHCI_RD( 437 instance->registers->rh_port_status[port - 1])); 428 438 TRANSFER_END_DATA(request, &data, sizeof(data)); 429 439 } … … 434 444 TRANSFER_END(request, EOVERFLOW); 435 445 } else { 436 uint16_t data =446 const uint16_t data = 437 447 uint16_host2usb(USB_DEVICE_STATUS_SELF_POWERED); 438 448 TRANSFER_END_DATA(request, &data, sizeof(data)); … … 441 451 case SETUP_REQUEST_TO_HOST(USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_INTERFACE): 442 452 /* Hubs are allowed to have only one interface */ 443 if ( request_packet->index != 0)453 if (index != 0) 444 454 TRANSFER_END(request, EINVAL); 445 455 /* Fall through, as the answer will be the same: 0x0000 */ 446 456 case SETUP_REQUEST_TO_HOST(USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_ENDPOINT): 447 457 /* Endpoint 0 (default control) and 1 (interrupt) */ 448 if ( request_packet->index >= 2)458 if (index >= 2) 449 459 TRANSFER_END(request, EINVAL); 450 460 … … 455 465 } else { 456 466 /* Endpoints are OK. (We don't halt) */ 457 uint16_t data = 0;467 const uint16_t data = 0; 458 468 TRANSFER_END_DATA(request, &data, sizeof(data)); 459 469 } … … 482 492 usb_device_request_setup_packet_t *setup_request = 483 493 (usb_device_request_setup_packet_t *) request->setup_buffer; 484 uint16_t setup_request_value = setup_request->value_high; 485 switch (setup_request_value) 494 /* "The wValue field specifies the descriptor type in the high byte 495 * and the descriptor index in the low byte (refer to Table 9-5)." */ 496 const int desc_type = uint16_usb2host(setup_request->value) >> 8; 497 switch (desc_type) 486 498 { 487 499 case USB_DESCTYPE_HUB: … … 530 542 setup_request->value, 531 543 setup_request->request_type, setup_request->request, 532 setup_request_value, setup_request->index,544 desc_type, setup_request->index, 533 545 setup_request->length); 534 546 TRANSFER_END(request, EINVAL); … … 556 568 switch (feature) 557 569 { 558 case USB_HUB_FEATURE_PORT_POWER: //8 559 /* No power switching */ 560 if (instance->registers->rh_desc_a & RHDA_NPS_FLAG) 561 return EOK; 562 /* Ganged power switching */ 563 if (!(instance->registers->rh_desc_a & RHDA_PSM_FLAG)) { 564 instance->registers->rh_status = RHS_SET_GLOBAL_POWER; 565 return EOK; 570 case USB_HUB_FEATURE_PORT_POWER: /*8*/ 571 { 572 const uint32_t rhda = 573 OHCI_RD(instance->registers->rh_desc_a); 574 /* No power switching */ 575 if (rhda & RHDA_NPS_FLAG) 576 return EOK; 577 /* Ganged power switching, one port powers all */ 578 if (!(rhda & RHDA_PSM_FLAG)) { 579 OHCI_WR(instance->registers->rh_status, 580 RHS_SET_GLOBAL_POWER); 581 return EOK; 582 } 566 583 } 567 case USB_HUB_FEATURE_PORT_ENABLE: //1 568 case USB_HUB_FEATURE_PORT_SUSPEND: //2 569 case USB_HUB_FEATURE_PORT_RESET: //4 570 /* Nice thing is that these shifts correspond to the position 571 * of control bits in register */ 572 instance->registers->rh_port_status[port - 1] = (1 << feature); 584 /* Fall through */ 585 case USB_HUB_FEATURE_PORT_ENABLE: /*1*/ 586 case USB_HUB_FEATURE_PORT_SUSPEND: /*2*/ 587 case USB_HUB_FEATURE_PORT_RESET: /*4*/ 588 usb_log_debug2("Setting port POWER, ENABLE, SUSPEND or RESET " 589 "on port %zu.\n", port); 590 OHCI_WR(instance->registers->rh_port_status[port - 1], 591 1 << feature); 573 592 return EOK; 574 593 default: … … 596 615 switch (feature) 597 616 { 598 case USB_HUB_FEATURE_PORT_POWER: //8 599 /* No power switching */ 600 if (instance->registers->rh_desc_a & RHDA_NPS_FLAG) 601 return ENOTSUP; 602 /* Ganged power switching */ 603 if (!(instance->registers->rh_desc_a & RHDA_PSM_FLAG)) { 604 instance->registers->rh_status = RHS_CLEAR_GLOBAL_POWER; 617 case USB_HUB_FEATURE_PORT_POWER: /*8*/ 618 { 619 const uint32_t rhda = 620 OHCI_RD(instance->registers->rh_desc_a); 621 /* No power switching */ 622 if (rhda & RHDA_NPS_FLAG) 623 return ENOTSUP; 624 /* Ganged power switching, one port powers all */ 625 if (!(rhda & RHDA_PSM_FLAG)) { 626 OHCI_WR(instance->registers->rh_status, 627 RHS_CLEAR_GLOBAL_POWER); 628 return EOK; 629 } 630 OHCI_WR(instance->registers->rh_port_status[port - 1], 631 RHPS_CLEAR_PORT_POWER); 605 632 return EOK; 606 633 } 607 instance->registers->rh_port_status[port - 1] = 608 RHPS_CLEAR_PORT_POWER; 634 635 case USB_HUB_FEATURE_PORT_ENABLE: /*1*/ 636 OHCI_WR(instance->registers->rh_port_status[port - 1], 637 RHPS_CLEAR_PORT_ENABLE); 609 638 return EOK; 610 639 611 case USB_HUB_FEATURE_PORT_ ENABLE: //1612 instance->registers->rh_port_status[port - 1] =613 RHPS_CLEAR_PORT_ENABLE;640 case USB_HUB_FEATURE_PORT_SUSPEND: /*2*/ 641 OHCI_WR(instance->registers->rh_port_status[port - 1], 642 RHPS_CLEAR_PORT_SUSPEND); 614 643 return EOK; 615 644 616 case USB_HUB_FEATURE_PORT_SUSPEND: //2 617 instance->registers->rh_port_status[port - 1] = 618 RHPS_CLEAR_PORT_SUSPEND; 619 return EOK; 620 621 case USB_HUB_FEATURE_C_PORT_CONNECTION: //16 622 case USB_HUB_FEATURE_C_PORT_ENABLE: //17 623 case USB_HUB_FEATURE_C_PORT_SUSPEND: //18 624 case USB_HUB_FEATURE_C_PORT_OVER_CURRENT: //19 625 case USB_HUB_FEATURE_C_PORT_RESET: //20 626 /* Nice thing is that these shifts correspond to the position 627 * of control bits in register */ 628 instance->registers->rh_port_status[port - 1] = (1 << feature); 645 case USB_HUB_FEATURE_C_PORT_CONNECTION: /*16*/ 646 case USB_HUB_FEATURE_C_PORT_ENABLE: /*17*/ 647 case USB_HUB_FEATURE_C_PORT_SUSPEND: /*18*/ 648 case USB_HUB_FEATURE_C_PORT_OVER_CURRENT: /*19*/ 649 case USB_HUB_FEATURE_C_PORT_RESET: /*20*/ 650 usb_log_debug2("Clearing port C_CONNECTION, C_ENABLE, " 651 "C_SUSPEND, C_OC or C_RESET on port %zu.\n", port); 652 /* Bit offsets correspond to the feature number */ 653 OHCI_WR(instance->registers->rh_port_status[port - 1], 654 1 << feature); 629 655 return EOK; 630 656 … … 654 680 case USB_HUB_REQ_TYPE_SET_PORT_FEATURE: 655 681 usb_log_debug("USB_HUB_REQ_TYPE_SET_PORT_FEATURE\n"); 656 int ret = set_feature_port(instance,682 const int ret = set_feature_port(instance, 657 683 setup_request->value, setup_request->index); 658 684 TRANSFER_END(request, ret); … … 693 719 case USB_HUB_REQ_TYPE_CLEAR_PORT_FEATURE: 694 720 usb_log_debug("USB_HUB_REQ_TYPE_CLEAR_PORT_FEATURE\n"); 695 int ret = clear_feature_port(instance,721 const int ret = clear_feature_port(instance, 696 722 setup_request->value, setup_request->index); 697 723 TRANSFER_END(request, ret); … … 706 732 * as root hubs do not support local power status feature. 707 733 * (OHCI pg. 127) */ 708 if (setup_request->value == USB_HUB_FEATURE_C_HUB_OVER_CURRENT) { 709 instance->registers->rh_status = RHS_OCIC_FLAG; 734 if (uint16_usb2host(setup_request->value) 735 == USB_HUB_FEATURE_C_HUB_OVER_CURRENT) { 736 OHCI_WR(instance->registers->rh_status, RHS_OCIC_FLAG); 710 737 TRANSFER_END(request, EOK); 711 738 } … … 771 798 if (request->buffer_size == 0) 772 799 TRANSFER_END(request, EOVERFLOW); 773 uint8_t config = 1;800 const uint8_t config = 1; 774 801 TRANSFER_END_DATA(request, &config, sizeof(config)); 775 802 … … 790 817 TRANSFER_END(request, EINVAL); 791 818 792 instance->address = setup_request->value;819 instance->address = uint16_usb2host(setup_request->value); 793 820 TRANSFER_END(request, EOK); 794 821 795 822 case USB_DEVREQ_SET_CONFIGURATION: 796 823 usb_log_debug("USB_DEVREQ_SET_CONFIGURATION: %u\n", 797 setup_request->value);824 uint16_usb2host(setup_request->value)); 798 825 /* We have only one configuration, it's number is 1 */ 799 826 if (uint16_usb2host(setup_request->value) != 1) -
uspace/drv/bus/usb/usbhid/kbd/kbddev.c
r087768f r0a208110 71 71 #include "../usbhid.h" 72 72 73 static void default_connection_handler(ddf_fun_t *, ipc_callid_t, ipc_call_t *); 74 static ddf_dev_ops_t kbdops = { .default_handler = default_connection_handler }; 73 75 /*----------------------------------------------------------------------------*/ 74 76 … … 187 189 break; 188 190 } 189 if (kbd_dev->c onsole_sess == NULL) {190 kbd_dev->c onsole_sess = sess;191 if (kbd_dev->client_sess == NULL) { 192 kbd_dev->client_sess = sess; 191 193 usb_log_debug("%s: OK\n", __FUNCTION__); 192 194 async_answer_0(icallid, EOK); … … 292 294 { 293 295 usb_log_debug2("Sending kbdev event %d/%d to the console\n", type, key); 294 if (kbd_dev->c onsole_sess == NULL) {296 if (kbd_dev->client_sess == NULL) { 295 297 usb_log_warning( 296 298 "Connection to console not ready, key discarded.\n"); … … 298 300 } 299 301 300 async_exch_t *exch = async_exchange_begin(kbd_dev->c onsole_sess);302 async_exch_t *exch = async_exchange_begin(kbd_dev->client_sess); 301 303 if (exch != NULL) { 302 304 async_msg_2(exch, KBDEV_EVENT, type, key); … … 499 501 /* Store the initialized HID device and HID ops 500 502 * to the DDF function. */ 501 fun->ops = &kbd _dev->ops;503 fun->ops = &kbdops; 502 504 fun->driver_data = kbd_dev; 503 505 … … 576 578 fibril_mutex_initialize(&kbd_dev->repeat_mtx); 577 579 kbd_dev->initialized = USB_KBD_STATUS_UNINITIALIZED; 578 kbd_dev->ops.default_handler = default_connection_handler;579 580 580 581 /* Store link to HID device */ … … 737 738 738 739 /* Hangup session to the console. */ 739 if (kbd_dev->c onsole_sess)740 async_hangup(kbd_dev->c onsole_sess);740 if (kbd_dev->client_sess) 741 async_hangup(kbd_dev->client_sess); 741 742 742 743 //assert(!fibril_mutex_is_locked((*kbd_dev)->repeat_mtx)); -
uspace/drv/bus/usb/usbhid/kbd/kbddev.h
r087768f r0a208110 82 82 unsigned lock_keys; 83 83 84 /** IPC session to the console device (for sending key events). */ 85 async_sess_t *console_sess; 86 87 /** @todo What is this actually? */ 88 ddf_dev_ops_t ops; 84 /** IPC session to client (for sending key events). */ 85 async_sess_t *client_sess; 89 86 90 87 /** Information for auto-repeat of keys. */ -
uspace/drv/bus/usb/usbhid/mouse/mousedev.c
r087768f r0a208110 54 54 #define NAME "mouse" 55 55 56 /*----------------------------------------------------------------------------*/ 57 56 static void default_connection_handler(ddf_fun_t *, ipc_callid_t, ipc_call_t *); 57 58 static ddf_dev_ops_t ops = { .default_handler = default_connection_handler }; 59 60 /*----------------------------------------------------------------------------*/ 58 61 const usb_endpoint_description_t usb_hid_mouse_poll_endpoint_description = { 59 62 .transfer_type = USB_TRANSFER_INTERRUPT, … … 221 224 assert(index < mouse_dev->buttons_count); 222 225 223 if (mouse_dev->buttons[index] == 0 && field->value != 0) {226 if (mouse_dev->buttons[index] != field->value) { 224 227 async_exch_t *exch = 225 228 async_exchange_begin(mouse_dev->mouse_sess); 226 229 if (exch != NULL) { 227 230 async_req_2_0(exch, MOUSEEV_BUTTON_EVENT, 228 field->usage, 1); 229 async_exchange_end(exch); 230 mouse_dev->buttons[index] = field->value; 231 } 232 233 } else if (mouse_dev->buttons[index] != 0 && field->value == 0) { 234 async_exch_t *exch = 235 async_exchange_begin(mouse_dev->mouse_sess); 236 if (exch != NULL) { 237 async_req_2_0(exch, MOUSEEV_BUTTON_EVENT, 238 field->usage, 0); 231 field->usage, (field->value != 0) ? 1 : 0); 239 232 async_exchange_end(exch); 240 233 mouse_dev->buttons[index] = field->value; … … 279 272 } 280 273 281 fun->ops = & mouse->ops;274 fun->ops = &ops; 282 275 fun->driver_data = mouse; 283 276 … … 302 295 } 303 296 mouse->mouse_fun = fun; 304 305 297 return EOK; 306 298 } … … 379 371 } 380 372 381 // set handler for incoming calls382 mouse_dev->ops.default_handler = default_connection_handler;383 384 373 // TODO: how to know if the device supports the request??? 385 374 usbhid_req_set_idle(&hid_dev->usb_dev->ctrl_pipe, -
uspace/drv/bus/usb/usbhid/mouse/mousedev.h
r087768f r0a208110 46 46 /** Container for USB mouse device. */ 47 47 typedef struct { 48 /** IPC session to cons ole (consumer). */48 /** IPC session to consumer. */ 49 49 async_sess_t *mouse_sess; 50 50 … … 53 53 size_t buttons_count; 54 54 55 ddf_dev_ops_t ops;56 55 /* DDF mouse function */ 57 56 ddf_fun_t *mouse_fun; -
uspace/drv/bus/usb/usbhub/port.c
r087768f r0a208110 353 353 .request = USB_HUB_REQUEST_GET_STATUS, 354 354 .value = 0, 355 .index = port->port_number,355 .index = uint16_host2usb(port->port_number), 356 356 .length = sizeof(usb_port_status_t), 357 357 }; -
uspace/drv/bus/usb/usbhub/status.h
r087768f r0a208110 42 42 * should not be accessed directly, use supplied getter/setter methods. 43 43 * 44 * For more information refer to table 11-15 in 45 * "Universal Serial Bus Specification Revision 1.1" 44 * For more information refer to tables 11-15 and 11-16 in 45 * "Universal Serial Bus Specification Revision 1.1" pages 274 and 277 46 * (290 and 293 in pdf) 46 47 * 47 48 */ -
uspace/drv/infrastructure/rootmac/rootmac.c
r087768f r0a208110 52 52 } rootmac_fun_t; 53 53 54 static hw_resource_t pci_conf_regs = { 55 .type = IO_RANGE, 56 .res.io_range = { 57 .address = 0xCF8, 58 .size = 8, 59 .endianness = LITTLE_ENDIAN 54 static hw_resource_t pci_conf_regs[] = { 55 { 56 .type = IO_RANGE, 57 .res.io_range = { 58 .address = 0xfec00000, 59 .size = 4, 60 .endianness = LITTLE_ENDIAN 61 } 62 }, 63 { 64 .type = IO_RANGE, 65 .res.io_range = { 66 .address = 0xfee00000, 67 .size = 4, 68 .endianness = LITTLE_ENDIAN 69 } 60 70 } 61 71 }; … … 63 73 static rootmac_fun_t pci_data = { 64 74 .hw_resources = { 65 1,66 &pci_conf_regs75 2, 76 pci_conf_regs 67 77 } 68 78 }; … … 128 138 { 129 139 /* Register functions */ 130 if (!rootmac_add_fun(dev, "pci0", " pangea_pci", &pci_data))140 if (!rootmac_add_fun(dev, "pci0", "intel_pci", &pci_data)) 131 141 ddf_msg(LVL_ERROR, "Failed to add functions for Mac platform."); 132 142 -
uspace/drv/infrastructure/rootpc/rootpc.c
r087768f r0a208110 77 77 }; 78 78 79 static hw_resource_t pci_conf_regs = { 80 .type = IO_RANGE, 81 .res.io_range = { 82 .address = 0xCF8, 83 .size = 8, 84 .endianness = LITTLE_ENDIAN 79 static hw_resource_t pci_conf_regs[] = { 80 { 81 .type = IO_RANGE, 82 .res.io_range = { 83 .address = 0xCF8, 84 .size = 4, 85 .endianness = LITTLE_ENDIAN 86 } 87 }, 88 { 89 .type = IO_RANGE, 90 .res.io_range = { 91 .address = 0xCFC, 92 .size = 4, 93 .endianness = LITTLE_ENDIAN 94 } 85 95 } 86 96 }; … … 88 98 static rootpc_fun_t pci_data = { 89 99 .hw_resources = { 90 1,91 &pci_conf_regs100 sizeof(pci_conf_regs)/sizeof(pci_conf_regs[0]), 101 pci_conf_regs 92 102 } 93 103 }; -
uspace/lib/drv/generic/remote_usb.c
r087768f r0a208110 56 56 { 57 57 if (!exch) 58 return E INVAL;58 return EBADMEM; 59 59 sysarg_t addr; 60 60 const int ret = async_req_1_1(exch, DEV_IFACE_ID(USB_DEV_IFACE), … … 75 75 { 76 76 if (!exch) 77 return E INVAL;77 return EBADMEM; 78 78 sysarg_t iface_no; 79 79 const int ret = async_req_1_1(exch, DEV_IFACE_ID(USB_DEV_IFACE), … … 92 92 { 93 93 if (!exch) 94 return E INVAL;94 return EBADMEM; 95 95 devman_handle_t h; 96 96 const int ret = async_req_1_1(exch, DEV_IFACE_ID(USB_DEV_IFACE), -
uspace/lib/drv/generic/remote_usbhc.c
r087768f r0a208110 165 165 { 166 166 if (!exch || !address) 167 return E INVAL;167 return EBADMEM; 168 168 sysarg_t new_address; 169 169 const int ret = async_req_4_1(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), … … 178 178 { 179 179 if (!exch) 180 return E INVAL;180 return EBADMEM; 181 181 return async_req_3_0(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), 182 182 IPC_M_USBHC_BIND_ADDRESS, address, handle); … … 187 187 { 188 188 if (!exch) 189 return E INVAL;189 return EBADMEM; 190 190 sysarg_t h; 191 191 const int ret = async_req_2_1(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), … … 199 199 { 200 200 if (!exch) 201 return E INVAL;201 return EBADMEM; 202 202 return async_req_2_0(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), 203 203 IPC_M_USBHC_RELEASE_ADDRESS, address); … … 209 209 { 210 210 if (!exch) 211 return E INVAL;211 return EBADMEM; 212 212 const usb_target_t target = 213 213 {{ .address = address, .endpoint = endpoint }}; … … 225 225 { 226 226 if (!exch) 227 return E INVAL;227 return EBADMEM; 228 228 return async_req_4_0(exch, DEV_IFACE_ID(USBHC_DEV_IFACE), 229 229 IPC_M_USBHC_UNREGISTER_ENDPOINT, address, endpoint, direction); … … 234 234 size_t *rec_size) 235 235 { 236 if (!exch) 237 return EBADMEM; 238 236 239 if (size == 0 && setup == 0) 237 240 return EOK; 238 241 239 if (!exch)240 return EINVAL;241 242 const usb_target_t target = 242 243 {{ .address = address, .endpoint = endpoint }}; … … 288 289 usb_endpoint_t endpoint, uint64_t setup, const void *data, size_t size) 289 290 { 291 if (!exch) 292 return EBADMEM; 293 290 294 if (size == 0 && setup == 0) 291 295 return EOK; 292 296 293 if (!exch)294 return EINVAL;295 297 const usb_target_t target = 296 298 {{ .address = address, .endpoint = endpoint }}; -
uspace/lib/usbdev/src/pipesinit.c
r087768f r0a208110 154 154 usb_endpoint_mapping_t *mapping, size_t mapping_count, 155 155 usb_standard_interface_descriptor_t *interface, 156 usb_standard_endpoint_descriptor_t *endpoint ,156 usb_standard_endpoint_descriptor_t *endpoint_desc, 157 157 usb_device_connection_t *wire) 158 158 { … … 163 163 164 164 /* Actual endpoint number is in bits 0..3 */ 165 const usb_endpoint_t ep_no = endpoint ->endpoint_address & 0x0F;165 const usb_endpoint_t ep_no = endpoint_desc->endpoint_address & 0x0F; 166 166 167 167 const usb_endpoint_description_t description = { 168 168 /* Endpoint direction is set by bit 7 */ 169 .direction = (endpoint ->endpoint_address & 128)169 .direction = (endpoint_desc->endpoint_address & 128) 170 170 ? USB_DIRECTION_IN : USB_DIRECTION_OUT, 171 171 /* Transfer type is in bits 0..2 and 172 172 * the enum values corresponds 1:1 */ 173 .transfer_type = endpoint ->attributes & 3,173 .transfer_type = endpoint_desc->attributes & 3, 174 174 175 175 /* Get interface characteristics. */ … … 194 194 195 195 int rc = usb_pipe_initialize(&ep_mapping->pipe, wire, 196 ep_no, description.transfer_type, endpoint->max_packet_size, 196 ep_no, description.transfer_type, 197 uint16_usb2host(endpoint_desc->max_packet_size), 197 198 description.direction); 198 199 if (rc != EOK) { … … 201 202 202 203 ep_mapping->present = true; 203 ep_mapping->descriptor = endpoint ;204 ep_mapping->descriptor = endpoint_desc; 204 205 ep_mapping->interface = interface; 205 206 -
uspace/lib/usbdev/src/request.c
r087768f r0a208110 114 114 * (in native endianness). 115 115 * @param actual_data_size Actual size of transfered data 116 * 116 * (in native endianness). 117 117 * @return Error code. 118 118 * @retval EBADMEM @p pipe is NULL. … … 147 147 | (request_type << 5) | recipient, 148 148 .request = request, 149 .value = value,150 .index = index,151 .length = (uint16_t) data_size,149 .value = uint16_host2usb(value), 150 .index = uint16_host2usb(index), 151 .length = uint16_host2usb(data_size), 152 152 }; 153 153 … … 375 375 usb_standard_device_descriptor_t descriptor_tmp; 376 376 int rc = usb_request_get_descriptor(pipe, 377 USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_DEVICE, 377 USB_REQUEST_TYPE_STANDARD, USB_REQUEST_RECIPIENT_DEVICE, 378 378 USB_DESCTYPE_DEVICE, 0, 0, 379 379 &descriptor_tmp, sizeof(descriptor_tmp), … … 435 435 /* Everything is okay, copy the descriptor. */ 436 436 memcpy(descriptor, &descriptor_tmp, sizeof(descriptor_tmp)); 437 438 437 return EOK; 439 438 } … … 495 494 return ENOENT; 496 495 } 497 if (bare_config.total_length < sizeof(bare_config)) { 496 497 const size_t total_length = uint16_usb2host(bare_config.total_length); 498 if (total_length < sizeof(bare_config)) { 498 499 return ELIMIT; 499 500 } 500 501 501 void *buffer = malloc( bare_config.total_length);502 void *buffer = malloc(total_length); 502 503 if (buffer == NULL) { 503 504 return ENOMEM; … … 506 507 size_t transferred = 0; 507 508 rc = usb_request_get_full_configuration_descriptor(pipe, index, 508 buffer, bare_config.total_length, &transferred);509 buffer, total_length, &transferred); 509 510 if (rc != EOK) { 510 511 free(buffer); … … 512 513 } 513 514 514 if (transferred != bare_config.total_length) {515 if (transferred != total_length) { 515 516 free(buffer); 516 517 return ELIMIT; … … 522 523 523 524 if (descriptor_size != NULL) { 524 *descriptor_size = bare_config.total_length;525 *descriptor_size = total_length; 525 526 } 526 527 -
uspace/lib/usbhid/src/hidreport.c
r087768f r0a208110 50 50 #include <usb/hid/hidreport.h> 51 51 52 static int usb_hid_get_report_descriptor(usb_device_t *dev, 52 static int usb_hid_get_report_descriptor(usb_device_t *dev, 53 53 uint8_t **report_desc, size_t *size) 54 54 { … … 69 69 * First nested descriptor of the configuration descriptor. 70 70 */ 71 const uint8_t *d = 72 usb_dp_get_nested_descriptor(&parser, &parser_data, 71 const uint8_t *d = 72 usb_dp_get_nested_descriptor(&parser, &parser_data, 73 73 dev->descriptors.configuration); 74 74 … … 78 78 int i = 0; 79 79 while (d != NULL && i < dev->interface_no) { 80 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 80 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 81 81 dev->descriptors.configuration, d); 82 82 ++i; … … 99 99 */ 100 100 while (d != NULL && *(d + 1) != USB_DESCTYPE_HID) { 101 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 101 d = usb_dp_get_sibling_descriptor(&parser, &parser_data, 102 102 iface_desc, d); 103 103 } … … 114 114 } 115 115 116 usb_standard_hid_descriptor_t *hid_desc = 116 usb_standard_hid_descriptor_t *hid_desc = 117 117 (usb_standard_hid_descriptor_t *)d; 118 118 119 uint16_t length = hid_desc->report_desc_info.length;119 uint16_t length = uint16_usb2host(hid_desc->report_desc_info.length); 120 120 size_t actual_size = 0; 121 121
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