Changeset 0bd4f56d in mainline

Timestamp:

2005-12-12T19:40:57Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c52ed6b

Parents:

6ed8b3a

Message:

Weaken the assumption, that PageMask register contains the right mask everytime.
As a result, TLB exceptions will explicitly write this register when filling TLB entry.
Adjust tlb_print() on mips32 to print PageMask as well.

File:

• arch/mips32/src/mm/tlb.c (modified) (6 diffs)

arch/mips32/src/mm/tlb.c

@@ -69 +69 @@
                 tlbwi();
         }
+
                 
         /*
@@ -118 +119 @@
                 cp0_entry_lo1_write(lo.value);
         }
+        cp0_pagemask_write(TLB_PAGE_MASK_16K);
         tlbwr();
 
@@ -186 +188 @@
         else
                 cp0_entry_lo1_write(lo.value);
+        cp0_pagemask_write(TLB_PAGE_MASK_16K);
         tlbwi();
 
@@ -261 +264 @@
         else
                 cp0_entry_lo1_write(lo.value);
+        cp0_pagemask_write(TLB_PAGE_MASK_16K);
         tlbwi();
 
@@ -369 +373 @@
 void tlb_print(void)
 {
+        page_mask_t mask;
         entry_lo_t lo0, lo1;
         entry_hi_t hi;
@@ -378 +383 @@
                 tlbr();
                 
+                mask.value = cp0_pagemask_read();
                 hi.value = cp0_entry_hi_read();
                 lo0.value = cp0_entry_lo0_read();
                 lo1.value = cp0_entry_lo1_read();
                 
-                printf("%d: asid=%d, vpn2=%d\tg[0]=%d, v[0]=%d, d[0]=%d, c[0]=%B, pfn[0]=%d\n"
-                       "\t\t\tg[1]=%d, v[1]=%d, d[1]=%d, c[1]=%B, pfn[1]=%d\n",
-                       i, hi.asid, hi.vpn2, lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn,
+                printf("%d: asid=%d, vpn2=%d, mask=%d\tg[0]=%d, v[0]=%d, d[0]=%d, c[0]=%B, pfn[0]=%d\n"
+                       "\t\t\t\tg[1]=%d, v[1]=%d, d[1]=%d, c[1]=%B, pfn[1]=%d\n",
+                       i, hi.asid, hi.vpn2, mask.mask, lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn,
                        lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
         }