Changes in kernel/arch/ia32/src/interrupt.c [acc7ce4:0d1e976] in mainline

File:

• kernel/arch/ia32/src/interrupt.c (modified) (2 diffs)

kernel/arch/ia32/src/interrupt.c

@@ -62 +62 @@
 void (* enable_irqs_function)(uint16_t irqmask) = NULL;
 void (* eoi_function)(void) = NULL;
-const char *irqs_info = NULL;
 
 void istate_decode(istate_t *istate)
 {
-        printf("cs =%#0" PRIx32 "\teip=%p\t"
-            "efl=%#0" PRIx32 "\terr=%#0" PRIx32 "\n",
-            istate->cs, (void *) istate->eip,
-            istate->eflags, istate->error_word);
-        
-        printf("ds =%#0" PRIx32 "\tes =%#0" PRIx32 "\t"
-            "fs =%#0" PRIx32 "\tgs =%#0" PRIx32 "\n",
+        printf("cs =%p\teip=%p\tefl=%p\terr=%p\n",
+            istate->cs, istate->eip, istate->eflags, istate->error_word);
+
+        printf("ds =%p\tes =%p\tfs =%p\tgs =%p\n",
             istate->ds, istate->es, istate->fs, istate->gs);
-        
         if (istate_from_uspace(istate))
-                printf("ss =%#0" PRIx32 "\n", istate->ss);
-        
-        printf("eax=%#0" PRIx32 "\tebx=%#0" PRIx32 "\t"
-            "ecx=%#0" PRIx32 "\tedx=%#0" PRIx32 "\n",
+                printf("ss =%p\n", istate->ss);
+
+        printf("eax=%p\tebx=%p\tecx=%p\tedx=%p\n",
             istate->eax, istate->ebx, istate->ecx, istate->edx);
-        
         printf("esi=%p\tedi=%p\tebp=%p\tesp=%p\n",
-            (void *) istate->esi, (void *) istate->edi,
-            (void *) istate->ebp,
-            istate_from_uspace(istate) ? ((void *) istate->esp) :
-            &istate->esp);
+            istate->esi, istate->edi, istate->ebp,
+            istate_from_uspace(istate) ? istate->esp : (uintptr_t)&istate->esp);
 }
 
@@ -148 +139 @@
         );
         
-        fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0" PRIx32 ".",
-            mxcsr);
-        panic_badtrap(istate, n, "SIMD FP exception");
+        fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0.8x.",
+            (unative_t) mxcsr);
+        panic_badtrap(istate, n, "SIMD FP exception, MXCSR=%#0.8x");
 }