Changeset 0e7380f in mainline
- Timestamp:
- 2018-01-13T00:18:28Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 94e9c29
- Parents:
- fb154e13
- Location:
- uspace/drv/bus/usb/xhci
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/hc.c
rfb154e13 r0e7380f 387 387 return EOK; 388 388 389 /* TODO: Test this with USB3-aware BIOS */ 389 if (xhci_reg_wait(&hc->op_regs->usbsts, XHCI_REG_MASK(XHCI_OP_CNR), 0)) 390 return ETIMEOUT; 391 390 392 usb_log_debug2("LEGSUP: bios: %x, os: %x", hc->legsup->sem_bios, hc->legsup->sem_os); 391 XHCI_REG_ WR(hc->legsup, XHCI_LEGSUP_SEM_OS, 1);393 XHCI_REG_SET(hc->legsup, XHCI_LEGSUP_SEM_OS, 1); 392 394 for (int i = 0; i <= (XHCI_LEGSUP_BIOS_TIMEOUT_US / XHCI_LEGSUP_POLLING_DELAY_1MS); i++) { 393 395 usb_log_debug2("LEGSUP: elapsed: %i ms, bios: %x, os: %x", i, … … 395 397 XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS)); 396 398 if (XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_BIOS) == 0) { 397 assert(XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS) == 1); 398 return EOK; 399 return XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS) == 1 ? EOK : EIO; 399 400 } 400 401 async_usleep(XHCI_LEGSUP_POLLING_DELAY_1MS); … … 410 411 static int hc_reset(xhci_hc_t *hc) 411 412 { 413 if (xhci_reg_wait(&hc->op_regs->usbsts, XHCI_REG_MASK(XHCI_OP_CNR), 0)) 414 return ETIMEOUT; 415 412 416 /* Stop the HC: set R/S to 0 */ 413 417 XHCI_REG_CLR(hc->op_regs, XHCI_OP_RS, 1); 414 418 415 /* Wait 16 ms until the HC is halted*/416 async_usleep(16000);417 assert(XHCI_REG_RD(hc->op_regs, XHCI_OP_HCH));419 /* Wait until the HC is halted - it shall take at most 16 ms */ 420 if (xhci_reg_wait(&hc->op_regs->usbsts, XHCI_REG_MASK(XHCI_OP_HCH), XHCI_REG_MASK(XHCI_OP_HCH))) 421 return ETIMEOUT; 418 422 419 423 /* Reset */ … … 421 425 422 426 /* Wait until the reset is complete */ 423 while (XHCI_REG_RD(hc->op_regs, XHCI_OP_HCRST))424 async_usleep(1000);427 if (xhci_reg_wait(&hc->op_regs->usbcmd, XHCI_REG_MASK(XHCI_OP_HCRST), 0)) 428 return ETIMEOUT; 425 429 426 430 return EOK; … … 437 441 return err; 438 442 439 // FIXME: Waiting forever. 440 while (XHCI_REG_RD(hc->op_regs, XHCI_OP_CNR)) 441 async_usleep(1000); 443 if (xhci_reg_wait(&hc->op_regs->usbsts, XHCI_REG_MASK(XHCI_OP_CNR), 0)) 444 return ETIMEOUT; 442 445 443 446 uint64_t dcbaaptr = hc->dcbaa_dma.phys; -
uspace/drv/bus/usb/xhci/hw_struct/common.h
rfb154e13 r0e7380f 42 42 #include <assert.h> 43 43 #include <bitops.h> 44 #include <byteorder.h> 44 45 #include <ddi.h> 45 #include < byteorder.h>46 #include <errno.h> 46 47 47 48 #define host2xhci(size, val) host2uint##size##_t_le((val)) … … 88 89 } 89 90 91 static inline int xhci_reg_wait(xhci_dword_t *reg, uint32_t mask, uint32_t expected) 92 { 93 mask = host2xhci(32, mask); 94 expected = host2xhci(32, expected); 95 96 unsigned retries = 100; 97 uint32_t value = *reg & mask; 98 99 for (; retries > 0 && value != expected; --retries) { 100 async_usleep(10000); 101 value = *reg & mask; 102 } 103 104 return value == expected ? EOK : ETIMEOUT; 105 } 106 90 107 #endif 91 108
Note:
See TracChangeset
for help on using the changeset viewer.