Changes in kernel/arch/ia32/src/asm.S [8d427a3:0f17bff] in mainline
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kernel/arch/ia32/src/asm.S
r8d427a3 r0f17bff 31 31 */ 32 32 33 #include <abi/asmtool.h> 33 34 #include <arch/pm.h> 34 35 #include <arch/cpu.h> 35 36 #include <arch/mm/page.h> 36 37 #include <arch/istate_struct.h> 38 #include <arch/smp/apic.h> 37 39 38 40 .text 39 .global paging_on40 .global enable_l_apic_in_msr41 .global memcpy_from_uspace42 .global memcpy_from_uspace_failover_address43 .global memcpy_to_uspace44 .global memcpy_to_uspace_failover_address45 .global early_putchar46 41 47 42 #define MEMCPY_DST 4 … … 64 59 * 65 60 */ 66 memcpy_from_uspace: 67 memcpy_to_uspace: 61 FUNCTION_BEGIN(memcpy_from_uspace) 62 FUNCTION_BEGIN(memcpy_to_uspace) 68 63 movl %edi, %edx /* save %edi */ 69 64 movl %esi, %eax /* save %esi */ … … 93 88 movl MEMCPY_DST(%esp), %eax 94 89 ret 90 FUNCTION_END(memcpy_from_uspace) 91 FUNCTION_END(memcpy_to_uspace) 95 92 96 93 /* … … 98 95 * above had caused a page fault. 99 96 */ 100 memcpy_from_uspace_failover_address: 101 memcpy_to_uspace_failover_address: 97 SYMBOL(memcpy_from_uspace_failover_address) 98 SYMBOL(memcpy_to_uspace_failover_address) 102 99 movl %edx, %edi 103 100 movl %eax, %esi … … 112 109 * 113 110 */ 114 paging_on: 111 FUNCTION_BEGIN(paging_on) 115 112 movl %cr0, %edx 116 orl $ (1 << 31), %edx /* paging on */113 orl $CR0_PG, %edx /* paging on */ 117 114 118 115 /* Clear Cache Disable and not Write Though */ 119 andl $~( (1 << 30) | (1 << 29)), %edx116 andl $~(CR0_CD | CR0_NW), %edx 120 117 movl %edx, %cr0 121 118 jmp 0f … … 123 120 0: 124 121 ret 122 FUNCTION_END(paging_on) 125 123 126 124 /** Enable local APIC … … 129 127 * 130 128 */ 131 enable_l_apic_in_msr: 132 movl $ 0x1b, %ecx129 FUNCTION_BEGIN(enable_l_apic_in_msr) 130 movl $IA32_MSR_APIC_BASE, %ecx 133 131 rdmsr 134 orl $(1 << 11), %eax 135 orl $(0xfee00000), %eax 132 orl $(L_APIC_BASE | IA32_APIC_BASE_GE), %eax 136 133 wrmsr 137 134 ret 135 FUNCTION_END(enable_l_apic_in_msr) 138 136 139 137 /* … … 152 150 * entirely in registers. 153 151 */ 154 .global sysenter_handler 155 sysenter_handler: 152 SYMBOL(sysenter_handler) 156 153 157 154 /* … … 186 183 187 184 /* 188 * Save TLS.189 */190 movl %gs, %edx191 movl %edx, ISTATE_OFFSET_GS(%esp)192 193 /*194 185 * Switch to kernel selectors. 195 186 */ 196 movw $(GDT_SELECTOR(KDATA_DES)), %ax 197 movw %ax, %ds 198 movw %ax, %es 187 movl $(GDT_SELECTOR(KDATA_DES)), %eax 188 movl %eax, %ds 189 movl %eax, %es 190 movl $(GDT_SELECTOR(VREG_DES)), %eax 191 movl %eax, %gs 199 192 200 193 /* … … 216 209 217 210 /* 218 * Restore TLS.219 */220 movl ISTATE_OFFSET_GS(%esp), %edx221 movl %edx, %gs222 223 /*224 211 * Prepare return address and userspace stack for SYSEXIT. 225 212 */ … … 232 219 * This is the legacy syscall handler using the interrupt mechanism. 233 220 */ 234 .global int_syscall 235 int_syscall: 221 SYMBOL(int_syscall) 236 222 subl $(ISTATE_SOFT_SIZE + 4), %esp 237 223 … … 256 242 257 243 /* 258 * Save the se lectorregisters.244 * Save the segment registers. 259 245 */ 260 246 movl %gs, %ecx … … 276 262 movl %eax, %ds 277 263 movl %eax, %es 264 movl $(GDT_SELECTOR(VREG_DES)), %eax 265 movl %eax, %gs 278 266 279 267 movl $0, ISTATE_OFFSET_EBP_FRAME(%esp) … … 288 276 289 277 /* 290 * Restore the se lectorregisters.278 * Restore the segment registers. 291 279 */ 292 280 movl ISTATE_OFFSET_GS(%esp), %ecx … … 319 307 320 308 .macro handler i 321 .global int_\i 322 int_\i: 309 SYMBOL(int_\i) 323 310 /* 324 311 * This macro distinguishes between two versions of ia32 … … 359 346 360 347 /* 361 * Save the se lectorregisters.348 * Save the segment registers. 362 349 */ 363 350 movl %gs, %ecx … … 379 366 movl %eax, %ds 380 367 movl %eax, %es 368 movl $(GDT_SELECTOR(VREG_DES)), %eax 369 movl %eax, %gs 381 370 382 371 /* … … 462 451 * 463 452 */ 464 early_putchar: 453 FUNCTION_BEGIN(early_putchar) 465 454 466 455 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB))) … … 594 583 595 584 ret 596 585 FUNCTION_END(early_putchar) 586
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