Changes in kernel/arch/ia64/src/mm/tlb.c [22f0561:0ff03f3] in mainline

File:

• kernel/arch/ia64/src/mm/tlb.c (modified) (19 diffs)

kernel/arch/ia64/src/mm/tlb.c

@@ -52 +52 @@
 #include <arch.h>
 #include <interrupt.h>
-#include <arch/legacyio.h>
+
+#define IO_FRAME_BASE 0xFFFFC000000
 
 /** Invalidate all TLB entries. */
@@ -466 +467 @@
 }
 
-static bool is_kernel_fault(uintptr_t va)
-{
-        region_register_t rr;
-
-        rr.word = rr_read(VA2VRN(va));
-        rid_t rid = rr.map.rid;
-        return (RID2ASID(rid) == ASID_KERNEL) && (VA2VRN(va) == VRN_KERNEL);
-}
-
 /** Instruction TLB fault handler for faults with VHPT turned off.
  *
@@ -488 +480 @@
         va = istate->cr_ifa; /* faulting address */
         
-        ASSERT(!is_kernel_fault(va));
-
+        page_table_lock(AS, true);
         t = page_mapping_find(AS, va, true);
         if (t) {
@@ -497 +488 @@
                  */
                 itc_pte_copy(t);
+                page_table_unlock(AS, true);
         } else {
                 /*
                  * Forward the page fault to address space page fault handler.
                  */
+                page_table_unlock(AS, true);
                 if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
                         fault_if_from_uspace(istate, "Page fault at %p.",
@@ -529 +522 @@
 static int try_memmap_io_insertion(uintptr_t va, istate_t *istate)
 {
-        if ((va >= LEGACYIO_USER_BASE) && (va < LEGACYIO_USER_BASE + (1 << LEGACYIO_PAGE_WIDTH))) {
+        if ((va >= IO_OFFSET ) && (va < IO_OFFSET + (1 << IO_PAGE_WIDTH))) {
                 if (TASK) {
-                        uint64_t io_page = (va & ((1 << LEGACYIO_PAGE_WIDTH) - 1)) >>
-                            LEGACYIO_SINGLE_PAGE_WIDTH;
+                        uint64_t io_page = (va & ((1 << IO_PAGE_WIDTH) - 1)) >>
+                            USPACE_IO_PAGE_WIDTH;
                         
                         if (is_io_page_accessible(io_page)) {
                                 uint64_t page, frame;
                                 
-                                page = LEGACYIO_USER_BASE +
-                                    (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page;
-                                frame = LEGACYIO_PHYS_BASE +
-                                    (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page;
+                                page = IO_OFFSET +
+                                    (1 << USPACE_IO_PAGE_WIDTH) * io_page;
+                                frame = IO_FRAME_BASE +
+                                    (1 << USPACE_IO_PAGE_WIDTH) * io_page;
                                 
                                 tlb_entry_t entry;
@@ -554 +547 @@
                                 entry.ar = AR_READ | AR_WRITE;
                                 entry.ppn = frame >> PPN_SHIFT;
-                                entry.ps = LEGACYIO_SINGLE_PAGE_WIDTH;
+                                entry.ps = USPACE_IO_PAGE_WIDTH;
                                 
                                 dtc_mapping_insert(page, TASK->as->asid, entry);
@@ -577 +570 @@
 {
         if (istate->cr_isr.sp) {
-                /*
-                 * Speculative load. Deffer the exception until a more clever
-                 * approach can be used. Currently if we try to find the
-                 * mapping for the speculative load while in the kernel, we
-                 * might introduce a livelock because of the possibly invalid
-                 * values of the address.
-                 */
+                /* Speculative load. Deffer the exception
+                   until a more clever approach can be used.
+                   
+                   Currently if we try to find the mapping
+                   for the speculative load while in the kernel,
+                   we might introduce a livelock because of
+                   the possibly invalid values of the address. */
                 istate->cr_ipsr.ed = true;
                 return;
@@ -589 +582 @@
         
         uintptr_t va = istate->cr_ifa;  /* faulting address */
-        as_t *as = AS;
-        
-        if (is_kernel_fault(va)) {
-                if (va < end_of_identity) {
+        
+        region_register_t rr;
+        rr.word = rr_read(VA2VRN(va));
+        rid_t rid = rr.map.rid;
+        if (RID2ASID(rid) == ASID_KERNEL) {
+                if (VA2VRN(va) == VRN_KERNEL) {
                         /*
-                         * Create kernel identity mapping for low memory. 
+                         * Provide KA2PA(identity) mapping for faulting piece of
+                         * kernel address space.
                          */
                         dtlb_kernel_mapping_insert(va, KA2PA(va), false, 0);
                         return;
-                } else {
-                        as = AS_KERNEL;
                 }
         }
         
         
-        pte_t *entry = page_mapping_find(as, va, true);
+        page_table_lock(AS, true);
+        pte_t *entry = page_mapping_find(AS, va, true);
         if (entry) {
                 /*
@@ -611 +606 @@
                  */
                 dtc_pte_copy(entry);
+                page_table_unlock(AS, true);
         } else {
+                page_table_unlock(AS, true);
                 if (try_memmap_io_insertion(va, istate))
                         return;
@@ -650 +647 @@
         uintptr_t va;
         pte_t *t;
-        as_t *as = AS;
         
         va = istate->cr_ifa;  /* faulting address */
         
-        if (is_kernel_fault(va))
-                as = AS_KERNEL;
-
-        t = page_mapping_find(as, va, true);
+        page_table_lock(AS, true);
+        t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
         if ((t) && (t->p) && (t->w)) {
@@ -673 +667 @@
                 }
         }
+        page_table_unlock(AS, true);
 }
 
@@ -687 +682 @@
         
         va = istate->cr_ifa;  /* faulting address */
-
-        ASSERT(!is_kernel_fault(va));
-        
+        
+        page_table_lock(AS, true);
         t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
@@ -706 +700 @@
                 }
         }
+        page_table_unlock(AS, true);
 }
 
@@ -718 +713 @@
         uintptr_t va;
         pte_t *t;
-        as_t *as = AS;
         
         va = istate->cr_ifa;  /* faulting address */
         
-        if (is_kernel_fault(va))
-                as = AS_KERNEL;
-
-        t = page_mapping_find(as, va, true);
+        page_table_lock(AS, true);
+        t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
         if ((t) && (t->p)) {
@@ -741 +733 @@
                 }
         }
+        page_table_unlock(AS, true);
 }
 
@@ -755 +748 @@
         
         va = istate->cr_ifa;  /* faulting address */
-
-        ASSERT(!is_kernel_fault(va));
         
         /*
          * Assume a write to a read-only page.
          */
+        page_table_lock(AS, true);
         t = page_mapping_find(AS, va, true);
         ASSERT((t) && (t->p));
@@ -769 +761 @@
                 panic_memtrap(istate, PF_ACCESS_WRITE, va, NULL);
         }
+        page_table_unlock(AS, true);
 }
 
@@ -784 +777 @@
         va = istate->cr_ifa;  /* faulting address */
         
-        ASSERT(!is_kernel_fault(va));
-
+        page_table_lock(AS, true);
         t = page_mapping_find(AS, va, true);
         ASSERT(t);
@@ -798 +790 @@
                 else
                         dtc_pte_copy(t);
+                page_table_unlock(AS, true);
         } else {
+                page_table_unlock(AS, true);
                 if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
                         fault_if_from_uspace(istate, "Page fault at %p.",