Index: arch/sparc64/include/mm/tlb.h
===================================================================
--- arch/sparc64/include/mm/tlb.h	(revision b45c443eb976adbe668a3f855f749cf0ad3a5b3f)
+++ arch/sparc64/include/mm/tlb.h	(revision 0ffa3ef51d117153ad4c8c5fdb3b525ff042ef01)
@@ -57,5 +57,5 @@
 
 union tlb_context_reg {
-	__u64 v;
+	uint64_t v;
 	struct {
 		unsigned long : 51;
@@ -70,7 +70,7 @@
 /** I-/D-TLB Data Access Address in Alternate Space. */
 union tlb_data_access_addr {
-	__u64 value;
+	uint64_t value;
 	struct {
-		__u64 : 55;
+		uint64_t : 55;
 		unsigned tlb_entry : 6;
 		unsigned : 3;
@@ -82,7 +82,7 @@
 /** I-/D-TLB Tag Read Register. */
 union tlb_tag_read_reg {
-	__u64 value;
+	uint64_t value;
 	struct {
-		__u64 vpn : 51;		/**< Virtual Address bits 63:13. */
+		uint64_t vpn : 51;		/**< Virtual Address bits 63:13. */
 		unsigned context : 13;	/**< Context identifier. */
 	} __attribute__ ((packed));
@@ -102,7 +102,7 @@
 /** TLB Demap Operation Address. */
 union tlb_demap_addr {
-	__u64 value;
+	uint64_t value;
 	struct {
-		__u64 vpn: 51;		/**< Virtual Address bits 63:13. */
+		uint64_t vpn: 51;		/**< Virtual Address bits 63:13. */
 		unsigned : 6;		/**< Ignored. */
 		unsigned type : 1;	/**< The type of demap operation. */
@@ -115,5 +115,5 @@
 /** TLB Synchronous Fault Status Register. */
 union tlb_sfsr_reg {
-	__u64 value;
+	uint64_t value;
 	struct {
 		unsigned long : 39;	/**< Implementation dependent. */
@@ -137,5 +137,5 @@
  * @return Current value of Primary Context Register.
  */
-static inline __u64 mmu_primary_context_read(void)
+static inline uint64_t mmu_primary_context_read(void)
 {
 	return asi_u64_read(ASI_DMMU, VA_PRIMARY_CONTEXT_REG);
@@ -146,5 +146,5 @@
  * @param v New value of Primary Context Register.
  */
-static inline void mmu_primary_context_write(__u64 v)
+static inline void mmu_primary_context_write(uint64_t v)
 {
 	asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v);
@@ -156,5 +156,5 @@
  * @return Current value of Secondary Context Register.
  */
-static inline __u64 mmu_secondary_context_read(void)
+static inline uint64_t mmu_secondary_context_read(void)
 {
 	return asi_u64_read(ASI_DMMU, VA_SECONDARY_CONTEXT_REG);
@@ -165,5 +165,5 @@
  * @param v New value of Primary Context Register.
  */
-static inline void mmu_secondary_context_write(__u64 v)
+static inline void mmu_secondary_context_write(uint64_t v)
 {
 	asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v);
@@ -177,5 +177,5 @@
  * @return Current value of specified IMMU TLB Data Access Register.
  */
-static inline __u64 itlb_data_access_read(index_t entry)
+static inline uint64_t itlb_data_access_read(index_t entry)
 {
 	tlb_data_access_addr_t reg;
@@ -191,5 +191,5 @@
  * @param value Value to be written.
  */
-static inline void itlb_data_access_write(index_t entry, __u64 value)
+static inline void itlb_data_access_write(index_t entry, uint64_t value)
 {
 	tlb_data_access_addr_t reg;
@@ -207,5 +207,5 @@
  * @return Current value of specified DMMU TLB Data Access Register.
  */
-static inline __u64 dtlb_data_access_read(index_t entry)
+static inline uint64_t dtlb_data_access_read(index_t entry)
 {
 	tlb_data_access_addr_t reg;
@@ -221,5 +221,5 @@
  * @param value Value to be written.
  */
-static inline void dtlb_data_access_write(index_t entry, __u64 value)
+static inline void dtlb_data_access_write(index_t entry, uint64_t value)
 {
 	tlb_data_access_addr_t reg;
@@ -237,5 +237,5 @@
  * @return Current value of specified IMMU TLB Tag Read Register.
  */
-static inline __u64 itlb_tag_read_read(index_t entry)
+static inline uint64_t itlb_tag_read_read(index_t entry)
 {
 	tlb_tag_read_addr_t tag;
@@ -252,5 +252,5 @@
  * @return Current value of specified DMMU TLB Tag Read Register.
  */
-static inline __u64 dtlb_tag_read_read(index_t entry)
+static inline uint64_t dtlb_tag_read_read(index_t entry)
 {
 	tlb_tag_read_addr_t tag;
@@ -265,5 +265,5 @@
  * @param v Value to be written.
  */
-static inline void itlb_tag_access_write(__u64 v)
+static inline void itlb_tag_access_write(uint64_t v)
 {
 	asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v);
@@ -275,5 +275,5 @@
  * @return Current value of IMMU TLB Tag Access Register.
  */
-static inline __u64 itlb_tag_access_read(void)
+static inline uint64_t itlb_tag_access_read(void)
 {
 	return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS);
@@ -284,5 +284,5 @@
  * @param v Value to be written.
  */
-static inline void dtlb_tag_access_write(__u64 v)
+static inline void dtlb_tag_access_write(uint64_t v)
 {
 	asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v);
@@ -294,5 +294,5 @@
  * @return Current value of DMMU TLB Tag Access Register.
  */
-static inline __u64 dtlb_tag_access_read(void)
+static inline uint64_t dtlb_tag_access_read(void)
 {
 	return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS);
@@ -304,5 +304,5 @@
  * @param v Value to be written.
  */
-static inline void itlb_data_in_write(__u64 v)
+static inline void itlb_data_in_write(uint64_t v)
 {
 	asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v);
@@ -314,5 +314,5 @@
  * @param v Value to be written.
  */
-static inline void dtlb_data_in_write(__u64 v)
+static inline void dtlb_data_in_write(uint64_t v)
 {
 	asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
@@ -324,5 +324,5 @@
  * @return Current content of I-SFSR register.
  */
-static inline __u64 itlb_sfsr_read(void)
+static inline uint64_t itlb_sfsr_read(void)
 {
 	return asi_u64_read(ASI_IMMU, VA_IMMU_SFSR);
@@ -333,5 +333,5 @@
  * @param v New value of I-SFSR register.
  */
-static inline void itlb_sfsr_write(__u64 v)
+static inline void itlb_sfsr_write(uint64_t v)
 {
 	asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v);
@@ -343,5 +343,5 @@
  * @return Current content of D-SFSR register.
  */
-static inline __u64 dtlb_sfsr_read(void)
+static inline uint64_t dtlb_sfsr_read(void)
 {
 	return asi_u64_read(ASI_DMMU, VA_DMMU_SFSR);
@@ -352,5 +352,5 @@
  * @param v New value of D-SFSR register.
  */
-static inline void dtlb_sfsr_write(__u64 v)
+static inline void dtlb_sfsr_write(uint64_t v)
 {
 	asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v);
@@ -362,5 +362,5 @@
  * @return Current content of D-SFAR register.
  */
-static inline __u64 dtlb_sfar_read(void)
+static inline uint64_t dtlb_sfar_read(void)
 {
 	return asi_u64_read(ASI_DMMU, VA_DMMU_SFAR);
@@ -373,5 +373,5 @@
  * @param page Address which is on the page to be demapped.
  */
-static inline void itlb_demap(int type, int context_encoding, __address page)
+static inline void itlb_demap(int type, int context_encoding, uintptr_t page)
 {
 	tlb_demap_addr_t da;
@@ -395,5 +395,5 @@
  * @param page Address which is on the page to be demapped.
  */
-static inline void dtlb_demap(int type, int context_encoding, __address page)
+static inline void dtlb_demap(int type, int context_encoding, uintptr_t page)
 {
 	tlb_demap_addr_t da;
@@ -415,5 +415,5 @@
 extern void fast_data_access_protection(void);
 
-extern void dtlb_insert_mapping(__address page, __address frame, int pagesize, bool locked, bool cacheable);
+extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);
 
 #endif
