Changeset 10b890b in mainline


Ignore:
Timestamp:
2006-07-13T22:11:26Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
c6e314a
Parents:
a5f76758
Message:

Move functionality of tlb_arch_init() to take_over_tlb_and_tt().
Call take_over_tlb_and_tt() very early after the kernel starts
executing.

Files:
7 edited

Legend:

Unmodified
Added
Removed

  • boot/arch/sparc64/loader/boot.S

    ra5f76758 r10b890b  
    7474        nop
    7575
    76 .align 16
     76.align STACK_ALIGNMENT
    7777initial_stack:
    7878        .space INITIAL_STACK_SIZE

  • kernel/arch/sparc64/include/arch.h

    ra5f76758 r10b890b  
    2727 */
    2828
    29  /** @addtogroup sparc64       
     29/** @addtogroup sparc64
    3030 * @{
    3131 */
    … …  
    3636#define __sparc64_ARCH_H__
    3737
     38#include <arch/types.h>
     39
     40extern void take_over_tlb_and_tt(uintptr_t base);
     41
    3842#endif
    3943
    40  /** @}
     44/** @}
    4145 */
    4246

  • kernel/arch/sparc64/include/mm/asid.h

    ra5f76758 r10b890b  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    3333 */
    3434
    35 #ifndef __sparc64_ASID_H__
    36 #define __sparc64_ASID_H__
     35#ifndef KERN_sparc64_ASID_H_
     36#define KERN_sparc64_ASID_H_
    3737
    3838#include <arch/types.h>
    … …  
    4747#endif
    4848
    49  /** @}
     49/** @}
    5050 */
    51 

  • kernel/arch/sparc64/include/trap/trap.h

    ra5f76758 r10b890b  
    4242static inline void trap_switch_trap_table(void)
    4343{
    44         /* Point TBA to kernel copy of OFW's trap table. */
     44        /* Point TBA to kernel trap table. */
    4545        tba_write((uint64_t) trap_table);
    4646}

  • kernel/arch/sparc64/src/mm/tlb.c

    ra5f76758 r10b890b  
    2727 */
    2828
    29  /** @addtogroup sparc64mm     
     29/** @addtogroup sparc64mm       
    3030 * @{
    3131 */
    … …  
    5858};
    5959
    60 /** Initialize ITLB and DTLB.
    61  *
    62  * The goal of this function is to disable MMU
    63  * so that both TLBs can be purged and new
    64  * kernel 4M locked entry can be installed.
    65  * After TLB is initialized, MMU is enabled
    66  * again.
    67  *
    68  * Switching MMU off imposes the requirement for
    69  * the kernel to run in identity mapped environment.
    70  */
    7160void tlb_arch_init(void)
    7261{
    73         tlb_tag_access_reg_t tag;
    74         tlb_data_t data;
    75         frame_address_t fr;
    76         page_address_t pg;
    77 
    78         fr.address = config.base;
    79         pg.address = config.base;
    80 
    81         immu_disable();
    82         dmmu_disable();
    83 
    84         /*
    85          * Demap everything, especially OpenFirmware.
    86          */
    87         itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
    88         dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
    89        
    90         /*
    91          * We do identity mapping of 4M-page at 4M.
    92          */
    93         tag.value = ASID_KERNEL;
    94         tag.vpn = pg.vpn;
    95 
    96         itlb_tag_access_write(tag.value);
    97         dtlb_tag_access_write(tag.value);
    98 
    99         data.value = 0;
    100         data.v = true;
    101         data.size = PAGESIZE_4M;
    102         data.pfn = fr.pfn;
    103         data.l = true;
    104         data.cp = 1;
    105         data.cv = 1;
    106         data.p = true;
    107         data.w = true;
    108         data.g = true;
    109 
    110         itlb_data_in_write(data.value);
    111         dtlb_data_in_write(data.value);
    112 
    113         /*
    114          * Register window traps can occur before MMU is enabled again.
    115          * This ensures that any such traps will be handled from
    116          * kernel identity mapped trap handler.
    117          */
    118         trap_switch_trap_table();
    119        
    120         tlb_invalidate_all();
    121 
    122         dmmu_enable();
    123         immu_enable();
    12462}
    12563
    … …  
    280218}
    281219
    282  /** @}
    283  */
    284 
     220/** @}
     221 */

  • kernel/arch/sparc64/src/sparc64.c

    ra5f76758 r10b890b  
    4141#include <console/console.h>
    4242#include <arch/boot/boot.h>
     43#include <arch/arch.h>
     44#include <arch/mm/tlb.h>
     45#include <mm/asid.h>
    4346
    4447bootinfo_t bootinfo;
    … …  
    8992}
    9093
     94/** Take over TLB and trap table.
     95 *
     96 * Initialize ITLB and DTLB and switch to kernel
     97 * trap table.
     98 *
     99 * The goal of this function is to disable MMU
     100 * so that both TLBs can be purged and new
     101 * kernel 4M locked entry can be installed.
     102 * After TLB is initialized, MMU is enabled
     103 * again.
     104 *
     105 * Switching MMU off imposes the requirement for
     106 * the kernel to run in identity mapped environment.
     107 *
     108 * @param base Base address that will be hardwired in both TLBs.
     109 */
     110void take_over_tlb_and_tt(uintptr_t base)
     111{
     112        tlb_tag_access_reg_t tag;
     113        tlb_data_t data;
     114        frame_address_t fr;
     115        page_address_t pg;
     116
     117        fr.address = base;
     118        pg.address = base;
     119
     120        immu_disable();
     121        dmmu_disable();
     122
     123        /*
     124         * Demap everything, especially OpenFirmware.
     125         */
     126        itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
     127        dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
     128       
     129        /*
     130         * We do identity mapping of 4M-page at 4M.
     131         */
     132        tag.value = ASID_KERNEL;
     133        tag.vpn = pg.vpn;
     134
     135        itlb_tag_access_write(tag.value);
     136        dtlb_tag_access_write(tag.value);
     137
     138        data.value = 0;
     139        data.v = true;
     140        data.size = PAGESIZE_4M;
     141        data.pfn = fr.pfn;
     142        data.l = true;
     143        data.cp = 1;
     144        data.cv = 1;
     145        data.p = true;
     146        data.w = true;
     147        data.g = true;
     148
     149        itlb_data_in_write(data.value);
     150        dtlb_data_in_write(data.value);
     151
     152        /*
     153         * Register window traps can occur before MMU is enabled again.
     154         * This ensures that any such traps will be handled from
     155         * kernel identity mapped trap handler.
     156         */
     157        trap_switch_trap_table();
     158       
     159        tlb_invalidate_all();
     160
     161        dmmu_enable();
     162        immu_enable();
     163}
     164
    91165/** @}
    92166 */

  • kernel/arch/sparc64/src/start.S

    ra5f76758 r10b890b  
    4141 *
    4242 * The registers are expected to be in this state:
    43  * %o0 bootinfo structure address
    44  * %o1 bootinfo structure size
     43 * - %o0 bootinfo structure address
     44 * - %o1 bootinfo structure size
     45 *
     46 * Moreover, we depend on boot having established the
     47 * following environment:
     48 * - TLBs are on
     49 * - identity mapping for the kernel image
     50 * - identity mapping for memory stack
    4551 */
    4652
    … …  
    6672        nop
    6773
     74        /*
     75         * Take over control of identity mapping.
     76         * Take over control of trap table.
     77         *
     78         * After this call, the kernel is entirely self-sufficient
     79         * and independent on OpenFirmware.
     80         */
     81        set kernel_image_start, %o0
     82        call take_over_tlb_and_tt
     83        nop
     84
    6885        wrpr %r0, 0, %pil
    6986
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