Changeset 11928d5 in mainline

Timestamp:

2006-04-28T14:32:44Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a98cdc7

Parents:

040e4e9

Message:

Fix BITS2BYTES macro to return 0 when passed 0 as argument.
Fix ia32 TSS segment granularity to be 0.
Fix ia32 and amd64 initial TSS limit to be 103.
Little textual changes here and there.

Files:

• arch/amd64/include/asm.h (modified) (3 diffs)
• arch/amd64/src/pm.c (modified) (1 diff)
• arch/ia32/include/asm.h (modified) (3 diffs)
• arch/ia32/include/smp/apic.h (modified) (4 diffs)
• arch/ia32/src/pm.c (modified) (2 diffs)
• arch/ia32/src/proc/scheduler.c (modified) (2 diffs)
• generic/include/adt/bitmap.h (modified) (1 diff)

arch/amd64/include/asm.h

@@ -208 +208 @@
 static inline void gdtr_load(struct ptr_16_64 *gdtr_reg)
 {
-        __asm__ volatile ("lgdt %0\n" : : "m" (*gdtr_reg));
+        __asm__ volatile ("lgdtq %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -217 +217 @@
 static inline void gdtr_store(struct ptr_16_64 *gdtr_reg)
 {
-        __asm__ volatile ("sgdt %0\n" : : "m" (*gdtr_reg));
+        __asm__ volatile ("sgdtq %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -226 +226 @@
 static inline void idtr_load(struct ptr_16_64 *idtr_reg)
 {
-        __asm__ volatile ("lidt %0\n" : : "m" (*idtr_reg));
+        __asm__ volatile ("lidtq %0\n" : : "m" (*idtr_reg));
 }
 

arch/amd64/src/pm.c

@@ -214 +214 @@
         
         gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
-        gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
+        gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
 
         gdtr_load(&gdtr);

arch/ia32/include/asm.h

@@ -259 +259 @@
 static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
 {
-        __asm__ volatile ("lgdt %0\n" : : "m" (*gdtr_reg));
+        __asm__ volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -268 +268 @@
 static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
 {
-        __asm__ volatile ("sgdt %0\n" : : "m" (*gdtr_reg));
+        __asm__ volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -277 +277 @@
 static inline void idtr_load(ptr_16_32_t *idtr_reg)
 {
-        __asm__ volatile ("lidt %0\n" : : "m" (*idtr_reg));
+        __asm__ volatile ("lidtl %0\n" : : "m" (*idtr_reg));
 }
 

arch/ia32/include/smp/apic.h

@@ -128 +128 @@
 typedef struct icr icr_t;
 
-/* End Of Interrupt */
+/* End Of Interrupt. */
 #define EOI             (0x0b0/sizeof(__u32))
 
@@ -252 +252 @@
 typedef union l_apic_id l_apic_id_t;
 
-/* Local APIC Version Register */
+/** Local APIC Version Register */
 #define LAVR            (0x030/sizeof(__u32))
 #define LAVR_Mask       0xff
@@ -264 +264 @@
         __u32 value;
         struct {
-                unsigned : 24;          /**< Reserver. */
+                unsigned : 24;          /**< Reserved. */
                 __u8 id;                /**< Logical APIC ID. */
         } __attribute__ ((packed));
@@ -320 +320 @@
                 struct {
                         unsigned : 24;                  /**< Reserved. */
-                        __u8 dest : 8;          /**< Destination Field. */
+                        __u8 dest : 8;                  /**< Destination Field. */
                 } __attribute__ ((packed));
         };

arch/ia32/src/pm.c

@@ -200 +200 @@
         gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
         gdt_p[TSS_DES].special = 1;
-        gdt_p[TSS_DES].granularity = 1;
+        gdt_p[TSS_DES].granularity = 0;
         
         gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
-        gdt_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
+        gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
 
         /*
@@ -211 +211 @@
         tr_load(selector(TSS_DES));
         
-        clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels */
+        clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */
         clean_AM_flag();          /* Disable alignment check */
 }

arch/ia32/src/proc/scheduler.c

@@ -37 +37 @@
 #include <arch/asm.h>
 #include <adt/bitmap.h>
+#include <print.h>
 
 /** Perform ia32 specific tasks needed before the new task is run.
@@ -56 +57 @@
         if ((bits = TASK->arch.iomap.bits)) {
                 bitmap_t iomap;
-
+        
                 ASSERT(TASK->arch.iomap.map);
                 bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);

generic/include/adt/bitmap.h

@@ -33 +33 @@
 #include <typedefs.h>
 
-#define BITS2BYTES(bits)        ((((bits)-1)>>3)+1)
+#define BITS2BYTES(bits)        (bits ? ((((bits)-1)>>3)+1) : 0)
 
 typedef struct {