Changeset 11cb08ca in mainline


Ignore:
Timestamp:
2006-03-24T11:04:40Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
5201199
Parents:
9cbd27b
Message:

Small changes.
Make sparc64 and ppc32 compile again.

Location:
arch
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • arch/ia64/include/faddr.h

    r9cbd27b r11cb08ca  
    4040 *
    4141 */
    42 static inline __address FADDR(void (* fptr)()) {
    43         __address faddr;
    44 
    45         faddr = *((__address *)(fptr));;
    46         return faddr;
    47 }
     42#define FADDR(f)         (*((__address *)(f)));
    4843
    4944#endif

  • arch/ia64/src/context.S

    r9cbd27b r11cb08ca  
    105105         */
    106106        mov loc2 = pr           ;;
    107         st8 [in0] = loc2, 16;; /*Next fpu registers should be spilled to 16B aligned address*/
    108 
    109 
    110         stf.spill [in0]=f2,16;;
    111         stf.spill [in0]=f3,16;;
    112         stf.spill [in0]=f4,16;;
    113         stf.spill [in0]=f5,16;;
    114 
    115         stf.spill [in0]=f16,16;;
    116         stf.spill [in0]=f17,16;;
    117         stf.spill [in0]=f18,16;;
    118         stf.spill [in0]=f19,16;;
    119         stf.spill [in0]=f20,16;;
    120         stf.spill [in0]=f21,16;;
    121         stf.spill [in0]=f22,16;;
    122         stf.spill [in0]=f23,16;;
    123         stf.spill [in0]=f24,16;;
    124         stf.spill [in0]=f25,16;;
    125         stf.spill [in0]=f26,16;;
    126         stf.spill [in0]=f27,16;;
    127         stf.spill [in0]=f28,16;;
    128         stf.spill [in0]=f29,16;;
    129         stf.spill [in0]=f30,16;;
    130         stf.spill [in0]=f31,16;;
    131 
    132        
     107        st8 [in0] = loc2, 16;;          /* Next fpu registers should be spilled to 16B aligned address */
     108
     109        /*
     110         * Save floating-point registers.
     111         */
     112        stf.spill [in0] = f2, 16 ;;
     113        stf.spill [in0] = f3, 16 ;;
     114        stf.spill [in0] = f4, 16 ;;
     115        stf.spill [in0] = f5, 16 ;;
     116
     117        stf.spill [in0] = f16, 16 ;;
     118        stf.spill [in0] = f17, 16 ;;
     119        stf.spill [in0] = f18, 16 ;;
     120        stf.spill [in0] = f19, 16 ;;
     121        stf.spill [in0] = f20, 16 ;;
     122        stf.spill [in0] = f21, 16 ;;
     123        stf.spill [in0] = f22, 16 ;;
     124        stf.spill [in0] = f23, 16 ;;
     125        stf.spill [in0] = f24, 16 ;;
     126        stf.spill [in0] = f25, 16 ;;
     127        stf.spill [in0] = f26, 16 ;;
     128        stf.spill [in0] = f27, 16 ;;
     129        stf.spill [in0] = f28, 16 ;;
     130        stf.spill [in0] = f29, 16 ;;
     131        stf.spill [in0] = f30, 16 ;;
     132        stf.spill [in0] = f31, 16 ;;
     133
    133134        mov ar.unat = loc1
    134135       
    … …  
    215216        mov pr = loc2, ~0
    216217       
    217         ldf.fill f2=[in0],16;;
    218         ldf.fill f3=[in0],16;;
    219         ldf.fill f4=[in0],16;;
    220         ldf.fill f5=[in0],16;;
    221 
    222         ldf.fill f16=[in0],16;;
    223         ldf.fill f17=[in0],16;;
    224         ldf.fill f18=[in0],16;;
    225         ldf.fill f19=[in0],16;;
    226         ldf.fill f20=[in0],16;;
    227         ldf.fill f21=[in0],16;;
    228         ldf.fill f22=[in0],16;;
    229         ldf.fill f23=[in0],16;;
    230         ldf.fill f24=[in0],16;;
    231         ldf.fill f25=[in0],16;;
    232         ldf.fill f26=[in0],16;;
    233         ldf.fill f27=[in0],16;;
    234         ldf.fill f28=[in0],16;;
    235         ldf.fill f29=[in0],16;;
    236         ldf.fill f30=[in0],16;;
    237         ldf.fill f31=[in0],16;;
    238 
    239 
     218        /*
     219         * Restore floating-point registers.
     220         */
     221        ldf.fill f2 = [in0], 16 ;;
     222        ldf.fill f3 = [in0], 16 ;;
     223        ldf.fill f4 = [in0], 16 ;;
     224        ldf.fill f5 = [in0], 16 ;;
     225
     226        ldf.fill f16 = [in0], 16 ;;
     227        ldf.fill f17 = [in0], 16 ;;
     228        ldf.fill f18 = [in0], 16 ;;
     229        ldf.fill f19 = [in0], 16 ;;
     230        ldf.fill f20 = [in0], 16 ;;
     231        ldf.fill f21 = [in0], 16 ;;
     232        ldf.fill f22 = [in0], 16 ;;
     233        ldf.fill f23 = [in0], 16 ;;
     234        ldf.fill f24 = [in0], 16 ;;
     235        ldf.fill f25 = [in0], 16 ;;
     236        ldf.fill f26 = [in0], 16 ;;
     237        ldf.fill f27 = [in0], 16 ;;
     238        ldf.fill f28 = [in0], 16 ;;
     239        ldf.fill f29 = [in0], 16 ;;
     240        ldf.fill f30 = [in0], 16 ;;
     241        ldf.fill f31 = [in0], 16 ;;
    240242       
    241243        mov ar.unat = loc1

  • arch/ppc32/src/dummy.s

    r9cbd27b r11cb08ca  
    3131.global asm_delay_loop
    3232.global userspace
     33.global sys_tls_set
    3334.global tlb_invalidate_all
    3435.global tlb_invalidate_asid
    … …  
    4748        b userspace
    4849
     50sys_tls_set:
     51        b sys_tls_set
     52
    4953asm_delay_loop:
    5054        blr

  • arch/sparc64/src/dummy.s

    r9cbd27b r11cb08ca  
    4141.global fpu_init
    4242.global userspace
     43.global sys_tls_set
    4344
    4445.global dummy
    … …  
    5657fpu_init:
    5758userspace:
     59sys_tls_set:
    5860
    5961dummy:
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