Changes in kernel/arch/amd64/src/pm.c [dc0b964:149d14e5] in mainline

File:

• kernel/arch/amd64/src/pm.c (modified) (8 diffs)

kernel/arch/amd64/src/pm.c

@@ -28 +28 @@
  */
 
-/** @addtogroup amd64
+/** @addtogroup amd64   
  * @{
  */
@@ -52 +52 @@
         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
         /* KTEXT descriptor */
-        { .limit_0_15  = 0xffffU,
-          .base_0_15   = 0,
-          .base_16_23  = 0,
-          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
-          .limit_16_19 = 0x0fU,
-          .available   = 0,
-          .longmode    = 1,
+        { .limit_0_15  = 0xffff, 
+          .base_0_15   = 0, 
+          .base_16_23  = 0, 
+          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE, 
+          .limit_16_19 = 0xf, 
+          .available   = 0, 
+          .longmode    = 1, 
           .special     = 0,
-          .granularity = 1,
+          .granularity = 1, 
           .base_24_31  = 0 },
         /* KDATA descriptor */
-        { .limit_0_15  = 0xffffU,
-          .base_0_15   = 0,
-          .base_16_23  = 0,
-          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL,
-          .limit_16_19 = 0x0fU,
-          .available   = 0,
-          .longmode    = 0,
-          .special     = 0,
-          .granularity = 1,
+        { .limit_0_15  = 0xffff, 
+          .base_0_15   = 0, 
+          .base_16_23  = 0, 
+          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 
+          .limit_16_19 = 0xf, 
+          .available   = 0, 
+          .longmode    = 0, 
+          .special     = 0, 
+          .granularity = 1, 
           .base_24_31  = 0 },
         /* UDATA descriptor */
-        { .limit_0_15  = 0xffffU,
-          .base_0_15   = 0,
-          .base_16_23  = 0,
-          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER,
-          .limit_16_19 = 0x0fU,
-          .available   = 0,
-          .longmode    = 0,
+        { .limit_0_15  = 0xffff, 
+          .base_0_15   = 0, 
+          .base_16_23  = 0, 
+          .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 
+          .limit_16_19 = 0xf, 
+          .available   = 0, 
+          .longmode    = 0, 
+          .special     = 1, 
+          .granularity = 1, 
+          .base_24_31  = 0 },
+        /* UTEXT descriptor */
+        { .limit_0_15  = 0xffff, 
+          .base_0_15   = 0, 
+          .base_16_23  = 0, 
+          .access      = AR_PRESENT | AR_CODE | DPL_USER, 
+          .limit_16_19 = 0xf, 
+          .available   = 0, 
+          .longmode    = 1, 
+          .special     = 0, 
+          .granularity = 1, 
+          .base_24_31  = 0 },
+        /* KTEXT 32-bit protected, for protected mode before long mode */
+        { .limit_0_15  = 0xffff, 
+          .base_0_15   = 0, 
+          .base_16_23  = 0, 
+          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE, 
+          .limit_16_19 = 0xf, 
+          .available   = 0, 
+          .longmode    = 0, 
           .special     = 1,
-          .granularity = 1,
-          .base_24_31  = 0 },
-        /* UTEXT descriptor */
-        { .limit_0_15  = 0xffffU,
-          .base_0_15   = 0,
-          .base_16_23  = 0,
-          .access      = AR_PRESENT | AR_CODE | DPL_USER,
-          .limit_16_19 = 0x0fU,
-          .available   = 0,
-          .longmode    = 1,
-          .special     = 0,
-          .granularity = 1,
-          .base_24_31  = 0 },
-        /* KTEXT 32-bit protected, for protected mode before long mode */
-        { .limit_0_15  = 0xffffU,
-          .base_0_15   = 0,
-          .base_16_23  = 0,
-          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
-          .limit_16_19 = 0x0fU,
-          .available   = 0,
-          .longmode    = 0,
-          .special     = 1,
-          .granularity = 1,
+          .granularity = 1, 
           .base_24_31  = 0 },
         /* TSS descriptor - set up will be completed later,
@@ -111 +111 @@
         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
         /* VESA Init descriptor */
-#ifdef CONFIG_FB
-        {
-                0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
-                    0xf, 0, 0, 0, 0, 0
+#ifdef CONFIG_FB        
+        { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
+          0xf, 0, 0, 0, 0, 0
         }
 #endif
@@ -130 +129 @@
 {
         tss_descriptor_t *td = (tss_descriptor_t *) d;
-        
-        td->base_0_15 = base & 0xffffU;
-        td->base_16_23 = ((base) >> 16) & 0xffU;
-        td->base_24_31 = ((base) >> 24) & 0xffU;
+
+        td->base_0_15 = base & 0xffff;
+        td->base_16_23 = ((base) >> 16) & 0xff;
+        td->base_24_31 = ((base) >> 24) & 0xff;
         td->base_32_63 = ((base) >> 32);
 }
@@ -141 +140 @@
         tss_descriptor_t *td = (tss_descriptor_t *) d;
         
-        td->limit_0_15 = limit & 0xffffU;
-        td->limit_16_19 = (limit >> 16) & 0x0fU;
+        td->limit_0_15 = limit & 0xffff;
+        td->limit_16_19 = (limit >> 16) & 0xf;
 }
 
@@ -150 +149 @@
          * Offset is a linear address.
          */
-        d->offset_0_15 = offset & 0xffffU;
-        d->offset_16_31 = (offset >> 16) & 0xffffU;
+        d->offset_0_15 = offset & 0xffff;
+        d->offset_16_31 = offset >> 16 & 0xffff;
         d->offset_32_63 = offset >> 32;
 }
@@ -166 +165 @@
 {
         idescriptor_t *d;
-        unsigned int i;
-        
+        int i;
+
         for (i = 0; i < IDT_ITEMS; i++) {
                 d = &idt[i];
-                
+
                 d->unused = 0;
-                d->selector = GDT_SELECTOR(KTEXT_DES);
-                
+                d->selector = gdtselector(KTEXT_DES);
+
                 d->present = 1;
-                d->type = AR_INTERRUPT;  /* masking interrupt */
+                d->type = AR_INTERRUPT; /* masking interrupt */
+
+                idt_setoffset(d, ((uintptr_t) interrupt_handlers) +
+                    i * interrupt_handler_size);
         }
-        
-        d = &idt[0];
-        idt_setoffset(d++, (uintptr_t) &int_0);
-        idt_setoffset(d++, (uintptr_t) &int_1);
-        idt_setoffset(d++, (uintptr_t) &int_2);
-        idt_setoffset(d++, (uintptr_t) &int_3);
-        idt_setoffset(d++, (uintptr_t) &int_4);
-        idt_setoffset(d++, (uintptr_t) &int_5);
-        idt_setoffset(d++, (uintptr_t) &int_6);
-        idt_setoffset(d++, (uintptr_t) &int_7);
-        idt_setoffset(d++, (uintptr_t) &int_8);
-        idt_setoffset(d++, (uintptr_t) &int_9);
-        idt_setoffset(d++, (uintptr_t) &int_10);
-        idt_setoffset(d++, (uintptr_t) &int_11);
-        idt_setoffset(d++, (uintptr_t) &int_12);
-        idt_setoffset(d++, (uintptr_t) &int_13);
-        idt_setoffset(d++, (uintptr_t) &int_14);
-        idt_setoffset(d++, (uintptr_t) &int_15);
-        idt_setoffset(d++, (uintptr_t) &int_16);
-        idt_setoffset(d++, (uintptr_t) &int_17);
-        idt_setoffset(d++, (uintptr_t) &int_18);
-        idt_setoffset(d++, (uintptr_t) &int_19);
-        idt_setoffset(d++, (uintptr_t) &int_20);
-        idt_setoffset(d++, (uintptr_t) &int_21);
-        idt_setoffset(d++, (uintptr_t) &int_22);
-        idt_setoffset(d++, (uintptr_t) &int_23);
-        idt_setoffset(d++, (uintptr_t) &int_24);
-        idt_setoffset(d++, (uintptr_t) &int_25);
-        idt_setoffset(d++, (uintptr_t) &int_26);
-        idt_setoffset(d++, (uintptr_t) &int_27);
-        idt_setoffset(d++, (uintptr_t) &int_28);
-        idt_setoffset(d++, (uintptr_t) &int_29);
-        idt_setoffset(d++, (uintptr_t) &int_30);
-        idt_setoffset(d++, (uintptr_t) &int_31);
-        idt_setoffset(d++, (uintptr_t) &int_32);
-        idt_setoffset(d++, (uintptr_t) &int_33);
-        idt_setoffset(d++, (uintptr_t) &int_34);
-        idt_setoffset(d++, (uintptr_t) &int_35);
-        idt_setoffset(d++, (uintptr_t) &int_36);
-        idt_setoffset(d++, (uintptr_t) &int_37);
-        idt_setoffset(d++, (uintptr_t) &int_38);
-        idt_setoffset(d++, (uintptr_t) &int_39);
-        idt_setoffset(d++, (uintptr_t) &int_40);
-        idt_setoffset(d++, (uintptr_t) &int_41);
-        idt_setoffset(d++, (uintptr_t) &int_42);
-        idt_setoffset(d++, (uintptr_t) &int_43);
-        idt_setoffset(d++, (uintptr_t) &int_44);
-        idt_setoffset(d++, (uintptr_t) &int_45);
-        idt_setoffset(d++, (uintptr_t) &int_46);
-        idt_setoffset(d++, (uintptr_t) &int_47);
-        idt_setoffset(d++, (uintptr_t) &int_48);
-        idt_setoffset(d++, (uintptr_t) &int_49);
-        idt_setoffset(d++, (uintptr_t) &int_50);
-        idt_setoffset(d++, (uintptr_t) &int_51);
-        idt_setoffset(d++, (uintptr_t) &int_52);
-        idt_setoffset(d++, (uintptr_t) &int_53);
-        idt_setoffset(d++, (uintptr_t) &int_54);
-        idt_setoffset(d++, (uintptr_t) &int_55);
-        idt_setoffset(d++, (uintptr_t) &int_56);
-        idt_setoffset(d++, (uintptr_t) &int_57);
-        idt_setoffset(d++, (uintptr_t) &int_58);
-        idt_setoffset(d++, (uintptr_t) &int_59);
-        idt_setoffset(d++, (uintptr_t) &int_60);
-        idt_setoffset(d++, (uintptr_t) &int_61);
-        idt_setoffset(d++, (uintptr_t) &int_62);
-        idt_setoffset(d++, (uintptr_t) &int_63);
 }
 
@@ -292 +228 @@
          * to its own TSS. We just need to load the TR register.
          */
-        tr_load(GDT_SELECTOR(TSS_DES));
+        tr_load(gdtselector(TSS_DES));
 }