Changes in kernel/arch/ia32/include/mm/page.h [dc0b964:17ccb9d7] in mainline
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kernel/arch/ia32/include/mm/page.h
rdc0b964 r17ccb9d7 39 39 #include <trace.h> 40 40 41 #define PAGE_WIDTH 42 #define PAGE_SIZE 41 #define PAGE_WIDTH FRAME_WIDTH 42 #define PAGE_SIZE FRAME_SIZE 43 43 44 44 #ifdef KERNEL 45 45 46 46 #ifndef __ASM__ 47 48 #define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x80000000)) 49 #define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x80000000)) 50 51 #else /* __ASM__ */ 52 53 #define KA2PA(x) ((x) - 0x80000000) 54 #define PA2KA(x) ((x) + 0x80000000) 55 56 #endif /* __ASM__ */ 47 # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) 48 # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) 49 #else 50 # define KA2PA(x) ((x) - 0x80000000) 51 # define PA2KA(x) ((x) + 0x80000000) 52 #endif 57 53 58 54 /* … … 62 58 63 59 /* Number of entries in each level. */ 64 #define PTL0_ENTRIES_ARCH 65 #define PTL1_ENTRIES_ARCH 66 #define PTL2_ENTRIES_ARCH 67 #define PTL3_ENTRIES_ARCH 60 #define PTL0_ENTRIES_ARCH 1024 61 #define PTL1_ENTRIES_ARCH 0 62 #define PTL2_ENTRIES_ARCH 0 63 #define PTL3_ENTRIES_ARCH 1024 68 64 69 65 /* Page table sizes for each level. */ 70 #define PTL0_SIZE_ARCH 71 #define PTL1_SIZE_ARCH 72 #define PTL2_SIZE_ARCH 73 #define PTL3_SIZE_ARCH 66 #define PTL0_SIZE_ARCH ONE_FRAME 67 #define PTL1_SIZE_ARCH 0 68 #define PTL2_SIZE_ARCH 0 69 #define PTL3_SIZE_ARCH ONE_FRAME 74 70 75 71 /* Macros calculating indices for each level. */ 76 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ffU)77 #define PTL1_INDEX_ARCH(vaddr) 78 #define PTL2_INDEX_ARCH(vaddr) 79 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ffU)72 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) 73 #define PTL1_INDEX_ARCH(vaddr) 0 74 #define PTL2_INDEX_ARCH(vaddr) 0 75 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) 80 76 81 77 /* Get PTE address accessors for each level. */ … … 126 122 #define PTE_WRITABLE_ARCH(p) \ 127 123 ((p)->writeable != 0) 128 #define PTE_EXECUTABLE_ARCH(p) 124 #define PTE_EXECUTABLE_ARCH(p) 1 129 125 130 126 #ifndef __ASM__ … … 148 144 149 145 /** When bit on this position is 1, a reserved bit was set in page directory. */ 150 #define PFERR_CODE_RSVD (1 << 3) 146 #define PFERR_CODE_RSVD (1 << 3) 151 147 152 148 /** Page Table Entry. */
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