Changes in uspace/drv/ehci-hcd/pci.c [c060090:17d1542] in mainline
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uspace/drv/ehci-hcd/pci.c
rc060090 r17d1542 87 87 } while(0) 88 88 89 static int pci_read32( constddf_dev_t *dev, int address, uint32_t *value)89 static int pci_read32(ddf_dev_t *dev, int address, uint32_t *value) 90 90 { 91 91 PCI_READ(32); 92 92 } 93 static int pci_read16( constddf_dev_t *dev, int address, uint16_t *value)93 static int pci_read16(ddf_dev_t *dev, int address, uint16_t *value) 94 94 { 95 95 PCI_READ(16); 96 96 } 97 static int pci_read8( constddf_dev_t *dev, int address, uint8_t *value)97 static int pci_read8(ddf_dev_t *dev, int address, uint8_t *value) 98 98 { 99 99 PCI_READ(8); … … 115 115 } while(0) 116 116 117 static int pci_write32( constddf_dev_t *dev, int address, uint32_t value)117 static int pci_write32(ddf_dev_t *dev, int address, uint32_t value) 118 118 { 119 119 PCI_WRITE(32); 120 120 } 121 static int pci_write16( constddf_dev_t *dev, int address, uint16_t value)121 static int pci_write16(ddf_dev_t *dev, int address, uint16_t value) 122 122 { 123 123 PCI_WRITE(16); 124 124 } 125 static int pci_write8( constddf_dev_t *dev, int address, uint8_t value)125 static int pci_write8(ddf_dev_t *dev, int address, uint8_t value) 126 126 { 127 127 PCI_WRITE(8); … … 136 136 * @return Error code. 137 137 */ 138 int pci_get_my_registers( constddf_dev_t *dev,138 int pci_get_my_registers(ddf_dev_t *dev, 139 139 uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no) 140 140 { … … 206 206 * @return Error code. 207 207 */ 208 int pci_enable_interrupts( constddf_dev_t *device)208 int pci_enable_interrupts(ddf_dev_t *device) 209 209 { 210 210 const int parent_phone = … … 223 223 * @return Error code. 224 224 */ 225 int pci_disable_legacy( 226 const ddf_dev_t *device, uintptr_t reg_base, size_t reg_size, int irq) 225 int pci_disable_legacy(ddf_dev_t *device) 227 226 { 228 227 assert(device); … … 237 236 } else (void)0 238 237 239 /* Map EHCI registers */ 238 uintptr_t reg_base = 0; 239 size_t reg_size = 0; 240 int irq = 0; 241 242 int ret = pci_get_my_registers(device, ®_base, ®_size, &irq); 243 CHECK_RET_RETURN(ret, "Failed(%d) to get EHCI registers.\n", ret); 244 245 usb_log_info("EHCI: Memory registers:%p size: %zu irq:%d.\n", 246 (void *) reg_base, reg_size, irq); 247 248 249 /* map EHCI registers */ 240 250 void *regs = NULL; 241 intret = pio_enable((void*)reg_base, reg_size, ®s);251 ret = pio_enable((void*)reg_base, reg_size, ®s); 242 252 CHECK_RET_RETURN(ret, "Failed(%d) to map registers %p.\n", 243 253 ret, (void *) reg_base); … … 306 316 CHECK_RET_RETURN(ret, 307 317 "Failed(%d) zero USBLEGCTLSTS.\n", ret); 308 udelay(10);309 318 ret = pci_read32( 310 319 device, eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts); … … 341 350 usb_log_debug("USBCMD value: %x.\n", *usbcmd); 342 351 if (*usbcmd & USBCMD_RUN) { 352 *usbcmd = 0; 353 /* Wait until hc is halted */ 354 while ((*usbsts & USBSTS_HALTED) != 0); 343 355 *usbsts = 0x3f; /* ack all interrupts */ 344 356 *usbint = 0; /* disable all interrutps */ 345 357 *usbconf = 0; /* relase control of RH ports */ 346 347 *usbcmd = 0;348 /* Wait until hc is halted */349 while ((*usbsts & USBSTS_HALTED) == 0);350 358 usb_log_info("EHCI turned off.\n"); 351 359 } else {
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