Changeset 19b3cc6 in mainline for kernel/arch/ia32/src/smp/apic.c
- Timestamp:
- 2014-01-17T23:12:10Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e26a9d95
- Parents:
- fddffb2 (diff), facc34d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/src/smp/apic.c
rfddffb2 r19b3cc6 42 42 #include <interrupt.h> 43 43 #include <arch/interrupt.h> 44 #include < print.h>44 #include <log.h> 45 45 #include <arch/asm.h> 46 46 #include <arch.h> … … 135 135 { 136 136 #ifdef CONFIG_DEBUG 137 printf("cpu%u: APIC spurious interrupt\n", CPU->id);137 log(LF_ARCH, LVL_DEBUG, "cpu%u: APIC spurious interrupt", CPU->id); 138 138 #endif 139 139 } … … 241 241 esr.value = l_apic[ESR]; 242 242 243 if (esr.send_checksum_error) 244 printf("Send Checksum Error\n"); 245 if (esr.receive_checksum_error) 246 printf("Receive Checksum Error\n"); 247 if (esr.send_accept_error) 248 printf("Send Accept Error\n"); 249 if (esr.receive_accept_error) 250 printf("Receive Accept Error\n"); 251 if (esr.send_illegal_vector) 252 printf("Send Illegal Vector\n"); 253 if (esr.received_illegal_vector) 254 printf("Received Illegal Vector\n"); 255 if (esr.illegal_register_address) 256 printf("Illegal Register Address\n"); 243 if (esr.err_bitmap) { 244 log_begin(LF_ARCH, LVL_ERROR); 245 log_printf("APIC errors detected:"); 246 if (esr.send_checksum_error) 247 log_printf("\nSend Checksum Error"); 248 if (esr.receive_checksum_error) 249 log_printf("\nReceive Checksum Error"); 250 if (esr.send_accept_error) 251 log_printf("\nSend Accept Error"); 252 if (esr.receive_accept_error) 253 log_printf("\nReceive Accept Error"); 254 if (esr.send_illegal_vector) 255 log_printf("\nSend Illegal Vector"); 256 if (esr.received_illegal_vector) 257 log_printf("\nReceived Illegal Vector"); 258 if (esr.illegal_register_address) 259 log_printf("\nIllegal Register Address"); 260 log_end(); 261 } 257 262 258 263 return !esr.err_bitmap; … … 270 275 retries = 0; 271 276 #ifdef CONFIG_DEBUG 272 printf("IPI is pending.\n");277 log(LF_ARCH, LVL_DEBUG, "IPI is pending."); 273 278 #endif 274 279 delay(20); … … 489 494 { 490 495 #ifdef LAPIC_VERBOSE 491 printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n", 496 log_begin(LF_ARCH, LVL_DEBUG); 497 log_printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n", 492 498 CPU->id, l_apic_id()); 493 499 494 500 lvt_tm_t tm; 495 501 tm.value = l_apic[LVT_Tm]; 496 printf("LVT Tm: vector=%" PRIu8 ", %s, %s, %s\n",502 log_printf("LVT Tm: vector=%" PRIu8 ", %s, %s, %s\n", 497 503 tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], 498 504 tm_mode_str[tm.mode]); … … 500 506 lvt_lint_t lint; 501 507 lint.value = l_apic[LVT_LINT0]; 502 printf("LVT LINT0: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n",508 log_printf("LVT LINT0: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n", 503 509 tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], 504 510 intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], … … 506 512 507 513 lint.value = l_apic[LVT_LINT1]; 508 printf("LVT LINT1: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n",514 log_printf("LVT LINT1: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n", 509 515 tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], 510 516 intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], … … 513 519 lvt_error_t error; 514 520 error.value = l_apic[LVT_Err]; 515 printf("LVT Err: vector=%" PRIu8 ", %s, %s\n", error.vector,521 log_printf("LVT Err: vector=%" PRIu8 ", %s, %s\n", error.vector, 516 522 delivs_str[error.delivs], mask_str[error.masked]); 523 log_end(); 517 524 #endif 518 525 }
Note:
See TracChangeset
for help on using the changeset viewer.