Changeset 1b03ed3 in mainline


Ignore:
Timestamp:
2007-11-16T16:20:45Z (17 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
454889c
Parents:
9c2fb97
Message:

Support for six syscall arguments on ia64.

—iSupis line, and those below, will be ignored—

M kernel/arch/ia64/include/interrupt.h
M kernel/arch/ia64/src/ivt.S
M kernel/arch/ia64/src/interrupt.c
M uspace/lib/libc/arch/ia64/src/syscall.S

Files:
4 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia64/include/interrupt.h

    r9c2fb97 r1b03ed3  
    114114       
    115115        /*
    116          * The following variables are defined only for break_instruction handler.
     116         * The following variables are defined only for break_instruction
     117         * handler.
    117118         */
    118119        uint64_t in0;
    … …  
    121122        uint64_t in3;
    122123        uint64_t in4;
     124        uint64_t in5;
     125        uint64_t in6;
    123126} istate_t;
    124127

  • kernel/arch/ia64/src/interrupt.c

    r9c2fb97 r1b03ed3  
    127127       
    128128        if (vector >= VECTORS_16_BUNDLE_START)
    129                 return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
     129                return vector_names_16_bundle[(vector -
     130                    VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)];
    130131        else
    131                 return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
     132                return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)];
    132133}
    133134
    … …  
    142143        putchar('\n');
    143144        printf("Interrupted context dump:\n");
    144         printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
    145         printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
    146         printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
    147         printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
     145        printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp,
     146            istate->ar_bspstore);
     147        printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat,
     148            istate->ar_rsc);
     149        printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs,
     150            istate->ar_pfs);
     151        printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value,
     152            istate->cr_ipsr);
    148153       
    149         printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
     154        printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip,
     155            istate->cr_isr.ei, iip);
    150156        printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
    151157        printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
    … …  
    191197        scheduler_fpu_lazy_request();   
    192198#else
    193         fault_if_from_uspace(istate, "Interruption: %#hx (%s)", (uint16_t) vector, vector_to_string(vector));
     199        fault_if_from_uspace(istate, "Interruption: %#hx (%s)",
     200            (uint16_t) vector, vector_to_string(vector));
    194201        dump_interrupted_context(istate);
    195         panic("Interruption: %#hx (%s)\n", (uint16_t) vector, vector_to_string(vector));
     202        panic("Interruption: %#hx (%s)\n", (uint16_t) vector,
     203            vector_to_string(vector));
    196204#endif
    197205}
    … …  
    214222        }
    215223
    216         return syscall_handler(istate->in0, istate->in1, istate->in2, istate->in3, istate->in4);
     224        return syscall_handler(istate->in0, istate->in1, istate->in2,
     225            istate->in3, istate->in4, istate->in5, istate->in6);
    217226}
    218227
    219228void universal_handler(uint64_t vector, istate_t *istate)
    220229{
    221         fault_if_from_uspace(istate,"Interruption: %#hx (%s)\n",(uint16_t) vector, vector_to_string(vector));
     230        fault_if_from_uspace(istate, "Interruption: %#hx (%s)\n",
     231            (uint16_t) vector, vector_to_string(vector));
    222232        dump_interrupted_context(istate);
    223         panic("Interruption: %#hx (%s)\n", (uint16_t) vector, vector_to_string(vector));
     233        panic("Interruption: %#hx (%s)\n", (uint16_t) vector,
     234            vector_to_string(vector));
    224235}
    225236
    … …  
    245256
    246257                default:
    247                         panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
     258                        panic("\nUnhandled External Interrupt Vector %d\n",
     259                            ivr.vector);
    248260                        break;
    249261                }

  • kernel/arch/ia64/src/ivt.S

    r9c2fb97 r1b03ed3  
    3434
    3535#define FRS_TO_SAVE 30
    36 #define STACK_ITEMS             (19 + FRS_TO_SAVE*2)
     36#define STACK_ITEMS             (21 + FRS_TO_SAVE * 2)
    3737#define STACK_FRAME_SIZE        ALIGN_UP((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT)
    3838
    … …  
    136136         */
    137137        mov R_TMP = 0x2c00 ;;
    138         cmp.eq p6,p5 = R_OFFS, R_TMP ;;
    139        
    140         /*
    141          * From now on, if this is break_instruction handler, p6 is true and p5 is false.
    142          * Otherwise p6 is false and p5 is true.
     138        cmp.eq p6, p5 = R_OFFS, R_TMP ;;
     139       
     140        /*
     141         * From now on, if this is break_instruction handler, p6 is true and p5
     142         * is false. Otherwise p6 is false and p5 is true.
    143143         * Note that p5 is a preserved predicate register and we make use of it.
    144144         */
    145145
     146(p6)    st8 [r31] = r38, -8 ;;          /* save in6 */
     147(p6)    st8 [r31] = r37, -8 ;;          /* save in5 */
    146148(p6)    st8 [r31] = r36, -8 ;;          /* save in4 */ 
    147149(p6)    st8 [r31] = r35, -8 ;;          /* save in3 */
    … …  
    149151(p6)    st8 [r31] = r33, -8 ;;          /* save in1 */
    150152(p6)    st8 [r31] = r32, -8 ;;          /* save in0 */
    151 (p5)    add r31 = -40, r31 ;;
     153(p5)    add r31 = -56, r31 ;;
    152154   
    153155        st8 [r31] = r30, -8 ;;          /* save old stack pointer */
    … …  
    179181       
    180182        /*
    181          * Inspect BSPSTORE to figure out whether it is necessary to switch to kernel BSPSTORE.
     183         * Inspect BSPSTORE to figure out whether it is necessary to switch to
     184         * kernel BSPSTORE.
    182185         */
    183186(p1)    shr.u r30 = r28, VRN_SHIFT ;;
    … …  
    206209
    207210    /* 16. RSE switch to interrupted context */
    208         cover                           /* allocate zerro size frame (step 1 (from Intel Docs)) */
    209 
    210         add r31 = (STACK_SCRATCH_AREA_SIZE+(FRS_TO_SAVE*2*8)), r12 ;;
     211        cover                           /* allocate zero size frame (step 1 (from Intel Docs)) */
     212
     213        add r31 = (STACK_SCRATCH_AREA_SIZE + (FRS_TO_SAVE * 2 * 8)), r12 ;;
    211214
    212215        ld8 r30 = [r31], +8 ;;          /* load ar.bsp */

  • uspace/lib/libc/arch/ia64/src/syscall.S

    r9c2fb97 r1b03ed3  
    3939.global __syscall
    4040__syscall:
    41         alloc r14 = ar.pfs, 5, 0, 0, 0 ;;
     41        alloc r14 = ar.pfs, 7, 0, 0, 0 ;;
    4242        break SYSCALL_IMM
    4343        mov ar.pfs = r14 ;;
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