Changeset 1b109cb in mainline for arch/mips32/src/exception.c


Ignore:
Timestamp:
2006-03-20T13:39:56Z (19 years ago)
Author:
Ondrej Palkovsky <ondrap@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9d3e185
Parents:
8d25b44
Message:

Cleanup of mips

  • inline register reads
  • better fpu disable/enable - global settings is automatically propagated to task
  • fast syscall
File:
1 edited

Legend:

Unmodified
Added
Removed
  • arch/mips32/src/exception.c

    r8d25b44 r1b109cb  
    130130}
    131131
    132 #include <debug.h>
     132__native syscall_handler(__native a0, __native a1, __native a2,
     133                         __native a3, __native sysnum)
     134{
     135        if (sysnum < SYSCALL_END)
     136                return syscall_table[sysnum](a0,a1,a2,a3);
     137        panic("Undefined syscall %d", sysnum);
     138}
     139
    133140/** Handle syscall userspace call */
    134141static void syscall_exception(int n, istate_t *istate)
    135142{
    136         interrupts_enable();
    137         if (istate->t0 < SYSCALL_END)
    138                 istate->v0 = syscall_table[istate->t0](istate->a0,
    139                                                        istate->a1,
    140                                                        istate->a2,
    141                                                        istate->a3);
    142         else
    143                 panic("Undefined syscall %d", istate->a3);
    144         istate->epc += 4;
    145         interrupts_disable();
    146 }
    147 
    148 void exception(istate_t *istate)
    149 {
    150         int cause;
    151         int excno;
    152 
    153         ASSERT(CPU != NULL);
    154 
    155         /*
    156          * NOTE ON OPERATION ORDERING
    157          *
    158          * On entry, interrupts_disable() must be called before
    159          * exception bit is cleared.
    160          */
    161 
    162         interrupts_disable();
    163         cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
    164                                                 cp0_status_um_bit));
    165 
    166         /* Save istate so that the threads can access it */
    167         /* If THREAD->istate is set, this is nested exception,
    168          * do not rewrite it
    169          */
    170         if (THREAD && !THREAD->istate)
    171                 THREAD->istate = istate;
    172 
    173         cause = cp0_cause_read();
    174         excno = cp0_cause_excno(cause);
    175         /* Dispatch exception */
    176         exc_dispatch(excno, istate);
    177 
    178         /* Set to NULL, so that we can still support nested
    179          * exceptions
    180          * TODO: We should probably set EXL bit before this command,
    181          * nesting. On the other hand, if some exception occurs between
    182          * here and ERET, it won't set anything on the istate anyway.
    183          */
    184         if (THREAD)
    185                 THREAD->istate = NULL;
     143        panic("Syscall is handled through shortcut");
    186144}
    187145
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