Changes in kernel/arch/sparc64/src/mm/sun4v/tlb.c [560b81c:1dbc43f] in mainline

File:

• kernel/arch/sparc64/src/mm/sun4v/tlb.c (modified) (8 diffs)

kernel/arch/sparc64/src/mm/sun4v/tlb.c

@@ -46 +46 @@
 #include <arch.h>
 #include <print.h>
-#include <log.h>
 #include <typedefs.h>
 #include <config.h>
@@ -208 +207 @@
 
 /** ITLB miss handler. */
-void fast_instruction_access_mmu_miss(unsigned int tt, istate_t *istate)
+void fast_instruction_access_mmu_miss(sysarg_t unused, istate_t *istate)
 {
         uintptr_t va = ALIGN_DOWN(istate->tpc, PAGE_SIZE);
-        pte_t t;
-
-        bool found = page_mapping_find(AS, va, true, &t);
-        if (found && PTE_EXECUTABLE(&t)) {
-                ASSERT(t.p);
-
+        pte_t *t;
+
+        t = page_mapping_find(AS, va, true);
+
+        if (t && PTE_EXECUTABLE(t)) {
                 /*
                  * The mapping was found in the software page hash table.
                  * Insert it into ITLB.
                  */
-                t.a = true;
-                itlb_pte_copy(&t);
+                t->a = true;
+                itlb_pte_copy(t);
 #ifdef CONFIG_TSB
-                itsb_pte_copy(&t);
-#endif
-                page_mapping_update(AS, va, true, &t);
+                itsb_pte_copy(t);
+#endif
         } else {
                 /*
@@ -241 +238 @@
  * low-level, assembly language part of the fast_data_access_mmu_miss handler.
  *
- * @param tt            Trap type.
+ * @param page_and_ctx  A 64-bit value describing the fault. The most
+ *                      significant 51 bits of the value contain the virtual
+ *                      address which caused the fault truncated to the page
+ *                      boundary. The least significant 13 bits of the value
+ *                      contain the number of the context in which the fault
+ *                      occurred.
  * @param istate        Interrupted state saved on the stack.
  */
-void fast_data_access_mmu_miss(unsigned int tt, istate_t *istate)
-{
-        pte_t t;
-        uintptr_t va = DMISS_ADDRESS(istate->tlb_tag_access);
-        uint16_t ctx = DMISS_CONTEXT(istate->tlb_tag_access);
-        as_t *as = AS;
+void fast_data_access_mmu_miss(uint64_t page_and_ctx, istate_t *istate)
+{
+        pte_t *t;
+        uintptr_t va = DMISS_ADDRESS(page_and_ctx);
+        uint16_t ctx = DMISS_CONTEXT(page_and_ctx);
 
         if (ctx == ASID_KERNEL) {
@@ -255 +256 @@
                         /* NULL access in kernel */
                         panic("NULL pointer dereference.");
-                } else if (va >= end_of_identity) {
-                        /* Kernel non-identity */
-                        as = AS_KERNEL;
-                } else {
-                        panic("Unexpected kernel page fault.");
                 }
-        }
-
-        bool found = page_mapping_find(as, va, true, &t);
-        if (found) {
-                ASSERT(t.p);
-
+                panic("Unexpected kernel page fault.");
+        }
+
+        t = page_mapping_find(AS, va, true);
+        if (t) {
                 /*
                  * The mapping was found in the software page hash table.
                  * Insert it into DTLB.
                  */
-                t.a = true;
-                dtlb_pte_copy(&t, true);
+                t->a = true;
+                dtlb_pte_copy(t, true);
 #ifdef CONFIG_TSB
-                dtsb_pte_copy(&t, true);
-#endif
-                page_mapping_update(as, va, true, &t);
+                dtsb_pte_copy(t, true);
+#endif
         } else {
                 /*
@@ -288 +282 @@
 /** DTLB protection fault handler.
  *
- * @param tt            Trap type.
+ * @param page_and_ctx  A 64-bit value describing the fault. The most
+ *                      significant 51 bits of the value contain the virtual
+ *                      address which caused the fault truncated to the page
+ *                      boundary. The least significant 13 bits of the value
+ *                      contain the number of the context in which the fault
+ *                      occurred.
  * @param istate        Interrupted state saved on the stack.
  */
-void fast_data_access_protection(unsigned int tt, istate_t *istate)
-{
-        pte_t t;
-        uintptr_t va = DMISS_ADDRESS(istate->tlb_tag_access);
-        uint16_t ctx = DMISS_CONTEXT(istate->tlb_tag_access);
-        as_t *as = AS;
-
-        if (ctx == ASID_KERNEL)
-                as = AS_KERNEL;
-
-        bool found = page_mapping_find(as, va, true, &t);
-        if (found && PTE_WRITABLE(&t)) {
-                ASSERT(t.p);
-
+void fast_data_access_protection(uint64_t page_and_ctx, istate_t *istate)
+{
+        pte_t *t;
+        uintptr_t va = DMISS_ADDRESS(page_and_ctx);
+        uint16_t ctx = DMISS_CONTEXT(page_and_ctx);
+
+        t = page_mapping_find(AS, va, true);
+        if (t && PTE_WRITABLE(t)) {
                 /*
                  * The mapping was found in the software page hash table and is
@@ -310 +303 @@
                  * into DTLB.
                  */
-                t.a = true;
-                t.d = true;
+                t->a = true;
+                t->d = true;
                 mmu_demap_page(va, ctx, MMU_FLAG_DTLB);
-                dtlb_pte_copy(&t, false);
+                dtlb_pte_copy(t, false);
 #ifdef CONFIG_TSB
-                dtsb_pte_copy(&t, false);
-#endif
-                page_mapping_update(as, va, true, &t);
+                dtsb_pte_copy(t, false);
+#endif
         } else {
                 /*
@@ -334 +326 @@
 void tlb_print(void)
 {
-        log(LF_ARCH, LVL_WARN, "Operation not possible on Niagara.");
+        printf("Operation not possible on Niagara.\n");
 }
 
@@ -391 +383 @@
 
         for (i = 0; i < cnt; i++) {
-                __hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, page + i * PAGE_SIZE,
-                    asid, MMU_FLAG_DTLB | MMU_FLAG_ITLB);
+                __hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, page, asid,
+                        MMU_FLAG_DTLB | MMU_FLAG_ITLB);
         }