Changeset 208259c in mainline
- Timestamp:
- 2006-06-09T12:51:12Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 92922e6
- Parents:
- 22870b2
- Location:
- arch/ia64
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/include/mm/tlb.h
r22870b2 r208259c 80 80 81 81 extern void dtlb_kernel_mapping_insert(__address page, __address frame, bool dtr, index_t tr); 82 extern void dtr_purge(__address page, count_t width); 82 83 83 84 extern void dtc_pte_copy(pte_t *t); -
arch/ia64/src/mm/tlb.c
r22870b2 r208259c 190 190 } 191 191 192 193 192 /** Insert data into data translation cache. 194 193 * … … 342 341 /** Insert data into DTLB. 343 342 * 344 * @param va Virtual page address. 345 * @param asid Address space identifier. 346 * @param entry The rest of TLB entry as required by TLB insertion format. 343 * @param page Virtual page address including VRN bits. 344 * @param frame Physical frame address. 347 345 * @param dtr If true, insert into data translation register, use data translation cache otherwise. 348 346 * @param tr Translation register if dtr is true, ignored otherwise. … … 369 367 dtc_mapping_insert(page, ASID_KERNEL, entry); 370 368 } 369 370 /** Purge kernel entries from DTR. 371 * 372 * Purge DTR entries used by the kernel. 373 * 374 * @param page Virtual page address including VRN bits. 375 * @param width Width of the purge in bits. 376 */ 377 void dtr_purge(__address page, count_t width) 378 { 379 __asm__ volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width<<2)); 380 } 381 371 382 372 383 /** Copy content of PTE into data translation cache. -
arch/ia64/src/proc/scheduler.c
r22870b2 r208259c 54 54 * Use DTR[TR_KSTACK1] and DTR[TR_KSTACK2] to map it. 55 55 */ 56 57 /* purge DTR[TR_STACK1] and DTR[TR_STACK2] */ 58 dtr_purge((__address) THREAD->kstack, PAGE_WIDTH+1); 59 60 /* insert DTR[TR_STACK1] and DTR[TR_STACK2] */ 56 61 dtlb_kernel_mapping_insert((__address) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK1); 57 62 dtlb_kernel_mapping_insert((__address) THREAD->kstack + PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true, DTR_KSTACK2);
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