Changes in kernel/arch/amd64/include/interrupt.h [7a0359b:22a28a69] in mainline
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kernel/arch/amd64/include/interrupt.h
r7a0359b r22a28a69 38 38 #include <typedefs.h> 39 39 #include <arch/pm.h> 40 #include <trace.h>41 40 42 #define IVT_ITEMS 43 #define IVT_FIRST 41 #define IVT_ITEMS IDT_ITEMS 42 #define IVT_FIRST 0 44 43 45 #define EXC_COUNT 46 #define IRQ_COUNT 44 #define EXC_COUNT 32 45 #define IRQ_COUNT 16 47 46 48 #define IVT_EXCBASE 49 #define IVT_IRQBASE 50 #define IVT_FREEBASE 47 #define IVT_EXCBASE 0 48 #define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) 49 #define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) 51 50 52 #define IRQ_CLK 53 #define IRQ_KBD 54 #define IRQ_PIC1 55 #define IRQ_PIC_SPUR 56 #define IRQ_MOUSE 57 #define IRQ_DP8390 51 #define IRQ_CLK 0 52 #define IRQ_KBD 1 53 #define IRQ_PIC1 2 54 #define IRQ_PIC_SPUR 7 55 #define IRQ_MOUSE 12 56 #define IRQ_DP8390 9 58 57 59 /* This one must have four least significant bits set to ones */60 #define VECTOR_APIC_SPUR 58 /* this one must have four least significant bits set to ones */ 59 #define VECTOR_APIC_SPUR (IVT_ITEMS - 1) 61 60 62 61 #if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS) … … 64 63 #endif 65 64 66 #define VECTOR_DEBUG 67 #define VECTOR_CLK 68 #define VECTOR_PIC_SPUR 69 #define VECTOR_SYSCALL 70 #define VECTOR_TLB_SHOOTDOWN_IPI 71 #define VECTOR_DEBUG_IPI 65 #define VECTOR_DEBUG 1 66 #define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) 67 #define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) 68 #define VECTOR_SYSCALL IVT_FREEBASE 69 #define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) 70 #define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) 72 71 73 72 /** This is passed to interrupt handlers */ … … 87 86 uint64_t cs; 88 87 uint64_t rflags; 89 uint64_t stack[]; 88 uint64_t stack[]; /* Additional data on stack */ 90 89 } istate_t; 91 90 92 91 /** Return true if exception happened while in userspace */ 93 NO_TRACEstatic inline int istate_from_uspace(istate_t *istate)92 static inline int istate_from_uspace(istate_t *istate) 94 93 { 95 94 return !(istate->rip & 0x8000000000000000); 96 95 } 97 96 98 NO_TRACE static inline void istate_set_retaddr(istate_t *istate, 99 uintptr_t retaddr) 97 static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr) 100 98 { 101 99 istate->rip = retaddr; 102 100 } 103 104 NO_TRACE static inline unative_t istate_get_pc(istate_t *istate) 101 static inline unative_t istate_get_pc(istate_t *istate) 105 102 { 106 103 return istate->rip; 107 104 } 108 109 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate) 105 static inline unative_t istate_get_fp(istate_t *istate) 110 106 { 111 107 return istate->rbp; 112 108 } 113 109 114 extern void (* disable_irqs_function)(uint16_t );115 extern void (* enable_irqs_function)(uint16_t );110 extern void (* disable_irqs_function)(uint16_t irqmask); 111 extern void (* enable_irqs_function)(uint16_t irqmask); 116 112 extern void (* eoi_function)(void); 117 113 118 114 extern void interrupt_init(void); 119 extern void trap_virtual_enable_irqs(uint16_t); 120 extern void trap_virtual_disable_irqs(uint16_t); 115 extern void trap_virtual_enable_irqs(uint16_t irqmask); 116 extern void trap_virtual_disable_irqs(uint16_t irqmask); 117 118 /* AMD64 - specific page handler */ 119 extern void ident_page_fault(unsigned int, istate_t *); 121 120 122 121 #endif
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