Changes in kernel/arch/amd64/src/asm.S [c0e9f3f:22c3444] in mainline
- File:
-
- 1 edited
-
kernel/arch/amd64/src/asm.S (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/asm.S
rc0e9f3f r22c3444 26 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 27 */ 28 29 #define IREGISTER_SPACE 80 30 31 #define IOFFSET_RAX 0x00 32 #define IOFFSET_RCX 0x08 33 #define IOFFSET_RDX 0x10 34 #define IOFFSET_RSI 0x18 35 #define IOFFSET_RDI 0x20 36 #define IOFFSET_R8 0x28 37 #define IOFFSET_R9 0x30 38 #define IOFFSET_R10 0x38 39 #define IOFFSET_R11 0x40 40 #define IOFFSET_RBP 0x48 41 42 /** 43 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int 44 * has no error word and 1 means interrupt with error word 45 * 46 */ 47 #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 28 48 29 49 #include <arch/pm.h> … … 154 174 ret 155 175 156 #define ISTATE_OFFSET_RAX 0 157 #define ISTATE_OFFSET_RBX 8 158 #define ISTATE_OFFSET_RCX 16 159 #define ISTATE_OFFSET_RDX 24 160 #define ISTATE_OFFSET_RSI 32 161 #define ISTATE_OFFSET_RDI 40 162 #define ISTATE_OFFSET_RBP 48 163 #define ISTATE_OFFSET_R8 56 164 #define ISTATE_OFFSET_R9 64 165 #define ISTATE_OFFSET_R10 72 166 #define ISTATE_OFFSET_R11 80 167 #define ISTATE_OFFSET_R12 88 168 #define ISTATE_OFFSET_R13 96 169 #define ISTATE_OFFSET_R14 104 170 #define ISTATE_OFFSET_R15 112 171 #define ISTATE_OFFSET_ALIGNMENT 120 172 #define ISTATE_OFFSET_RBP_FRAME 128 173 #define ISTATE_OFFSET_RIP_FRAME 136 174 #define ISTATE_OFFSET_ERROR_WORD 144 175 #define ISTATE_OFFSET_RIP 152 176 #define ISTATE_OFFSET_CS 160 177 #define ISTATE_OFFSET_RFLAGS 168 178 #define ISTATE_OFFSET_RSP 176 179 #define ISTATE_OFFSET_SS 184 180 181 /* 182 * Size of the istate structure without the hardware-saved part and without the 183 * error word. 184 */ 185 #define ISTATE_SOFT_SIZE 144 186 187 /** 188 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int 189 * has no error word and 1 means interrupt with error word 190 * 191 */ 192 #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 193 194 #define INTERRUPT_ALIGN 256 176 /** Push all volatile general purpose registers on stack 177 * 178 */ 179 .macro save_all_gpr 180 movq %rax, IOFFSET_RAX(%rsp) 181 movq %rcx, IOFFSET_RCX(%rsp) 182 movq %rdx, IOFFSET_RDX(%rsp) 183 movq %rsi, IOFFSET_RSI(%rsp) 184 movq %rdi, IOFFSET_RDI(%rsp) 185 movq %r8, IOFFSET_R8(%rsp) 186 movq %r9, IOFFSET_R9(%rsp) 187 movq %r10, IOFFSET_R10(%rsp) 188 movq %r11, IOFFSET_R11(%rsp) 189 movq %rbp, IOFFSET_RBP(%rsp) 190 .endm 191 192 .macro restore_all_gpr 193 movq IOFFSET_RAX(%rsp), %rax 194 movq IOFFSET_RCX(%rsp), %rcx 195 movq IOFFSET_RDX(%rsp), %rdx 196 movq IOFFSET_RSI(%rsp), %rsi 197 movq IOFFSET_RDI(%rsp), %rdi 198 movq IOFFSET_R8(%rsp), %r8 199 movq IOFFSET_R9(%rsp), %r9 200 movq IOFFSET_R10(%rsp), %r10 201 movq IOFFSET_R11(%rsp), %r11 202 movq IOFFSET_RBP(%rsp), %rbp 203 .endm 204 205 #define INTERRUPT_ALIGN 128 195 206 196 207 /** Declare interrupt handlers … … 218 229 * Version with error word. 219 230 */ 220 subq $I STATE_SOFT_SIZE, %rsp231 subq $IREGISTER_SPACE, %rsp 221 232 .else 222 233 /* 223 * Version without error word .234 * Version without error word, 224 235 */ 225 subq $(I STATE_SOFT_SIZE + 8), %rsp236 subq $(IREGISTER_SPACE + 8), %rsp 226 237 .endif 227 238 .else 228 239 /* 229 * Version without error word .240 * Version without error word, 230 241 */ 231 subq $(I STATE_SOFT_SIZE + 8), %rsp242 subq $(IREGISTER_SPACE + 8), %rsp 232 243 .endif 233 244 245 save_all_gpr 246 cld 247 234 248 /* 235 * Save the general purpose registers.236 */237 movq %rax, ISTATE_OFFSET_RAX(%rsp)238 movq %rbx, ISTATE_OFFSET_RBX(%rsp)239 movq %rcx, ISTATE_OFFSET_RCX(%rsp)240 movq %rdx, ISTATE_OFFSET_RDX(%rsp)241 movq %rsi, ISTATE_OFFSET_RSI(%rsp)242 movq %rdi, ISTATE_OFFSET_RDI(%rsp)243 movq %rbp, ISTATE_OFFSET_RBP(%rsp)244 movq %r8, ISTATE_OFFSET_R8(%rsp)245 movq %r9, ISTATE_OFFSET_R9(%rsp)246 movq %r10, ISTATE_OFFSET_R10(%rsp)247 movq %r11, ISTATE_OFFSET_R11(%rsp)248 movq %r12, ISTATE_OFFSET_R12(%rsp)249 movq %r13, ISTATE_OFFSET_R13(%rsp)250 movq %r14, ISTATE_OFFSET_R14(%rsp)251 movq %r15, ISTATE_OFFSET_R15(%rsp)252 253 /*254 * Imitate a regular stack frame linkage.255 249 * Stop stack traces here if we came from userspace. 256 250 */ 251 movq %cs, %rax 257 252 xorq %rdx, %rdx 258 cmpq $(gdtselector(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp) 259 cmovnzq %rdx, %rbp 260 261 movq %rbp, ISTATE_OFFSET_RBP_FRAME(%rsp) 262 movq ISTATE_OFFSET_RIP(%rsp), %rax 263 movq %rax, ISTATE_OFFSET_RIP_FRAME(%rsp) 264 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp 265 266 movq $(\i), %rdi /* pass intnum in the first argument */ 267 movq %rsp, %rsi /* pass istate address in the second argument */ 268 269 cld 270 253 cmpq %rax, IREGISTER_SPACE+16(%rsp) 254 cmovneq %rdx, %rbp 255 256 movq $(\i), %rdi /* %rdi - first argument */ 257 movq %rsp, %rsi /* %rsi - pointer to istate */ 258 271 259 /* Call exc_dispatch(i, istate) */ 272 260 call exc_dispatch 273 274 /* 275 * Restore all scratch registers and the preserved registers we have 276 * clobbered in this handler (i.e. RBP). 277 */ 278 movq ISTATE_OFFSET_RAX(%rsp), %rax 279 movq ISTATE_OFFSET_RCX(%rsp), %rcx 280 movq ISTATE_OFFSET_RDX(%rsp), %rdx 281 movq ISTATE_OFFSET_RSI(%rsp), %rsi 282 movq ISTATE_OFFSET_RDI(%rsp), %rdi 283 movq ISTATE_OFFSET_RBP(%rsp), %rbp 284 movq ISTATE_OFFSET_R8(%rsp), %r8 285 movq ISTATE_OFFSET_R9(%rsp), %r9 286 movq ISTATE_OFFSET_R10(%rsp), %r10 287 movq ISTATE_OFFSET_R11(%rsp), %r11 261 262 restore_all_gpr 288 263 289 264 /* $8 = Skip error word */ 290 addq $(I STATE_SOFT_SIZE + 8), %rsp265 addq $(IREGISTER_SPACE + 8), %rsp 291 266 iretq 292 267
Note:
See TracChangeset
for help on using the changeset viewer.
