Changeset 23d22eb in mainline


Ignore:
Timestamp:
2006-03-17T11:55:43Z (19 years ago)
Author:
Ondrej Palkovsky <ondrap@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
bd72b475
Parents:
4e49572
Message:

Ported AMD64 debugger to ia32 and enabled AS watchpoint to ia32 as well.

Files:
2 added
9 edited

Legend:

Unmodified
Added
Removed

  • arch/amd64/src/debugger.c

    r4e49572 r23d22eb  
    192192}
    193193
     194#ifdef amd64
     195# define getip(x)  ((x)->rip)
     196#else
     197# define getip(x)  ((x)->eip)
     198#endif
     199
    194200static void handle_exception(int slot, istate_t *istate)
    195201{
    … …  
    208214                }
    209215        }
    210         printf("Reached breakpoint %d:%P(%s)\n", slot, istate->rip,
    211                get_symtab_entry(istate->rip));
     216        printf("Reached breakpoint %d:%P(%s)\n", slot, getip(istate),
     217               get_symtab_entry(getip(istate)));
    212218        printf("***Type 'exit' to exit kconsole.\n");
    213219        atomic_set(&haltstate,1);
    … …  
    222228       
    223229        /* Set RF to restart the instruction  */
     230#ifdef amd64       
    224231        istate->rflags |= RFLAGS_RF;
     232#else
     233        istate->eflags |= EFLAGS_RF;
     234#endif
    225235
    226236        dr6 = read_dr6();

  • arch/amd64/src/proc/scheduler.c

    r4e49572 r23d22eb  
    3939        CPU->arch.tss->rsp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
    4040
    41         /* Syscall support - write thread address to hidden part of gs */
     41        /* Syscall support - write thread stack address to hidden part of gs */
    4242        swapgs();
    4343        write_msr(AMD_MSR_GS,

  • arch/ia32/Makefile.inc

    r4e49572 r23d22eb  
    129129        arch/$(ARCH)/src/drivers/ega.c \
    130130        arch/$(ARCH)/src/boot/boot.S \
    131         arch/$(ARCH)/src/fpu_context.c
     131        arch/$(ARCH)/src/fpu_context.c \
     132        arch/$(ARCH)/src/debugger.c

  • arch/ia32/include/asm.h

    r4e49572 r23d22eb  
    5454static inline void cpu_sleep(void) { __asm__("hlt\n"); };
    5555
    56 /** Read CR2
    57  *
    58  * Return value in CR2
    59  *
    60  * @return Value read.
    61  */
    62 static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }
    63 
    64 /** Write CR3
    65  *
    66  * Write value to CR3.
    67  *
    68  * @param v Value to be written.
    69  */
    70 static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
    71 
    72 /** Read CR3
    73  *
    74  * Return value in CR3
    75  *
    76  * @return Value read.
    77  */
    78 static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }
     56#define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \
     57    { \
     58        __native res; \
     59        __asm__ volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
     60        return res; \
     61    }
     62
     63#define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \
     64    { \
     65        __asm__ volatile ("movl %0, %%" #reg : : "r" (regn)); \
     66    }
     67
     68GEN_READ_REG(cr0);
     69GEN_READ_REG(cr2);
     70GEN_READ_REG(cr3);
     71GEN_WRITE_REG(cr3);
     72
     73GEN_READ_REG(dr0);
     74GEN_READ_REG(dr1);
     75GEN_READ_REG(dr2);
     76GEN_READ_REG(dr3);
     77GEN_READ_REG(dr6);
     78GEN_READ_REG(dr7);
     79
     80GEN_WRITE_REG(dr0);
     81GEN_WRITE_REG(dr1);
     82GEN_WRITE_REG(dr2);
     83GEN_WRITE_REG(dr3);
     84GEN_WRITE_REG(dr6);
     85GEN_WRITE_REG(dr7);
    7986
    8087/** Byte to port

  • arch/ia32/include/cpu.h

    r4e49572 r23d22eb  
    3434#include <arch/asm.h>
    3535
     36#define EFLAGS_RF       (1 << 16)
     37
    3638struct cpu_arch {
    3739        int vendor;

  • arch/ia32/include/interrupt.h

    r4e49572 r23d22eb  
    5454#endif
    5555
     56#define VECTOR_DEBUG            1
    5657#define VECTOR_PIC_SPUR         (IVT_IRQBASE+IRQ_PIC_SPUR)
    5758#define VECTOR_CLK              (IVT_IRQBASE+IRQ_CLK)

  • arch/ia32/src/ia32.c

    r4e49572 r23d22eb  
    5151#include <arch/mm/memory_init.h>
    5252#include <interrupt.h>
     53#include <arch/debugger.h>
    5354
    5455void arch_pre_mm_init(void)
    … …  
    7475        if (config.cpu_active == 1) {
    7576                ega_init();     /* video */
     77                /* Enable debugger */
     78                debugger_init();
    7679        }
    7780}

  • arch/ia32/src/proc/scheduler.c

    r4e49572 r23d22eb  
    3232#include <arch.h>
    3333#include <arch/context.h>       /* SP_DELTA */
     34#include <arch/debugger.h>
    3435
    3536void before_thread_runs_arch(void)
    … …  
    3738        CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
    3839        CPU->arch.tss->ss0 = selector(KDATA_DES);
     40
     41#ifdef CONFIG_DEBUG_AS_WATCHPOINT
     42        /* Set watchpoint on AS to ensure that nobody sets it to zero */
     43        static int old_slot = -1;
     44        if (old_slot >=0)
     45                breakpoint_del(old_slot);
     46        old_slot = breakpoint_add(&((the_t *) THREAD->kstack)->as,
     47                                  BKPOINT_WRITE | BKPOINT_CHECK_ZERO);
     48#endif
     49
    3950}
    4051

  • kernel.config

    r4e49572 r23d22eb  
    7272
    7373# Watchpoint on rewriting AS with zero
    74 ! [CONFIG_DEBUG=y&ARCH=amd64] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
     74! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
    7575
    7676## Run-time configuration directives
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