Changeset 25a76ab8 in mainline for boot/arch/sparc64/src/asm.S


Ignore:
Timestamp:
2010-05-08T07:53:23Z (15 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
051bc69a
Parents:
6c39a907 (diff), 1317380 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

File:
1 moved

Legend:

Unmodified
Added
Removed

  • boot/arch/sparc64/src/asm.S

    r6c39a907 r25a76ab8  
    11#
    22# Copyright (c) 2006 Martin Decky
    3 # Copyright (c) 2006 Jakub Jermar 
     3# Copyright (c) 2006 Jakub Jermar
    44# All rights reserved.
    55#
    … …  
    2828#
    2929
    30 #include <stack.h>
    31 #include <register.h>
     30#include <arch/arch.h>
     31
     32#define ICACHE_SIZE       8192
     33#define ICACHE_LINE_SIZE  32
     34#define ICACHE_SET_BIT    (1 << 13)
     35#define ASI_ICACHE_TAG    0x67
    3236
    3337.register %g2, #scratch
    3438.register %g3, #scratch
    35 
    36 .text
    37 
     39.register %g6, #scratch
     40.register %g7, #scratch
     41
     42.global start
    3843.global halt
    3944.global memcpy
    4045.global jump_to_kernel
    4146
     47.section BOOTSTRAP, "ax"
     48
     49start:
     50        ba %xcc, 1f
     51        nop
     52
     53/*
     54 * This header forces SILO to load the image at 0x4000.
     55 * More precisely, SILO will think this is an old version of Linux.
     56 */
     57.ascii "HdrS"
     58.word 0
     59.half 0
     60.half 0
     61.half 0
     62.half 0
     63.word 0
     64.word 0
     65
     66.align 8
     671:
     68        ! Disable interrupts and disable address masking.
     69       
     70        wrpr %g0, PSTATE_PRIV_BIT, %pstate
     71       
     72        wrpr %g0, NWINDOWS - 2, %cansave   ! Set maximum saveable windows
     73        wrpr %g0, 0, %canrestore           ! Get rid of windows we will never need again
     74        wrpr %g0, 0, %otherwin             ! Make sure the window state is consistent
     75        wrpr %g0, NWINDOWS - 1, %cleanwin  ! Prevent needless clean_window traps for kernel
     76       
     77        set initial_stack, %sp
     78        add %sp, -STACK_BIAS, %sp
     79       
     80        set ofw_cif, %l0
     81       
     82        ! Initialize OpenFirmware
     83       
     84        call ofw_init
     85        stx %o4, [%l0]
     86       
     87        ba %xcc, bootstrap
     88        nop
     89
     90.align STACK_ALIGNMENT
     91        .space STACK_SIZE
     92initial_stack:
     93        .space STACK_WINDOW_SAVE_AREA_SIZE
     94
     95.text
     96
    4297halt:
    4398        ba %xcc, halt
    … …  
    45100
    46101memcpy:
    47         mov %o0, %o3      ! save dst
     102        ! Save dst
     103       
     104        mov %o0, %o3
    48105        add %o1, 7, %g1
    49106        and %g1, -8, %g1
    … …  
    66123       
    67124        2:
    68                 jmp %o7 + 8   ! exit point
     125                ! Exit point
     126               
     127                jmp %o7 + 8
    69128                mov %o3, %o0
    70129       
    … …  
    104163                mov %g2, %g3
    105164       
    106         jmp %o7 + 8   ! exit point
     165        ! Exit point
     166       
     167        jmp %o7 + 8
    107168        mov %o3, %o0
    108169
    109170jump_to_kernel:
    110171        /*
    111          * We have copied code and now we need to guarantee cache coherence.
     172         * Guarantee cache coherence:
    112173         * 1. Make sure that the code we have moved has drained to main memory.
    113174         * 2. Invalidate I-cache.
    … …  
    115176         */
    116177       
    117 #if defined (SUN4U)
    118178        /*
    119179         * US3 processors have a write-invalidate cache, so explicitly
    120180         * invalidating it is not required. Whether to invalidate I-cache
    121          * or not is decided according to the value of the 5th argument
    122          * (subarchitecture).
     181         * or not is decided according to the value of the 3rd argument
     182         * (subarch).
    123183         */
    124         cmp %i4, 3
     184        cmp %i2, SUBARCH_US3
    125185        be %xcc, 1f
    126186        nop
    … …  
    129189                call icache_flush
    130190                nop
    131 #endif 
     191       
    132192        1:
    133193                membar #StoreStore
    … …  
    138198        flush %i7
    139199       
     200        ! Jump to kernel
    140201        mov %o0, %l1
    141202        mov %o1, %o0
    142         mov %o2, %o1
    143         mov %o3, %o2
    144         jmp %l1       ! jump to kernel
    145         nop
    146 
    147 #define ICACHE_SIZE       8192
    148 #define ICACHE_LINE_SIZE  32
    149 #define ICACHE_SET_BIT    (1 << 13)
    150 #define ASI_ICACHE_TAG    0x67
     203        mov %o3, %o1
     204       
     205        jmp %l1
     206        nop
    151207
    152208# Flush I-cache
    … …  
    163219        membar #Sync
    164220        retl
     221       
    165222        ! SF Erratum #51
     223       
    166224        nop
    167225
    … …  
    172230        ldx [%l0], %l0
    173231       
    174         rdpr  %pstate, %l1
    175         and  %l1, ~PSTATE_AM_BIT, %l2
    176         wrpr  %l2, 0, %pstate
     232        rdpr %pstate, %l1
     233        and %l1, ~PSTATE_AM_BIT, %l2
     234        wrpr %l2, 0, %pstate
    177235       
    178236        jmpl %l0, %o7
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