Changeset 25d7709 in mainline
- Timestamp:
- 2006-03-13T20:08:16Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 631ca4d
- Parents:
- 45d6add
- Files:
-
- 36 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/include/context.h
r45d6add r25d7709 59 59 } __attribute__ ((packed)); 60 60 61 /** This is passed to interrupt handlers */62 struct interrupt_context {63 __u64 rax;64 __u64 rbx;65 __u64 rcx;66 __u64 rdx;67 __u64 rsi;68 __u64 rdi;69 __u64 r8;70 __u64 r9;71 __u64 r10;72 __u64 r11;73 __u64 r12;74 __u64 r13;75 __u64 r14;76 __u64 r15;77 /* These 2 items MUST be last parts of the structure */78 __u64 rbp;79 __u64 stack[0]; /* Additional data on stack */80 } __attribute__ ((packed));81 82 61 #endif -
arch/amd64/include/interrupt.h
r45d6add r25d7709 61 61 #define VECTOR_WAKEUP_IPI (IVT_FREEBASE+1) 62 62 63 /** This is passed to interrupt handlers */ 64 struct istate { 65 __u64 rax; 66 __u64 rbx; 67 __u64 rcx; 68 __u64 rdx; 69 __u64 rsi; 70 __u64 rdi; 71 __u64 r8; 72 __u64 r9; 73 __u64 r10; 74 __u64 r11; 75 __u64 r12; 76 __u64 r13; 77 __u64 r14; 78 __u64 r15; 79 /* These 2 items MUST be last parts of the structure */ 80 __u64 rbp; 81 __u64 stack[0]; /* Additional data on stack */ 82 } __attribute__ ((packed)); 83 63 84 extern void (* disable_irqs_function)(__u16 irqmask); 64 85 extern void (* enable_irqs_function)(__u16 irqmask); 65 86 extern void (* eoi_function)(void); 66 87 67 extern void null_interrupt(int n, struct interrupt_context *ctx);68 extern void gp_fault(int n, void *stack);69 extern void nm_fault(int n, void *stack);70 extern void ss_fault(int n, void *stack);71 extern void page_fault(int n, struct interrupt_context *ctx);72 extern void syscall(int n, void *stack);73 extern void tlb_shootdown_ipi(int n, void *stack);88 extern void null_interrupt(int n, istate_t *istate); 89 extern void gp_fault(int n, istate_t *istate); 90 extern void nm_fault(int n, istate_t *istate); 91 extern void ss_fault(int n, istate_t *istate); 92 extern void page_fault(int n, istate_t *istate); 93 extern void syscall(int n, istate_t *istate); 94 extern void tlb_shootdown_ipi(int n, istate_t *istate); 74 95 75 96 extern void trap_virtual_enable_irqs(__u16 irqmask); -
arch/amd64/src/interrupt.c
r45d6add r25d7709 43 43 #include <proc/thread.h> 44 44 45 /* 46 static void messy_stack_trace(__native *stack) 47 { 48 __native *upper_limit = (__native *)(((__native)get_stack_base()) + STACK_SIZE); 49 char *symbol; 50 51 printf("Stack contents: "); 52 while (stack < upper_limit) { 53 symbol = get_symtab_entry((__address)*stack); 54 if (symbol) 55 printf("%s, ", symbol); 56 stack++; 57 } 58 printf("\n"); 59 } 60 */ 61 62 static void print_info_errcode(int n, struct interrupt_context *ctx) 45 static void print_info_errcode(int n, istate_t *istate) 63 46 { 64 47 char *symbol; 65 __u64 *x = & ctx->stack[0];48 __u64 *x = &istate->stack[0]; 66 49 67 50 if (!(symbol=get_symtab_entry(x[1]))) … … 69 52 70 53 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); 71 printf("%%rip: %Q (%s)\n", ctx->stack[1],symbol);72 printf("ERROR_WORD=%Q\n", ctx->stack[0]);73 printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", ctx->stack[2],74 ctx->stack[3],read_cr0());75 printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n", ctx->rax,ctx->rbx,ctx->rcx);76 printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n", ctx->rdx,ctx->rsi,ctx->rdi);77 printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n", ctx->r8,ctx->r9,ctx->r10);78 printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n", ctx->r11,ctx->r12,ctx->r13);79 printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n", ctx->r14,ctx->r15,&ctx->stack[0]);80 printf("%%rbp=%Q\n", ctx->rbp);54 printf("%%rip: %Q (%s)\n",istate->stack[1],symbol); 55 printf("ERROR_WORD=%Q\n", istate->stack[0]); 56 printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", istate->stack[2], 57 istate->stack[3],read_cr0()); 58 printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",istate->rax,istate->rbx,istate->rcx); 59 printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",istate->rdx,istate->rsi,istate->rdi); 60 printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",istate->r8,istate->r9,istate->r10); 61 printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",istate->r11,istate->r12,istate->r13); 62 printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",istate->r14,istate->r15,&istate->stack[0]); 63 printf("%%rbp=%Q\n",istate->rbp); 81 64 printf("stack: %Q, %Q, %Q\n", x[5], x[6], x[7]); 82 65 printf(" %Q, %Q, %Q\n", x[8], x[9], x[10]); 83 66 printf(" %Q, %Q, %Q\n", x[11], x[12], x[13]); 84 67 printf(" %Q, %Q, %Q\n", x[14], x[15], x[16]); 85 // messy_stack_trace(&x[5]);86 68 } 87 69 … … 94 76 void (* eoi_function)(void) = NULL; 95 77 96 void null_interrupt(int n, struct interrupt_context *ctx)78 void null_interrupt(int n, istate_t *istate) 97 79 { 98 80 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); \ 99 printf("stack: %X, %X, %X, %X\n", ctx->stack[0], ctx->stack[1],100 ctx->stack[2], ctx->stack[3]);81 printf("stack: %X, %X, %X, %X\n", istate->stack[0], istate->stack[1], 82 istate->stack[2], istate->stack[3]); 101 83 panic("unserviced interrupt\n"); 102 84 } 103 85 104 void gp_fault(int n, void *stack)86 void gp_fault(int n, istate_t *istate) 105 87 { 106 print_info_errcode(n, stack);88 print_info_errcode(n, istate); 107 89 panic("general protection fault\n"); 108 90 } 109 91 110 void ss_fault(int n, void *stack)92 void ss_fault(int n, istate_t *istate) 111 93 { 112 print_info_errcode(n, stack);94 print_info_errcode(n, istate); 113 95 panic("stack fault\n"); 114 96 } 115 97 116 98 117 void nm_fault(int n, void *stack)99 void nm_fault(int n, istate_t *istate) 118 100 { 119 101 #ifdef CONFIG_FPU_LAZY … … 124 106 } 125 107 126 void page_fault(int n, struct interrupt_context *ctx)108 void page_fault(int n, istate_t *istate) 127 109 { 128 110 __address page; … … 130 112 page = read_cr2(); 131 113 if (!as_page_fault(page)) { 132 print_info_errcode(n, ctx);114 print_info_errcode(n, istate); 133 115 printf("Page fault address: %Q\n", page); 134 116 panic("page fault\n"); … … 136 118 } 137 119 138 void tlb_shootdown_ipi(int n, void *stack)120 void tlb_shootdown_ipi(int n, istate_t *istate) 139 121 { 140 122 trap_virtual_eoi(); -
arch/ia32/include/interrupt.h
r45d6add r25d7709 61 61 #define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE+1) 62 62 63 struct istate { 64 __u32 edi; 65 __u32 esi; 66 __u32 ebp; 67 __u32 esp; 68 __u32 ebx; 69 __u32 edx; 70 __u32 ecx; 71 __u32 eax; 72 __u32 error_word; 73 __u32 eip; 74 __u32 cs; 75 __u32 eflags; 76 __u32 stack[]; 77 }; 78 63 79 extern void (* disable_irqs_function)(__u16 irqmask); 64 80 extern void (* enable_irqs_function)(__u16 irqmask); 65 81 extern void (* eoi_function)(void); 66 82 67 extern void null_interrupt(int n, void *stack);68 extern void gp_fault(int n, void *stack);69 extern void nm_fault(int n, void *stack);70 extern void ss_fault(int n, void *stack);71 extern void page_fault(int n, void *stack);72 extern void syscall(int n, void *stack);73 extern void tlb_shootdown_ipi(int n, void *stack);83 extern void null_interrupt(int n, istate_t *istate); 84 extern void gp_fault(int n, istate_t *istate); 85 extern void nm_fault(int n, istate_t *istate); 86 extern void ss_fault(int n, istate_t *istate); 87 extern void page_fault(int n, istate_t *istate); 88 extern void syscall(int n, istate_t *istate); 89 extern void tlb_shootdown_ipi(int n, istate_t *istate); 74 90 75 91 extern void trap_virtual_enable_irqs(__u16 irqmask); -
arch/ia32/include/types.h
r45d6add r25d7709 48 48 49 49 typedef __u32 __native; 50 typedef __s32 __ native;50 typedef __s32 __snative; 51 51 52 52 typedef struct page_specifier pte_t; -
arch/ia32/src/asm.S
r45d6add r25d7709 79 79 # 80 80 .macro handler i n 81 push %ebp 82 movl %esp,%ebp 81 push %eax 82 83 # Test if this is interrupt with error word or not 84 movl $(1<<\i), %eax 85 andl $ERROR_WORD_INTERRUPT_LIST,%eax 86 87 /* 88 * If this interrupt/exception stores error word, 89 * we need to pop EAX. 90 * If this interrupt doesn't store error word, we emulate it 91 * for the sake of consistent pstate structure. In that case 92 * we merely leave the EAX on the stack. 93 */ 94 jz 0f 95 96 /* 97 * This exception stores error word. 98 */ 99 pop %eax 100 jmp 1f 101 102 0: 103 /* 104 * This interrupt doesn't store error word. 105 * Just restore EAX without doing POP. 106 */ 107 movl (%esp), %eax 108 109 1: 83 110 pusha 84 111 movl %esp, %ebp 85 112 push %ds 86 113 push %es … … 93 120 movl $(\i),%edi 94 121 pushl %ebp 95 addl $4,(%esp)96 122 pushl %edi 97 123 call exc_dispatch … … 101 127 pop %ds 102 128 103 104 # CLNT 129 # Clear Nested Task flag. 105 130 pushfl 106 131 pop %eax … … 109 134 popfl 110 135 111 112 113 # Test if this is interrupt with error word or not114 mov $\i,%cl115 movl $1,%eax116 test $0xe0,%cl117 jnz 0f118 and $0x1f,%cl119 shl %cl,%eax120 and $ERROR_WORD_INTERRUPT_LIST,%eax121 jz 0f122 123 124 # Return with error word125 136 popa 126 pop %ebp 127 add $4,%esp # Skip error word 128 iret 129 130 0: 131 # Return with no error word 132 popa 133 pop %ebp 137 add $4,%esp # Skip error word, whether real or fake. 134 138 iret 135 139 -
arch/ia32/src/drivers/i8254.c
r45d6add r25d7709 54 54 #define MAGIC_NUMBER 1194 55 55 56 static void i8254_interrupt(int n, void *stack);56 static void i8254_interrupt(int n, istate_t *istate); 57 57 58 58 void i8254_init(void) … … 68 68 outb(CLK_PORT1, (CLK_CONST/HZ) >> 8); 69 69 pic_enable_irqs(1<<IRQ_CLK); 70 exc_register(VECTOR_CLK, "i8254_clock", i8254_interrupt);70 exc_register(VECTOR_CLK, "i8254_clock", (iroutine) i8254_interrupt); 71 71 } 72 72 … … 126 126 } 127 127 128 void i8254_interrupt(int n, void *stack)128 void i8254_interrupt(int n, istate_t *istate) 129 129 { 130 130 trap_virtual_eoi(); -
arch/ia32/src/drivers/i8259.c
r45d6add r25d7709 40 40 */ 41 41 42 static void pic_spurious(int n, void *stack);42 static void pic_spurious(int n, istate_t *istate); 43 43 44 44 void i8259_init(void) … … 71 71 * Register interrupt handler for the PIC spurious interrupt. 72 72 */ 73 exc_register(VECTOR_PIC_SPUR, "pic_spurious", pic_spurious);73 exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious); 74 74 75 75 /* … … 119 119 } 120 120 121 void pic_spurious(int n, void *stack)121 void pic_spurious(int n, istate_t *istate) 122 122 { 123 123 printf("cpu%d: PIC spurious interrupt\n", CPU->id); -
arch/ia32/src/ia32.c
r45d6add r25d7709 61 61 i8254_init(); /* hard clock */ 62 62 63 exc_register(VECTOR_SYSCALL, "syscall", syscall);63 exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall); 64 64 65 65 #ifdef CONFIG_SMP 66 66 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", 67 tlb_shootdown_ipi);67 (iroutine) tlb_shootdown_ipi); 68 68 #endif /* CONFIG_SMP */ 69 69 } -
arch/ia32/src/interrupt.c
r45d6add r25d7709 50 50 void (* eoi_function)(void) = NULL; 51 51 52 #define PRINT_INFO_ERRCODE(st) { \ 53 __native *x = (__native *) st; \ 54 char *symbol = get_symtab_entry(x[1]); \ 52 #define PRINT_INFO_ERRCODE(istate) do { \ 53 char *symbol = get_symtab_entry(istate->eip); \ 55 54 if (!symbol) \ 56 55 symbol = ""; \ 57 56 printf("----------------EXCEPTION OCCURED----------------\n"); \ 58 printf("%%eip: %X (%s)\n", x[1],symbol); \59 printf("ERROR_WORD=%X\n", x[0]); \60 printf("%%cs=%X,flags=%X\n", x[2], x[3]); \57 printf("%%eip: %X (%s)\n",istate->eip,symbol); \ 58 printf("ERROR_WORD=%X\n", istate->error_word); \ 59 printf("%%cs=%X,flags=%X\n", istate->cs, istate->eflags); \ 61 60 printf("%%eax=%X, %%ebx=%X, %%ecx=%X, %%edx=%X\n",\ 62 x[-2],x[-5],x[-3],x[-4]); \61 istate->eax,istate->ebx,istate->ecx,istate->edx); \ 63 62 printf("%%esi=%X, %%edi=%X, %%ebp=%X, %%esp=%X\n",\ 64 x[-8],x[-9],x[-1],x); \65 printf("stack: %X, %X, %X, %X\n", x[4], x[5], x[6], x[7]); \66 printf(" %X, %X, %X, %X\n", x[8], x[9], x[10], x[11]); \67 } 63 istate->esi,istate->edi,istate->ebp,istate->esp); \ 64 printf("stack: %X, %X, %X, %X\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); \ 65 printf(" %X, %X, %X, %X\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); \ 66 } while(0) 68 67 69 void null_interrupt(int n, void *st)68 void null_interrupt(int n, istate_t *istate) 70 69 { 71 __native *stack = (__native *) st; 72 73 printf("int %d: null_interrupt\n", n); 74 printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]); 75 panic("unserviced interrupt\n"); 70 PRINT_INFO_ERRCODE(istate); 71 panic("unserviced interrupt: %d\n", n); 76 72 } 77 73 78 void gp_fault(int n, void *stack)74 void gp_fault(int n, istate_t *istate) 79 75 { 80 PRINT_INFO_ERRCODE( stack);76 PRINT_INFO_ERRCODE(istate); 81 77 panic("general protection fault\n"); 82 78 } 83 79 84 void ss_fault(int n, void *stack)80 void ss_fault(int n, istate_t *istate) 85 81 { 86 PRINT_INFO_ERRCODE( stack);82 PRINT_INFO_ERRCODE(istate); 87 83 panic("stack fault\n"); 88 84 } 89 85 90 91 void nm_fault(int n, void *stack) 86 void nm_fault(int n, istate_t *istate) 92 87 { 93 88 #ifdef CONFIG_FPU_LAZY … … 98 93 } 99 94 100 101 102 void page_fault(int n, void *stack) 95 void page_fault(int n, istate_t *istate) 103 96 { 104 97 __address page; … … 106 99 page = read_cr2(); 107 100 if (!as_page_fault(page)) { 108 PRINT_INFO_ERRCODE( stack);101 PRINT_INFO_ERRCODE(istate); 109 102 printf("page fault address: %X\n", page); 110 103 panic("page fault\n"); … … 112 105 } 113 106 114 void syscall(int n, void *st)107 void syscall(int n, istate_t *istate) 115 108 { 116 __native *stack = (__native *) st;117 118 109 interrupts_enable(); 119 if ( stack[-2]< SYSCALL_END)120 stack[-2] = syscall_table[stack[-2]](stack[-5], stack[-3], stack[-4]);110 if (istate->edx < SYSCALL_END) 111 istate->eax = syscall_table[istate->edx](istate->eax, istate->ebx, istate->ecx); 121 112 else 122 panic("Undefined syscall %d", stack[-2]);113 panic("Undefined syscall %d", istate->edx); 123 114 interrupts_disable(); 124 115 } 125 116 126 void tlb_shootdown_ipi(int n, void *stack)117 void tlb_shootdown_ipi(int n, istate_t *istate) 127 118 { 128 119 trap_virtual_eoi(); -
arch/ia32/src/mm/page.c
r45d6add r25d7709 61 61 } 62 62 63 exc_register(14, "page_fault", page_fault);63 exc_register(14, "page_fault", (iroutine) page_fault); 64 64 write_cr3((__address) AS_KERNEL->page_table); 65 65 } -
arch/ia32/src/pm.c
r45d6add r25d7709 126 126 127 127 idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size); 128 exc_register(i, "undef", null_interrupt);128 exc_register(i, "undef", (iroutine) null_interrupt); 129 129 } 130 exc_register(13, "gp_fault", gp_fault);131 exc_register( 7, "nm_fault", nm_fault);132 exc_register(12, "ss_fault", ss_fault);130 exc_register(13, "gp_fault", (iroutine) gp_fault); 131 exc_register( 7, "nm_fault", (iroutine) nm_fault); 132 exc_register(12, "ss_fault", (iroutine) ss_fault); 133 133 } 134 134 -
arch/ia32/src/smp/apic.c
r45d6add r25d7709 113 113 114 114 115 static void apic_spurious(int n, void *stack);116 static void l_apic_timer_interrupt(int n, void *stack);115 static void apic_spurious(int n, istate_t *istate); 116 static void l_apic_timer_interrupt(int n, istate_t *istate); 117 117 118 118 /** Initialize APIC on BSP. */ … … 122 122 int i; 123 123 124 exc_register(VECTOR_APIC_SPUR, "apic_spurious", apic_spurious);124 exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious); 125 125 126 126 enable_irqs_function = io_apic_enable_irqs; … … 134 134 */ 135 135 io_apic_disable_irqs(0xffff); 136 exc_register(VECTOR_CLK, "l_apic_timer", l_apic_timer_interrupt);136 exc_register(VECTOR_CLK, "l_apic_timer", (iroutine) l_apic_timer_interrupt); 137 137 for (i = 0; i < IRQ_COUNT; i++) { 138 138 int pin; … … 170 170 * @param stack Interrupted stack. 171 171 */ 172 void apic_spurious(int n, void *stack)172 void apic_spurious(int n, istate_t *istate) 173 173 { 174 174 printf("cpu%d: APIC spurious interrupt\n", CPU->id); … … 428 428 * @param stack Interrupted stack. 429 429 */ 430 void l_apic_timer_interrupt(int n, void *stack)430 void l_apic_timer_interrupt(int n, istate_t *istate) 431 431 { 432 432 l_apic_eoi(); -
arch/ia64/include/interrupt.h
r45d6add r25d7709 30 30 #define __ia64_INTERRUPT_H__ 31 31 32 #include <typedefs.h> 32 33 #include <arch/types.h> 33 34 #include <arch/register.h> … … 47 48 #define EOI 0 /**< The actual value doesn't matter. */ 48 49 49 struct exception_regdump{50 struct istate { 50 51 __address ar_bsp; 51 52 __address ar_bspstore; … … 74 75 extern void *ivt; 75 76 76 extern void general_exception(__u64 vector, struct exception_regdump *pstate);77 extern int break_instruction(__u64 vector, struct exception_regdump *pstate);78 extern void universal_handler(__u64 vector, struct exception_regdump *pstate);79 extern void external_interrupt(__u64 vector, struct exception_regdump *pstate);77 extern void general_exception(__u64 vector, istate_t *istate); 78 extern int break_instruction(__u64 vector, istate_t *istate); 79 extern void universal_handler(__u64 vector, istate_t *istate); 80 extern void external_interrupt(__u64 vector, istate_t *istate); 80 81 81 82 #endif -
arch/ia64/include/mm/tlb.h
r45d6add r25d7709 83 83 extern void itc_pte_copy(pte_t *t); 84 84 85 extern void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate);86 extern void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate);87 extern void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate);88 extern void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate);89 extern void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate);90 extern void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate);91 extern void page_not_present(__u64 vector, struct exception_regdump *pstate);85 extern void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate); 86 extern void alternate_data_tlb_fault(__u64 vector, istate_t *istate); 87 extern void data_nested_tlb_fault(__u64 vector, istate_t *istate); 88 extern void data_dirty_bit_fault(__u64 vector, istate_t *istate); 89 extern void instruction_access_bit_fault(__u64 vector, istate_t *istate); 90 extern void data_access_bit_fault(__u64 vector, istate_t *istate); 91 extern void page_not_present(__u64 vector, istate_t *istate); 92 92 93 93 #endif -
arch/ia64/include/types.h
r45d6add r25d7709 1 1 /* 2 2 * Copyright (C) 2005 Jakub Jermar 3 3 * All rights reserved. … … 48 48 49 49 typedef __u64 __native; 50 typedef __s64 __ native;50 typedef __s64 __snative; 51 51 52 52 typedef struct pte pte_t; -
arch/ia64/src/interrupt.c
r45d6add r25d7709 109 109 110 110 static char *vector_to_string(__u16 vector); 111 static void dump_interrupted_context( struct exception_regdump *pstate);111 static void dump_interrupted_context(istate_t *istate); 112 112 113 113 char *vector_to_string(__u16 vector) … … 121 121 } 122 122 123 void dump_interrupted_context( struct exception_regdump *pstate)123 void dump_interrupted_context(istate_t *istate) 124 124 { 125 125 char *ifa, *iipa, *iip; 126 126 127 ifa = get_symtab_entry( pstate->cr_ifa);128 iipa = get_symtab_entry( pstate->cr_iipa);129 iip = get_symtab_entry( pstate->cr_iip);127 ifa = get_symtab_entry(istate->cr_ifa); 128 iipa = get_symtab_entry(istate->cr_iipa); 129 iip = get_symtab_entry(istate->cr_iip); 130 130 131 131 putchar('\n'); 132 132 printf("Interrupted context dump:\n"); 133 printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);134 printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);135 printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);136 printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", pstate->cr_isr.value, pstate->cr_ipsr);133 printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore); 134 printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc); 135 printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs); 136 printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr); 137 137 138 printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");139 printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");140 printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");141 } 142 143 void general_exception(__u64 vector, struct exception_regdump *pstate)138 printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?"); 139 printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?"); 140 printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?"); 141 } 142 143 void general_exception(__u64 vector, istate_t *istate) 144 144 { 145 145 char *desc = ""; 146 146 147 dump_interrupted_context( pstate);148 149 switch ( pstate->cr_isr.ge_code) {147 dump_interrupted_context(istate); 148 149 switch (istate->cr_isr.ge_code) { 150 150 case GE_ILLEGALOP: 151 151 desc = "Illegal Operation fault"; … … 175 175 176 176 /** Handle syscall. */ 177 int break_instruction(__u64 vector, struct exception_regdump *pstate)177 int break_instruction(__u64 vector, istate_t *istate) 178 178 { 179 179 /* 180 180 * Move to next instruction after BREAK. 181 181 */ 182 if ( pstate->cr_ipsr.ri == 2) {183 pstate->cr_ipsr.ri = 0;184 pstate->cr_iip += 16;182 if (istate->cr_ipsr.ri == 2) { 183 istate->cr_ipsr.ri = 0; 184 istate->cr_iip += 16; 185 185 } else { 186 pstate->cr_ipsr.ri++;186 istate->cr_ipsr.ri++; 187 187 } 188 188 189 if ( pstate->in0< SYSCALL_END)190 return syscall_table[ pstate->in0](pstate->in1, pstate->in2, pstate->in3);189 if (istate->in3 < SYSCALL_END) 190 return syscall_table[istate->in3](istate->in0, istate->in1, istate->in2); 191 191 else 192 panic("Undefined syscall %d", pstate->in0);192 panic("Undefined syscall %d", istate->in3); 193 193 194 194 return -1; 195 195 } 196 196 197 void universal_handler(__u64 vector, struct exception_regdump *pstate)198 { 199 dump_interrupted_context( pstate);197 void universal_handler(__u64 vector, istate_t *istate) 198 { 199 dump_interrupted_context(istate); 200 200 panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector)); 201 201 } 202 202 203 void external_interrupt(__u64 vector, struct exception_regdump *pstate)203 void external_interrupt(__u64 vector, istate_t *istate) 204 204 { 205 205 cr_ivr_t ivr; -
arch/ia64/src/mm/tlb.c
r45d6add r25d7709 443 443 * 444 444 * @param vector Interruption vector. 445 * @param pstate Structure with saved interruption state.446 */ 447 void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate)445 * @param istate Structure with saved interruption state. 446 */ 447 void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate) 448 448 { 449 449 region_register rr; … … 451 451 pte_t *t; 452 452 453 va = pstate->cr_ifa; /* faulting address */453 va = istate->cr_ifa; /* faulting address */ 454 454 t = page_mapping_find(AS, va); 455 455 if (t) { … … 464 464 */ 465 465 if (!as_page_fault(va)) { 466 panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);466 panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid); 467 467 } 468 468 } … … 472 472 * 473 473 * @param vector Interruption vector. 474 * @param pstate Structure with saved interruption state.475 */ 476 void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate)474 * @param istate Structure with saved interruption state. 475 */ 476 void alternate_data_tlb_fault(__u64 vector, istate_t *istate) 477 477 { 478 478 region_register rr; … … 481 481 pte_t *t; 482 482 483 va = pstate->cr_ifa; /* faulting address */483 va = istate->cr_ifa; /* faulting address */ 484 484 rr.word = rr_read(VA2VRN(va)); 485 485 rid = rr.map.rid; … … 507 507 */ 508 508 if (!as_page_fault(va)) { 509 panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);509 panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid); 510 510 } 511 511 } … … 517 517 * 518 518 * @param vector Interruption vector. 519 * @param pstate Structure with saved interruption state.520 */ 521 void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate)519 * @param istate Structure with saved interruption state. 520 */ 521 void data_nested_tlb_fault(__u64 vector, istate_t *istate) 522 522 { 523 523 panic("%s\n", __FUNCTION__); … … 527 527 * 528 528 * @param vector Interruption vector. 529 * @param pstate Structure with saved interruption state.530 */ 531 void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate)529 * @param istate Structure with saved interruption state. 530 */ 531 void data_dirty_bit_fault(__u64 vector, istate_t *istate) 532 532 { 533 533 pte_t *t; 534 534 535 t = page_mapping_find(AS, pstate->cr_ifa);535 t = page_mapping_find(AS, istate->cr_ifa); 536 536 ASSERT(t && t->p); 537 537 if (t && t->p) { … … 548 548 * 549 549 * @param vector Interruption vector. 550 * @param pstate Structure with saved interruption state.551 */ 552 void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate)550 * @param istate Structure with saved interruption state. 551 */ 552 void instruction_access_bit_fault(__u64 vector, istate_t *istate) 553 553 { 554 554 pte_t *t; 555 555 556 t = page_mapping_find(AS, pstate->cr_ifa);556 t = page_mapping_find(AS, istate->cr_ifa); 557 557 ASSERT(t && t->p); 558 558 if (t && t->p) { … … 569 569 * 570 570 * @param vector Interruption vector. 571 * @param pstate Structure with saved interruption state.572 */ 573 void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate)571 * @param istate Structure with saved interruption state. 572 */ 573 void data_access_bit_fault(__u64 vector, istate_t *istate) 574 574 { 575 575 pte_t *t; 576 576 577 t = page_mapping_find(AS, pstate->cr_ifa);577 t = page_mapping_find(AS, istate->cr_ifa); 578 578 ASSERT(t && t->p); 579 579 if (t && t->p) { … … 590 590 * 591 591 * @param vector Interruption vector. 592 * @param pstate Structure with saved interruption state.593 */ 594 void page_not_present(__u64 vector, struct exception_regdump *pstate)592 * @param istate Structure with saved interruption state. 593 */ 594 void page_not_present(__u64 vector, istate_t *istate) 595 595 { 596 596 region_register rr; … … 598 598 pte_t *t; 599 599 600 va = pstate->cr_ifa; /* faulting address */600 va = istate->cr_ifa; /* faulting address */ 601 601 t = page_mapping_find(AS, va); 602 602 ASSERT(t); … … 613 613 } else { 614 614 if (!as_page_fault(va)) { 615 panic("%s: va=%P, rid=%d\n", __FUNCTION__, pstate->cr_ifa, rr.map.rid);616 } 617 } 618 } 615 panic("%s: va=%P, rid=%d\n", __FUNCTION__, istate->cr_ifa, rr.map.rid); 616 } 617 } 618 } -
arch/mips32/include/debugger.h
r45d6add r25d7709 50 50 int flags; /**< Flags regarding breakpoint */ 51 51 count_t counter; 52 void (*bkfunc)(void *b, struct exception_regdump *pstate);52 void (*bkfunc)(void *b, istate_t *istate); 53 53 } bpinfo_t; 54 54 55 55 extern void debugger_init(void); 56 void debugger_bpoint( struct exception_regdump *pstate);56 void debugger_bpoint(istate_t *istate); 57 57 58 58 extern bpinfo_t breakpoints[BKPOINTS_MAX]; -
arch/mips32/include/exception.h
r45d6add r25d7709 34 34 #endif 35 35 36 #include <typedefs.h> 37 36 38 #define EXC_Int 0 37 39 #define EXC_Mod 1 … … 53 55 #define EXC_VCED 31 54 56 55 struct exception_regdump{57 struct istate { 56 58 __u32 at; 57 59 __u32 v0; … … 91 93 }; 92 94 93 extern void exception( struct exception_regdump *pstate);95 extern void exception(istate_t *istate); 94 96 extern void tlb_refill_entry(void); 95 97 extern void exception_entry(void); -
arch/mips32/include/mm/tlb.h
r45d6add r25d7709 170 170 #define tlb_invalidate(asid) tlb_invalidate_asid(asid) 171 171 172 extern void tlb_invalid( struct exception_regdump *pstate);173 extern void tlb_refill( struct exception_regdump *pstate);174 extern void tlb_modified( struct exception_regdump *pstate);172 extern void tlb_invalid(istate_t *istate); 173 extern void tlb_refill(istate_t *istate); 174 extern void tlb_modified(istate_t *istate); 175 175 176 176 #endif -
arch/mips32/include/thread.h
r45d6add r25d7709 32 32 #include <arch/exception.h> 33 33 34 #define ARCH_THREAD_DATA struct exception_regdump *pstate34 #define ARCH_THREAD_DATA istate_t *istate 35 35 36 36 #endif -
arch/mips32/src/debugger.c
r45d6add r25d7709 180 180 } else { /* We are add extended */ 181 181 cur->flags = BKPOINT_FUNCCALL; 182 cur->bkfunc = (void (*)(void *, struct exception_regdump*)) argv[1].intval;182 cur->bkfunc = (void (*)(void *, istate_t *)) argv[1].intval; 183 183 } 184 184 if (is_jump(cur->instruction)) … … 290 290 * next instruction. 291 291 */ 292 void debugger_bpoint( struct exception_regdump *pstate)292 void debugger_bpoint(istate_t *istate) 293 293 { 294 294 bpinfo_t *cur = NULL; 295 __address fireaddr = pstate->epc;295 __address fireaddr = istate->epc; 296 296 int i; 297 297 … … 330 330 if (!(cur->flags & BKPOINT_FUNCCALL)) 331 331 printf("***Breakpoint %d: 0x%p in %s.\n", i, 332 fireaddr, get_symtab_entry( pstate->epc));332 fireaddr, get_symtab_entry(istate->epc)); 333 333 334 334 /* Return first instruction back */ … … 345 345 get_symtab_entry(fireaddr)); 346 346 /* Move on to next instruction */ 347 pstate->epc += 4;347 istate->epc += 4; 348 348 } 349 349 if (cur) … … 352 352 /* Allow zero bkfunc, just for counting */ 353 353 if (cur->bkfunc) 354 cur->bkfunc(cur, pstate);354 cur->bkfunc(cur, istate); 355 355 } else { 356 356 printf("***Type 'exit' to exit kconsole.\n"); -
arch/mips32/src/drivers/arc.c
r45d6add r25d7709 350 350 iroutine old_timer; 351 351 /** Do polling on timer interrupt */ 352 static void timer_replace(int n, void *stack)352 static void timer_replace(int n, istate_t *istate) 353 353 { 354 354 arc_keyboard_poll(); 355 old_timer(n, stack);355 old_timer(n, istate); 356 356 arc_keyboard_poll(); 357 357 } -
arch/mips32/src/drivers/msim.c
r45d6add r25d7709 84 84 85 85 /** Process keyboard interrupt. */ 86 static void msim_interrupt(int n, void *stack)86 static void msim_interrupt(int n, istate_t *istate) 87 87 { 88 88 char ch = 0; -
arch/mips32/src/drivers/serial.c
r45d6add r25d7709 113 113 iroutine old_timer; 114 114 /** Do polling on timer interrupt */ 115 static void timer_replace(int n, void *stack)115 static void timer_replace(int n, istate_t *istate) 116 116 { 117 old_timer(n, stack);118 serial_interrupt(n, stack);117 old_timer(n, istate); 118 serial_interrupt(n, istate); 119 119 } 120 120 -
arch/mips32/src/exception.c
r45d6add r25d7709 63 63 }; 64 64 65 static void print_regdump( struct exception_regdump *pstate)65 static void print_regdump(istate_t *istate) 66 66 { 67 67 char *pcsymbol = ""; 68 68 char *rasymbol = ""; 69 69 70 char *s = get_symtab_entry( pstate->epc);70 char *s = get_symtab_entry(istate->epc); 71 71 if (s) 72 72 pcsymbol = s; 73 s = get_symtab_entry( pstate->ra);73 s = get_symtab_entry(istate->ra); 74 74 if (s) 75 75 rasymbol = s; 76 76 77 printf("PC: %X(%s) RA: %X(%s), SP(%P)\n", pstate->epc,pcsymbol,78 pstate->ra,rasymbol, pstate->sp);79 } 80 81 static void unhandled_exception(int n, struct exception_regdump *pstate)82 { 83 print_regdump( pstate);77 printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",istate->epc,pcsymbol, 78 istate->ra,rasymbol, istate->sp); 79 } 80 81 static void unhandled_exception(int n, istate_t *istate) 82 { 83 print_regdump(istate); 84 84 panic("unhandled exception %s\n", exctable[n]); 85 85 } 86 86 87 static void breakpoint_exception(int n, struct exception_regdump *pstate)87 static void breakpoint_exception(int n, istate_t *istate) 88 88 { 89 89 #ifdef CONFIG_DEBUG 90 debugger_bpoint( pstate);90 debugger_bpoint(istate); 91 91 #else 92 92 /* it is necessary to not re-execute BREAK instruction after 93 93 returning from Exception handler 94 94 (see page 138 in R4000 Manual for more information) */ 95 pstate->epc += 4;95 istate->epc += 4; 96 96 #endif 97 97 } 98 98 99 static void tlbmod_exception(int n, struct exception_regdump *pstate)100 { 101 tlb_modified( pstate);102 } 103 104 static void tlbinv_exception(int n, struct exception_regdump *pstate)105 { 106 tlb_invalid( pstate);99 static void tlbmod_exception(int n, istate_t *istate) 100 { 101 tlb_modified(istate); 102 } 103 104 static void tlbinv_exception(int n, istate_t *istate) 105 { 106 tlb_invalid(istate); 107 107 } 108 108 109 109 #ifdef CONFIG_FPU_LAZY 110 static void cpuns_exception(int n, struct exception_regdump *pstate)110 static void cpuns_exception(int n, istate_t *istate) 111 111 { 112 112 if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) … … 117 117 #endif 118 118 119 static void interrupt_exception(int n, struct exception_regdump *pstate)119 static void interrupt_exception(int n, istate_t *istate) 120 120 { 121 121 __u32 cause; … … 127 127 for (i = 0; i < 8; i++) 128 128 if (cause & (1 << i)) 129 exc_dispatch(i+INT_OFFSET, pstate);129 exc_dispatch(i+INT_OFFSET, istate); 130 130 } 131 131 132 132 #include <debug.h> 133 133 /** Handle syscall userspace call */ 134 static void syscall_exception(int n, struct exception_regdump *pstate)134 static void syscall_exception(int n, istate_t *istate) 135 135 { 136 136 interrupts_enable(); 137 if ( pstate->a3 < SYSCALL_END)138 pstate->v0 = syscall_table[pstate->a3](pstate->a0,139 pstate->a1,140 pstate->a2);137 if (istate->a3 < SYSCALL_END) 138 istate->v0 = syscall_table[istate->a3](istate->a0, 139 istate->a1, 140 istate->a2); 141 141 else 142 panic("Undefined syscall %d", pstate->a3); 142 panic("Undefined syscall %d", istate->a3); 143 istate->epc += 4; 143 144 interrupts_disable(); 144 pstate->epc += 4; 145 } 146 147 148 void exception(struct exception_regdump *pstate) 145 } 146 147 void exception(istate_t *istate) 149 148 { 150 149 int cause; … … 164 163 cp0_status_um_bit)); 165 164 166 /* Save pstate so that the threads can access it */167 /* If THREAD-> pstate is set, this is nested exception,165 /* Save istate so that the threads can access it */ 166 /* If THREAD->istate is set, this is nested exception, 168 167 * do not rewrite it 169 168 */ 170 if (THREAD && !THREAD-> pstate)171 THREAD-> pstate = pstate;169 if (THREAD && !THREAD->istate) 170 THREAD->istate = istate; 172 171 173 172 cause = cp0_cause_read(); 174 173 excno = cp0_cause_excno(cause); 175 174 /* Dispatch exception */ 176 exc_dispatch(excno, pstate);175 exc_dispatch(excno, istate); 177 176 178 177 /* Set to NULL, so that we can still support nested … … 180 179 * TODO: We should probably set EXL bit before this command, 181 180 * nesting. On the other hand, if some exception occurs between 182 * here and ERET, it won't set anything on the pstate anyway.181 * here and ERET, it won't set anything on the istate anyway. 183 182 */ 184 183 if (THREAD) 185 THREAD-> pstate = NULL;184 THREAD->istate = NULL; 186 185 } 187 186 -
arch/mips32/src/fpu_context.c
r45d6add r25d7709 37 37 #ifdef ARCH_HAS_FPU 38 38 cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit); 39 if (THREAD && THREAD-> pstate)40 THREAD-> pstate->status &= ~cp0_status_fpu_bit;39 if (THREAD && THREAD->istate) 40 THREAD->istate->status &= ~cp0_status_fpu_bit; 41 41 #endif 42 42 } … … 46 46 #ifdef ARCH_HAS_FPU 47 47 cp0_status_write(cp0_status_read() | cp0_status_fpu_bit); 48 if (THREAD && THREAD-> pstate)49 THREAD-> pstate->status |= cp0_status_fpu_bit;48 if (THREAD && THREAD->istate) 49 THREAD->istate->status |= cp0_status_fpu_bit; 50 50 #endif 51 51 } -
arch/mips32/src/interrupt.c
r45d6add r25d7709 75 75 } 76 76 77 static void timer_exception(int n, void *stack)77 static void timer_exception(int n, istate_t *istate) 78 78 { 79 79 cp0_compare_write(cp0_count_read() + cp0_compare_value); … … 81 81 } 82 82 83 static void swint0(int n, void *stack)83 static void swint0(int n, istate_t *istate) 84 84 { 85 85 cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */ 86 86 } 87 87 88 static void swint1(int n, void *stack)88 static void swint1(int n, istate_t *istate) 89 89 { 90 90 cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */ -
arch/mips32/src/mm/tlb.c
r45d6add r25d7709 40 40 #include <debug.h> 41 41 42 static void tlb_refill_fail( struct exception_regdump *pstate);43 static void tlb_invalid_fail( struct exception_regdump *pstate);44 static void tlb_modified_fail( struct exception_regdump *pstate);42 static void tlb_refill_fail(istate_t *istate); 43 static void tlb_invalid_fail(istate_t *istate); 44 static void tlb_modified_fail(istate_t *istate); 45 45 46 46 static pte_t *find_mapping_and_check(__address badvaddr); … … 82 82 * Process TLB Refill Exception. 83 83 * 84 * @param pstate Interrupted register context.85 */ 86 void tlb_refill( struct exception_regdump *pstate)84 * @param istate Interrupted register context. 85 */ 86 void tlb_refill(istate_t *istate) 87 87 { 88 88 entry_lo_t lo; … … 127 127 fail: 128 128 spinlock_unlock(&AS->lock); 129 tlb_refill_fail( pstate);129 tlb_refill_fail(istate); 130 130 } 131 131 … … 134 134 * Process TLB Invalid Exception. 135 135 * 136 * @param pstate Interrupted register context.137 */ 138 void tlb_invalid( struct exception_regdump *pstate)136 * @param istate Interrupted register context. 137 */ 138 void tlb_invalid(istate_t *istate) 139 139 { 140 140 tlb_index_t index; … … 196 196 fail: 197 197 spinlock_unlock(&AS->lock); 198 tlb_invalid_fail( pstate);198 tlb_invalid_fail(istate); 199 199 } 200 200 … … 203 203 * Process TLB Modified Exception. 204 204 * 205 * @param pstate Interrupted register context.206 */ 207 void tlb_modified( struct exception_regdump *pstate)205 * @param istate Interrupted register context. 206 */ 207 void tlb_modified(istate_t *istate) 208 208 { 209 209 tlb_index_t index; … … 272 272 fail: 273 273 spinlock_unlock(&AS->lock); 274 tlb_modified_fail( pstate);275 } 276 277 void tlb_refill_fail( struct exception_regdump *pstate)274 tlb_modified_fail(istate); 275 } 276 277 void tlb_refill_fail(istate_t *istate) 278 278 { 279 279 char *symbol = ""; 280 280 char *sym2 = ""; 281 281 282 char *s = get_symtab_entry( pstate->epc);282 char *s = get_symtab_entry(istate->epc); 283 283 if (s) 284 284 symbol = s; 285 s = get_symtab_entry( pstate->ra);285 s = get_symtab_entry(istate->ra); 286 286 if (s) 287 287 sym2 = s; 288 panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2);289 } 290 291 292 void tlb_invalid_fail( struct exception_regdump *pstate)288 panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), istate->epc, symbol, sym2); 289 } 290 291 292 void tlb_invalid_fail(istate_t *istate) 293 293 { 294 294 char *symbol = ""; 295 295 296 char *s = get_symtab_entry( pstate->epc);296 char *s = get_symtab_entry(istate->epc); 297 297 if (s) 298 298 symbol = s; 299 panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol);300 } 301 302 void tlb_modified_fail( struct exception_regdump *pstate)299 panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), istate->epc, symbol); 300 } 301 302 void tlb_modified_fail(istate_t *istate) 303 303 { 304 304 char *symbol = ""; 305 305 306 char *s = get_symtab_entry( pstate->epc);306 char *s = get_symtab_entry(istate->epc); 307 307 if (s) 308 308 symbol = s; 309 panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol);309 panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), istate->epc, symbol); 310 310 } 311 311 -
arch/sparc64/include/drivers/tick.h
r45d6add r25d7709 30 30 #define __sparc64_TICK_H__ 31 31 32 #include <typedefs.h> 33 32 34 #define TICK_DELTA 500000 33 35 34 36 extern void tick_init(void); 35 extern void tick_interrupt(int n, void *stack);37 extern void tick_interrupt(int n, istate_t *istate); 36 38 37 39 #endif -
arch/sparc64/src/drivers/tick.c
r45d6add r25d7709 33 33 #include <debug.h> 34 34 #include <time/clock.h> 35 #include <typedefs.h> 35 36 36 37 /** Initialize tick interrupt. */ … … 49 50 * 50 51 * @param n Interrupt Level, 14, (can be ignored) 51 * @param stack Stack pointer of the interrupted context.52 * @param istate Interrupted state. 52 53 */ 53 void tick_interrupt(int n, void *stack)54 void tick_interrupt(int n, istate_t *istate) 54 55 { 55 56 softint_reg_t softint, clear; -
genarch/src/i8042/i8042.c
r45d6add r25d7709 266 266 }; 267 267 268 static void i8042_interrupt(int n, void *stack);268 static void i8042_interrupt(int n, istate_t *istate); 269 269 static void i8042_wait(void); 270 270 … … 272 272 void i8042_init(void) 273 273 { 274 exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt);274 exc_register(VECTOR_KBD, "i8042_interrupt", (iroutine) i8042_interrupt); 275 275 i8042_wait(); 276 276 i8042_command_write(i8042_SET_COMMAND); … … 289 289 * @param stack Interrupted stack. 290 290 */ 291 void i8042_interrupt(int n, void *stack)291 void i8042_interrupt(int n, istate_t *istate) 292 292 { 293 293 __u8 x; -
generic/include/interrupt.h
r45d6add r25d7709 42 42 43 43 extern iroutine exc_register(int n, const char *name, iroutine f); 44 extern void exc_dispatch(int n, void *stack);44 extern void exc_dispatch(int n, istate_t *t); 45 45 void exc_init(void); 46 46 -
generic/include/typedefs.h
r45d6add r25d7709 83 83 typedef struct cmd_info cmd_info_t; 84 84 85 typedef void (* iroutine)(int n, void *stack); 85 typedef struct istate istate_t; 86 typedef void (* iroutine)(int n, istate_t *istate); 86 87 87 88 typedef struct hash_table hash_table_t; -
generic/src/interrupt/interrupt.c
r45d6add r25d7709 72 72 * CPU is interrupts_disable()'d. 73 73 */ 74 void exc_dispatch(int n, void *stack)74 void exc_dispatch(int n, istate_t *istate) 75 75 { 76 76 ASSERT(n < IVT_ITEMS); 77 77 78 exc_table[n].f(n + IVT_FIRST, stack);78 exc_table[n].f(n + IVT_FIRST, istate); 79 79 } 80 80 81 81 /** Default 'null' exception handler */ 82 static void exc_undef(int n, void *stack)82 static void exc_undef(int n, istate_t *istate) 83 83 { 84 84 panic("Unhandled exception %d.", n); … … 127 127 128 128 for (i=0;i < IVT_ITEMS; i++) 129 exc_register(i, "undef", exc_undef);129 exc_register(i, "undef", (iroutine) exc_undef); 130 130 131 131 cmd_initialize(&exc_info);
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