Changeset 281b607 in mainline for arch/amd64/src/amd64.c

Timestamp:

2006-03-23T10:29:39Z (19 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a0bb10ef

Parents:

9aa72b4

Message:

Added basic kernel infrastructure for ThreadLocalStorage(TLS) for
ia32(complete),amd64(complete),mips32(missing emulation of rdhwr instruction).

File:

• arch/amd64/src/amd64.c (modified) (3 diffs)

arch/amd64/src/amd64.c

@@ -33 +33 @@
 #include <config.h>
 
+#include <proc/thread.h>
 #include <arch/ega.h>
 #include <genarch/i8042/i8042.h>
@@ -48 +49 @@
 #include <arch/syscall.h>
 #include <arch/debugger.h>
+#include <syscall/syscall.h>
+
 
 /** Disable I/O on non-privileged levels
@@ -160 +163 @@
         i8254_normal_operation();
 }
+
+/** Set Thread-local-storeage pointer
+ *
+ * TLS pointer is set in FS register. Unfortunately the 64-bit
+ * part can be set only in CPL0 mode.
+ *
+ * The specs says, that on %fs:0 there is stored contents of %fs register,
+ * we need not to go to CPL0 to read it.
+ */
+__native sys_tls_set(__native addr)
+{
+        THREAD->tls = addr;
+        write_msr(AMD_MSR_FS, addr);
+        return 0;
+}