Changeset 29b2bbf in mainline


Ignore:
Timestamp:
2006-09-18T22:10:20Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
19dba2b
Parents:
57da95c
Message:

sparc64 work:

  • Experimental support for TSB (Translation Storage Buffer).
Location:
kernel
Files:
21 edited

Legend:

Unmodified
Added
Removed

  • kernel/Makefile

    r57da95c r29b2bbf  
    7878ifeq ($(CONFIG_VHPT),y)
    7979        DEFS += -DCONFIG_VHPT
     80endif
     81
     82ifeq ($(CONFIG_TSB),y)
     83        DEFS += -DCONFIG_TSB
    8084endif
    8185

  • kernel/arch/amd64/include/mm/as.h

    r57da95c r29b2bbf  
    4848} as_arch_t;
    4949
     50#define as_constructor_arch(as, flags)          (as != as)
     51#define as_destructor_arch(as)                  (as != as)
     52#define as_create_arch(as, flags)               (as != as)
    5053#define as_install_arch(as)
    5154#define as_deinstall_arch(as)

  • kernel/arch/ia32/include/mm/as.h

    r57da95c r29b2bbf  
    4848} as_arch_t;
    4949
     50#define as_constructor_arch(as, flags)          (as != as)
     51#define as_destructor_arch(as)                  (as != as)
     52#define as_create_arch(as, flags)               (as != as)
    5053#define as_install_arch(as)
    5154#define as_deinstall_arch(as)

  • kernel/arch/ia64/include/mm/as.h

    r57da95c r29b2bbf  
    4848} as_arch_t;
    4949
     50#define as_constructor_arch(as, flags)          (as != as)
     51#define as_destructor_arch(as)                  (as != as)
     52#define as_create_arch(as, flags)               (as != as)
    5053#define as_deinstall_arch(as)
    5154#define as_invalidate_translation_cache(as, page, cnt)

  • kernel/arch/mips32/include/mm/as.h

    r57da95c r29b2bbf  
    4848} as_arch_t;
    4949
     50#define as_constructor_arch(as, flags)          (as != as)
     51#define as_destructor_arch(as)                  (as != as)
     52#define as_create_arch(as, flags)               (as != as)
    5053#define as_deinstall_arch(as)
    5154#define as_invalidate_translation_cache(as, page, cnt)

  • kernel/arch/ppc32/include/mm/as.h

    r57da95c r29b2bbf  
    4848} as_arch_t;
    4949
     50#define as_constructor_arch(as, flags)          (as != as)
     51#define as_destructor_arch(as)                  (as != as)
     52#define as_create_arch(as, flags)               (as != as)
    5053#define as_deinstall_arch(as)
    5154#define as_invalidate_translation_cache(as, page, cnt)

  • kernel/arch/ppc64/include/mm/as.h

    r57da95c r29b2bbf  
    4848} as_arch_t;
    4949
     50#define as_constructor_arch(as, flags)          (as != as)
     51#define as_destructor_arch(as)                  (as != as)
     52#define as_create_arch(as, flags)               (as != as)
    5053#define as_install_arch(as)
    5154#define as_deinstall_arch(as)

  • kernel/arch/sparc64/Makefile.inc

    r57da95c r29b2bbf  
    6767
    6868        CONFIG_Z8530 = y
    69         DEFS += -DCONFIG_Z8530 
     69        DEFS += -DCONFIG_Z8530
    7070endif
    7171ifeq ($(MACHINE),ultra)
    … …  
    108108        arch/$(ARCH)/src/drivers/kbd.c
    109109
    110 ifdef CONFIG_TSB
     110ifeq ($(CONFIG_TSB),y)
    111111ARCH_SOURCES += \
    112112        arch/$(ARCH)/src/mm/tsb.c

  • kernel/arch/sparc64/include/arch.h

    r57da95c r29b2bbf  
    3838#define KERN_sparc64_ARCH_H_
    3939
    40 #define ASI_AIUP        0x10    /** Access to primary context with user privileges. */
    41 #define ASI_AIUS        0x11    /** Access to secondary context with user privileges. */
     40#define ASI_AIUP        0x10            /** Access to primary context with user privileges. */
     41#define ASI_AIUS        0x11            /** Access to secondary context with user privileges. */
    4242
    43 #define NWINDOW         8       /** Number of register window sets. */
     43#define ASI_NUCLEUS_QUAD_LDD    0x24    /** ASI for 16-byte atomic loads. */
     44
     45#define NWINDOW         8               /** Number of register window sets. */
    4446
    4547#endif

  • kernel/arch/sparc64/include/barrier.h

    r57da95c r29b2bbf  
    4242#define CS_LEAVE_BARRIER()      __asm__ volatile ("" ::: "memory")
    4343
    44 #define memory_barrier()
    45 #define read_barrier()
    46 #define write_barrier()
     44#define memory_barrier()        __asm__ volatile ("membar #LoadLoad | #StoreStore\n" ::: "memory")
     45#define read_barrier()          __asm__ volatile ("membar #LoadLoad\n" ::: "memory")
     46#define write_barrier()         __asm__ volatile ("membar #StoreStore\n" ::: "memory")
    4747
    4848/** Flush Instruction Memory instruction. */

  • kernel/arch/sparc64/include/mm/mmu.h

    r57da95c r29b2bbf  
    4949
    5050/* Virtual Addresses within ASI_IMMU. */
    51 #define VA_IMMU_TAG_TARGET              0x0     /**< IMMU tag target register. */
     51#define VA_IMMU_TSB_TAG_TARGET          0x0     /**< IMMU TSB tag target register. */
    5252#define VA_IMMU_SFSR                    0x18    /**< IMMU sync fault status register. */
    5353#define VA_IMMU_TSB_BASE                0x28    /**< IMMU TSB base register. */
    … …  
    6565
    6666/* Virtual Addresses within ASI_DMMU. */
    67 #define VA_DMMU_TAG_TARGET              0x0     /**< DMMU tag target register. */
     67#define VA_DMMU_TSB_TAG_TARGET          0x0     /**< DMMU TSB tag target register. */
    6868#define VA_PRIMARY_CONTEXT_REG          0x8     /**< DMMU primary context register. */
    6969#define VA_SECONDARY_CONTEXT_REG        0x10    /**< DMMU secondary context register. */

  • kernel/arch/sparc64/include/mm/tsb.h

    r57da95c r29b2bbf  
    3636#define KERN_sparc64_TSB_H_
    3737
    38 #include <arch/mm/tte.h>
    39 #include <arch/mm/mmu.h>
    40 #include <arch/types.h>
    41 #include <typedefs.h>
    42 
    4338/*
    4439 * ITSB abd DTSB will claim 64K of memory, which
    … …  
    5247#define DTSB_ENTRY_COUNT                (512*(1<<TSB_SIZE))
    5348
     49#define TSB_TAG_TARGET_CONTEXT_SHIFT    48
     50
     51#ifndef __ASM__
     52
     53#include <arch/mm/tte.h>
     54#include <arch/mm/mmu.h>
     55#include <arch/types.h>
     56#include <typedefs.h>
     57
     58/** TSB Tag Target register. */
     59union tsb_tag_target {
     60        uint64_t value;
     61        struct {
     62                unsigned invalid : 1;   /**< Invalidated by software. */
     63                unsigned : 2;
     64                unsigned context : 13;  /**< Software ASID. */
     65                unsigned : 6;
     66                uint64_t va_tag : 42;   /**< Virtual address bits <63:22>. */
     67        } __attribute__ ((packed));
     68};
     69typedef union tsb_tag_target tsb_tag_target_t;
     70
     71/** TSB entry. */
    5472struct tsb_entry {
    55         tte_tag_t tag;
     73        tsb_tag_target_t tag;
    5674        tte_data_t data;
    5775} __attribute__ ((packed));
    … …  
    110128
    111129extern void tsb_invalidate(as_t *as, uintptr_t page, count_t pages);
     130extern void itsb_pte_copy(pte_t *t);
     131extern void dtsb_pte_copy(pte_t *t, bool ro);
     132
     133#endif /* !def __ASM__ */
    112134
    113135#endif

  • kernel/arch/sparc64/include/mm/tte.h

    r57da95c r29b2bbf  
    5151#include <arch/types.h>
    5252
     53#define VA_TAG_PAGE_SHIFT       22
     54
    5355/** Translation Table Entry - Tag. */
    5456union tte_tag {

  • kernel/arch/sparc64/include/trap/mmu.h

    r57da95c r29b2bbf  
    4545#include <arch/trap/regwin.h>
    4646
     47#ifdef CONFIG_TSB
     48#include <arch/mm/tsb.h>
     49#endif
     50
    4751#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS     0x64
    4852#define TT_FAST_DATA_ACCESS_MMU_MISS            0x68
    … …  
    5761         * First, try to refill TLB from TSB.
    5862         */
    59         ! TODO
    6063
     64#ifdef CONFIG_TSB
     65        ldxa [%g0] ASI_IMMU, %g1                        ! read TSB Tag Target Register
     66        ldxa [%g0] ASI_IMMU_TSB_8KB_PTR_REG, %g2        ! read TSB 8K Pointer
     67        ldda [%g2] ASI_NUCLEUS_QUAD_LDD, %g4            ! 16-byte atomic load into %g4 and %g5
     68        cmp %g1, %g4                                    ! is this the entry we are looking for?
     69        bne,pn %xcc, 0f
     70        nop
     71        stxa %g5, [%g0] ASI_ITLB_DATA_IN_REG            ! copy mapping from ITSB to ITLB
     72        retry
     73#endif
     74
     750:
    6176        wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
    6277        PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
    … …  
    6782         * First, try to refill TLB from TSB.
    6883         */
    69         ! TODO
     84
     85#ifdef CONFIG_TSB
     86        ldxa [%g0] ASI_DMMU, %g1                        ! read TSB Tag Target Register
     87        srlx %g1, TSB_TAG_TARGET_CONTEXT_SHIFT, %g2     ! is this kernel miss?
     88        brz,pn %g2, 0f
     89        ldxa [%g0] ASI_DMMU_TSB_8KB_PTR_REG, %g3        ! read TSB 8K Pointer
     90        ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4            ! 16-byte atomic load into %g4 and %g5
     91        cmp %g1, %g4                                    ! is this the entry we are looking for?
     92        bne,pn %xcc, 0f
     93        nop
     94        stxa %g5, [%g0] ASI_DTLB_DATA_IN_REG            ! copy mapping from DTSB to DTLB
     95        retry
     96#endif
    7097
    7198        /*
    … …  
    77104         * Note that branch-delay slots are used in order to save space.
    78105         */
    79 
     1060:
    80107        mov VA_DMMU_TAG_ACCESS, %g1
    81108        ldxa [%g1] ASI_DMMU, %g1                        ! read the faulting Context and VPN
    … …  
    111138.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
    112139        /*
    113          * First, try to refill TLB from TSB.
    114          */
    115         ! TODO
    116 
    117         /*
    118140         * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
    119141         */
     142
    120143.if (\tl > 0)
    121144        wrpr %g0, 1, %tl

  • kernel/arch/sparc64/src/mm/as.c

    r57da95c r29b2bbf  
    4141#ifdef CONFIG_TSB
    4242#include <arch/mm/tsb.h>
     43#include <arch/memstr.h>
     44#include <synch/mutex.h>
     45#include <arch/asm.h>
     46#include <mm/frame.h>
     47#include <bitops.h>
     48#include <macros.h>
    4349#endif
    4450
    … …  
    4854        as_operations = &as_ht_operations;
    4955        asid_fifo_init();
     56}
     57
     58int as_constructor_arch(as_t *as, int flags)
     59{
     60#ifdef CONFIG_TSB
     61        int order = fnzb32(((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH);
     62        uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);
     63
     64        if (!tsb)
     65                return -1;
     66
     67        as->arch.itsb = (tsb_entry_t *) tsb;
     68        as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT * sizeof(tsb_entry_t));
     69#endif
     70        return 0;
     71}
     72
     73int as_destructor_arch(as_t *as)
     74{
     75#ifdef CONFIG_TSB
     76        count_t cnt = ((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH;
     77        frame_free((uintptr_t) as->arch.itsb);
     78        return cnt;
     79#else
     80        return 0;
     81#endif
     82}
     83
     84int as_create_arch(as_t *as, int flags)
     85{
     86#ifdef CONFIG_TSB
     87        ipl_t ipl;
     88
     89        memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t), 0);
     90        ipl = interrupts_disable();
     91        mutex_lock_active(&as->lock);   /* completely unnecessary, but polite */
     92        tsb_invalidate(as, 0, (count_t) -1);
     93        mutex_unlock(&as->lock);
     94        interrupts_restore(ipl);
     95#endif
     96        return 0;
    5097}
    5198
    … …  
    79126
    80127#ifdef CONFIG_TSB       
    81         if (as != AS_KERNEL) {
    82                 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
     128        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    83129
    84                 ASSERT(as->arch.itsb && as->arch.dtsb);
     130        ASSERT(as->arch.itsb && as->arch.dtsb);
    85131
    86                 uintptr_t tsb = as->arch.itsb;
     132        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    87133               
    88                 if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    89                         /*
    90                         * TSBs were allocated from memory not covered
    91                         * by the locked 4M kernel DTLB entry. We need
    92                         * to map both TSBs explicitly.
    93                         */
    94                         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
    95                         dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
    96                 }
     134        if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
     135                /*
     136                * TSBs were allocated from memory not covered
     137                * by the locked 4M kernel DTLB entry. We need
     138                * to map both TSBs explicitly.
     139                */
     140                dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
     141                dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
     142        }
    97143               
    98                 /*
    99                 * Setup TSB Base registers.
    100                 */
    101                 tsb_base_reg_t tsb_base;
     144        /*
     145        * Setup TSB Base registers.
     146        */
     147        tsb_base_reg_t tsb_base;
    102148               
    103                 tsb_base.value = 0;
    104                 tsb_base.size = TSB_SIZE;
    105                 tsb_base.split = 0;
     149        tsb_base.value = 0;
     150        tsb_base.size = TSB_SIZE;
     151        tsb_base.split = 0;
    106152
    107                 tsb_base.base = as->arch.itsb >> PAGE_WIDTH;
    108                 itsb_base_write(tsb_base.value);
    109                 tsb_base.base = as->arch.dtsb >> PAGE_WIDTH;
    110                 dtsb_base_write(tsb_base.value);
    111         }
     153        tsb_base.base = ((uintptr_t) as->arch.itsb) >> PAGE_WIDTH;
     154        itsb_base_write(tsb_base.value);
     155        tsb_base.base = ((uintptr_t) as->arch.dtsb) >> PAGE_WIDTH;
     156        dtsb_base_write(tsb_base.value);
    112157#endif
    113158}
    … …  
    130175
    131176#ifdef CONFIG_TSB
    132         if (as != AS_KERNEL) {
    133                 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
     177        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    134178
    135                 ASSERT(as->arch.itsb && as->arch.dtsb);
     179        ASSERT(as->arch.itsb && as->arch.dtsb);
    136180
    137                 uintptr_t tsb = as->arch.itsb;
     181        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    138182               
    139                 if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    140                         /*
    141                          * TSBs were allocated from memory not covered
    142                          * by the locked 4M kernel DTLB entry. We need
    143                          * to demap the entry installed by as_install_arch().
    144                          */
    145                         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
    146                 }
    147                
     183        if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
     184                /*
     185                 * TSBs were allocated from memory not covered
     186                 * by the locked 4M kernel DTLB entry. We need
     187                 * to demap the entry installed by as_install_arch().
     188                 */
     189                dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
    148190        }
    149191#endif

  • kernel/arch/sparc64/src/mm/tlb.c

    r57da95c r29b2bbf  
    5252#include <arch/asm.h>
    5353
     54#ifdef CONFIG_TSB
     55#include <arch/mm/tsb.h>
     56#endif
     57
    5458static void dtlb_pte_copy(pte_t *t, bool ro);
    5559static void itlb_pte_copy(pte_t *t);
    … …  
    145149}
    146150
     151/** Copy PTE to ITLB.
     152 *
     153 * @param t Page Table Entry to be copied.
     154 */
    147155void itlb_pte_copy(pte_t *t)
    148156{
    … …  
    190198                t->a = true;
    191199                itlb_pte_copy(t);
     200#ifdef CONFIG_TSB
     201                itsb_pte_copy(t);
     202#endif
    192203                page_table_unlock(AS, true);
    193204        } else {
    … …  
    234245                t->a = true;
    235246                dtlb_pte_copy(t, true);
     247#ifdef CONFIG_TSB
     248                dtsb_pte_copy(t, true);
     249#endif
    236250                page_table_unlock(AS, true);
    237251        } else {
    … …  
    267281                dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, va);
    268282                dtlb_pte_copy(t, false);
     283#ifdef CONFIG_TSB
     284                dtsb_pte_copy(t, false);
     285#endif
    269286                page_table_unlock(AS, true);
    270287        } else {

  • kernel/arch/sparc64/src/mm/tsb.c

    r57da95c r29b2bbf  
    3434
    3535#include <arch/mm/tsb.h>
     36#include <arch/mm/tlb.h>
     37#include <arch/barrier.h>
    3638#include <mm/as.h>
    3739#include <arch/types.h>
    3840#include <typedefs.h>
     41#include <macros.h>
     42#include <debug.h>
     43
     44#define TSB_INDEX_MASK          ((1<<(21+1+TSB_SIZE-PAGE_WIDTH))-1)
    3945
    4046/** Invalidate portion of TSB.
    4147 *
    4248 * We assume that the address space is already locked.
     49 * Note that respective portions of both TSBs
     50 * are invalidated at a time.
    4351 *
    4452 * @param as Address space.
    4553 * @param page First page to invalidate in TSB.
    46  * @param pages Number of pages to invalidate.
     54 * @param pages Number of pages to invalidate. Value of (count_t) -1 means the whole TSB.
    4755 */
    4856void tsb_invalidate(as_t *as, uintptr_t page, count_t pages)
    4957{
     58        index_t i0, i;
     59        count_t cnt;
     60       
     61        ASSERT(as->arch.itsb && as->arch.dtsb);
     62       
     63        i0 = (page >> PAGE_WIDTH) & TSB_INDEX_MASK;
     64        cnt = min(pages, ITSB_ENTRY_COUNT);
     65       
     66        for (i = 0; i < cnt; i++) {
     67                as->arch.itsb[(i0 + i) & (ITSB_ENTRY_COUNT-1)].tag.invalid = 0;
     68                as->arch.dtsb[(i0 + i) & (DTSB_ENTRY_COUNT-1)].tag.invalid = 0;
     69        }
     70}
     71
     72/** Copy software PTE to ITSB.
     73 *
     74 * @param t Software PTE.
     75 */
     76void itsb_pte_copy(pte_t *t)
     77{
     78        as_t *as;
     79        tsb_entry_t *tsb;
     80       
     81        as = t->as;
     82        tsb = &as->arch.itsb[(t->page >> PAGE_WIDTH) & TSB_INDEX_MASK];
     83
     84        /*
     85         * We use write barriers to make sure that the TSB load
     86         * won't use inconsistent data or that the fault will
     87         * be repeated.
     88         */
     89
     90        tsb->tag.invalid = 1;   /* invalidate the entry (tag target has this set to 0 */
     91
     92        write_barrier();
     93
     94        tsb->tag.context = as->asid;
     95        tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
     96        tsb->data.value = 0;
     97        tsb->data.size = PAGESIZE_8K;
     98        tsb->data.pfn = t->frame >> PAGE_WIDTH;
     99        tsb->data.cp = t->c;
     100        tsb->data.cv = t->c;
     101        tsb->data.p = t->k;     /* p as privileged */
     102        tsb->data.v = t->p;
     103       
     104        write_barrier();
     105       
     106        tsb->tag.invalid = 0;   /* mark the entry as valid */
     107}
     108
     109/** Copy software PTE to DTSB.
     110 *
     111 * @param t Software PTE.
     112 * @param ro If true, the mapping is copied read-only.
     113 */
     114void dtsb_pte_copy(pte_t *t, bool ro)
     115{
     116        as_t *as;
     117        tsb_entry_t *tsb;
     118       
     119        as = t->as;
     120        tsb = &as->arch.dtsb[(t->page >> PAGE_WIDTH) & TSB_INDEX_MASK];
     121
     122        /*
     123         * We use write barriers to make sure that the TSB load
     124         * won't use inconsistent data or that the fault will
     125         * be repeated.
     126         */
     127
     128        tsb->tag.invalid = 1;   /* invalidate the entry (tag target has this set to 0) */
     129
     130        write_barrier();
     131
     132        tsb->tag.context = as->asid;
     133        tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
     134        tsb->data.value = 0;
     135        tsb->data.size = PAGESIZE_8K;
     136        tsb->data.pfn = t->frame >> PAGE_WIDTH;
     137        tsb->data.cp = t->c;
     138        tsb->data.cv = t->c;
     139        tsb->data.p = t->k;     /* p as privileged */
     140        tsb->data.w = ro ? false : t->w;
     141        tsb->data.v = t->p;
     142       
     143        write_barrier();
     144       
     145        tsb->tag.invalid = 0;   /* mark the entry as valid */
    50146}
    51147

  • kernel/arch/xen32/include/mm/as.h

    r57da95c r29b2bbf  
    4848} as_arch_t;
    4949
     50#define as_constructor_arch(as, flags)          (as != as)
     51#define as_destructor_arch(as)                  (as != as)
     52#define as_create_arch(as, flags)               (as != as)
    5053#define as_install_arch(as)
    5154#define as_deinstall_arch(as)

  • kernel/genarch/src/mm/asid.c

    r57da95c r29b2bbf  
    129129                 * cache must be invalidated as well.
    130130                 */
    131                 as_invalidate_translation_cache(as, 0, 0);
     131                as_invalidate_translation_cache(as, 0, (count_t) -1);
    132132               
    133133                mutex_unlock(&as->lock);

  • kernel/generic/include/mm/as.h

    r57da95c r29b2bbf  
    161161        /** Data to be used by the backend. */
    162162        mem_backend_data_t backend_data;
    163        
    164         as_arch_t arch;
    165163};
    166164
    … …  
    191189extern int used_space_remove(as_area_t *a, uintptr_t page, count_t count);
    192190
     191
    193192/* Interface to be implemented by architectures. */
     193#ifndef as_constructor_arch
     194extern int as_constructor_arch(as_t *as, int flags);
     195#endif /* !def as_constructor_arch */
     196#ifndef as_destructor_arch
     197extern int as_destructor_arch(as_t *as);
     198#endif /* !def as_destructor_arch */
     199#ifndef as_create_arch
     200extern int as_create_arch(as_t *as, int flags);
     201#endif /* !def as_create_arch */
    194202#ifndef as_install_arch
    195203extern void as_install_arch(as_t *as);

  • kernel/generic/src/mm/as.c

    r57da95c r29b2bbf  
    107107static void sh_info_remove_reference(share_info_t *sh_info);
    108108
     109static int as_constructor(void *obj, int flags)
     110{
     111        as_t *as = (as_t *) obj;
     112        int rc;
     113
     114        link_initialize(&as->inactive_as_with_asid_link);
     115        mutex_initialize(&as->lock);   
     116       
     117        rc = as_constructor_arch(as, flags);
     118       
     119        return rc;
     120}
     121
     122static int as_destructor(void *obj)
     123{
     124        as_t *as = (as_t *) obj;
     125
     126        return as_destructor_arch(as);
     127}
     128
    109129/** Initialize address space subsystem. */
    110130void as_init(void)
    … …  
    112132        as_arch_init();
    113133       
    114         as_slab = slab_cache_create("as_slab", sizeof(as_t), 0, NULL, NULL, SLAB_CACHE_MAGDEFERRED);
     134        as_slab = slab_cache_create("as_slab", sizeof(as_t), 0,
     135                as_constructor, as_destructor, SLAB_CACHE_MAGDEFERRED);
    115136       
    116137        AS_KERNEL = as_create(FLAG_AS_KERNEL);
    … …  
    129150
    130151        as = (as_t *) slab_alloc(as_slab, 0);
    131         link_initialize(&as->inactive_as_with_asid_link);
    132         mutex_initialize(&as->lock);
     152        (void) as_create_arch(as, 0);
     153       
    133154        btree_create(&as->as_area_btree);
    134155       
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