Changeset 29b2bbf in mainline for kernel/arch/sparc64/src/mm/tlb.c

Timestamp:

2006-09-18T22:10:20Z (18 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

19dba2b

Parents:

57da95c

Message:

sparc64 work:

• Experimental support for TSB (Translation Storage Buffer).

File:

• kernel/arch/sparc64/src/mm/tlb.c (modified) (5 diffs)

kernel/arch/sparc64/src/mm/tlb.c

@@ -52 +52 @@
 #include <arch/asm.h>
 
+#ifdef CONFIG_TSB
+#include <arch/mm/tsb.h>
+#endif
+
 static void dtlb_pte_copy(pte_t *t, bool ro);
 static void itlb_pte_copy(pte_t *t);
@@ -145 +149 @@
 }
 
+/** Copy PTE to ITLB.
+ *
+ * @param t Page Table Entry to be copied.
+ */
 void itlb_pte_copy(pte_t *t)
 {
@@ -190 +198 @@
                 t->a = true;
                 itlb_pte_copy(t);
+#ifdef CONFIG_TSB
+                itsb_pte_copy(t);
+#endif
                 page_table_unlock(AS, true);
         } else {
@@ -234 +245 @@
                 t->a = true;
                 dtlb_pte_copy(t, true);
+#ifdef CONFIG_TSB
+                dtsb_pte_copy(t, true);
+#endif
                 page_table_unlock(AS, true);
         } else {
@@ -267 +281 @@
                 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, va);
                 dtlb_pte_copy(t, false);
+#ifdef CONFIG_TSB
+                dtsb_pte_copy(t, false);
+#endif
                 page_table_unlock(AS, true);
         } else {