Changeset 2a0cda72 in mainline

Timestamp:

2006-12-14T18:14:47Z (18 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

7f95cc5d

Parents:

aeaebcc

Message:

On sparc64's tick interrupt, adjust the TICK_COMPARE register instead of the TICK
register. The TICK register now increments linearily and can be used by the get_cycle()
function.

Location:

kernel/arch/sparc64

Files:

• include/cpu.h (modified) (1 diff)
• include/cycle.h (modified) (1 diff)
• src/drivers/tick.c (modified) (3 diffs)

kernel/arch/sparc64/include/cpu.h

@@ -56 +56 @@
         ver_reg_t ver;
         uint32_t clock_frequency;       /**< Processor frequency in MHz. */
+        uint64_t next_tick_cmpr;        /**< Next clock interrupt should be
+                                         *   generated in this amount of ticks.
+                                         */
 };
         

kernel/arch/sparc64/include/cycle.h

@@ -40 +40 @@
 static inline uint64_t get_cycle(void)
 {
-        return 0;       /* not yet supported */
+        return tick_read();
 }
 

kernel/arch/sparc64/src/drivers/tick.c

@@ -53 +53 @@
         interrupt_register(14, "tick_int", tick_interrupt);
         compare.int_dis = false;
-        compare.tick_cmpr = CPU->arch.clock_frequency/HZ;
+        compare.tick_cmpr = CPU->arch.clock_frequency / HZ;
+        CPU->arch.next_tick_cmpr = compare.tick_cmpr;
         tick_compare_write(compare.value);
         tick_write(0);
@@ -66 +67 @@
 {
         softint_reg_t softint, clear;
-        uint64_t next, compare, start, stop;
+        uint64_t drift;
         
         softint.value = softint_read();
@@ -88 +89 @@
         
         /*
-         * Restart counter.
+         * Reprogram the compare register.
+         * For now, we can ignore the potential of the registers to overflow.
+         * On a 360MHz Ultra 60, the 63-bit compare counter will overflow in
+         * about 812 years. If there was a 2GHz UltraSPARC computer, it would
+         * overflow only in 146 years.
          */
-        compare = CPU->arch.clock_frequency/HZ;
-        start = tick_read();
-        next = start - compare;
-        while (next >= compare - TICK_RESTART_TIME) {
-                next -= compare;
+        drift = tick_read() - CPU->arch.next_tick_cmpr;
+        while (drift > CPU->arch.clock_frequency / HZ) {
+                drift -= CPU->arch.clock_frequency / HZ;
                 CPU->missed_clock_ticks++;
         }
-        stop = tick_read();
-        tick_write(next + (stop - start));
-        
+        CPU->arch.next_tick_cmpr = tick_read() + (CPU->arch.clock_frequency / HZ)
+                - drift;
+        tick_compare_write(CPU->arch.next_tick_cmpr);
         clock();
 }