Changeset 2a2fbc8 in mainline for kernel/arch/mips32/src/mm/tlb.c

Timestamp:

2016-09-01T17:05:13Z (8 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

42d08592

Parents:

f126c87 (diff), fb63c06 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge from lp:~jakub/helenos/pt

File:

• kernel/arch/mips32/src/mm/tlb.c (modified) (7 diffs)

kernel/arch/mips32/src/mm/tlb.c

@@ -97 +97 @@
         entry_lo_t lo;
         uintptr_t badvaddr;
-        pte_t *pte;
+        pte_t pte;
         
         badvaddr = cp0_badvaddr_read();
 
-        pte = page_mapping_find(AS, badvaddr, true);
-        if (pte && pte->p) {
+        bool found = page_mapping_find(AS, badvaddr, true, &pte);
+        if (found && pte.p) {
                 /*
                  * Record access to PTE.
                  */
-                pte->a = 1;
-
-                tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d,
-                    pte->cacheable, pte->pfn);
+                pte.a = 1;
+
+                tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.d,
+                    pte.cacheable, pte.pfn);
+
+                page_mapping_update(AS, badvaddr, true, &pte);
 
                 /*
@@ -138 +140 @@
         tlb_index_t index;
         uintptr_t badvaddr;
-        pte_t *pte;
+        pte_t pte;
 
         /*
@@ -162 +164 @@
         badvaddr = cp0_badvaddr_read();
 
-        pte = page_mapping_find(AS, badvaddr, true);
-        if (pte && pte->p) {
+        bool found = page_mapping_find(AS, badvaddr, true, &pte);
+        if (found && pte.p) {
                 /*
                  * Read the faulting TLB entry.
@@ -172 +174 @@
                  * Record access to PTE.
                  */
-                pte->a = 1;
-
-                tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d,
-                    pte->cacheable, pte->pfn);
+                pte.a = 1;
+
+                tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.d,
+                    pte.cacheable, pte.pfn);
+
+                page_mapping_update(AS, badvaddr, true, &pte);
 
                 /*
@@ -200 +204 @@
         tlb_index_t index;
         uintptr_t badvaddr;
-        pte_t *pte;
+        pte_t pte;
 
         badvaddr = cp0_badvaddr_read();
@@ -224 +228 @@
         }
 
-        pte = page_mapping_find(AS, badvaddr, true);
-        if (pte && pte->p && pte->w) {
+        bool found = page_mapping_find(AS, badvaddr, true, &pte);
+        if (found && pte.p && pte.w) {
                 /*
                  * Read the faulting TLB entry.
@@ -234 +238 @@
                  * Record access and write to PTE.
                  */
-                pte->a = 1;
-                pte->d = 1;
-
-                tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w,
-                    pte->cacheable, pte->pfn);
+                pte.a = 1;
+                pte.d = 1;
+
+                tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.w,
+                    pte.cacheable, pte.pfn);
+
+                page_mapping_update(AS, badvaddr, true, &pte);
 
                 /*