Index: HelenOS.config
===================================================================
--- HelenOS.config	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ HelenOS.config	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -44,6 +44,6 @@
 % Machine type
 @ "msim" MSIM
-@ "bgxemul" GXEmul big endian
-@ "lgxemul" GXEmul little endian
+@ "bmalta" MIPS Malta Development Board big endian
+@ "lmalta" MIPS Malta Development Board little endian
 ! [PLATFORM=mips32] MACHINE (choice)
 
@@ -115,4 +115,12 @@
 ! [PLATFORM=arm32&(PROCESSOR=cortex_a8)] PROCESSOR_ARCH (choice)
 
+% CPU type
+@ "R4000" MIPS R4000
+! [PLATFORM=mips32&MACHINE=msim] PROCESSOR (choice)
+
+% CPU type
+@ "4Kc" MIPS 4Kc
+! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] PROCESSOR (choice)
+
 % RAM disk format
 @ "tmpfs" TMPFS image
@@ -193,9 +201,9 @@
 % User space architecture
 @ "mips32"
-! [PLATFORM=mips32&(MACHINE=msim|MACHINE=lgxemul)] UARCH (choice)
+! [PLATFORM=mips32&(MACHINE=msim|MACHINE=lmalta)] UARCH (choice)
 
 % User space architecture
 @ "mips32eb"
-! [PLATFORM=mips32&MACHINE=bgxemul] UARCH (choice)
+! [PLATFORM=mips32&MACHINE=bmalta] UARCH (choice)
 
 % User space architecture
@@ -270,6 +278,6 @@
 
 % Image format
-@ "ecoff"
-! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] IMAGE (choice)
+@ "elf"
+! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] IMAGE (choice)
 
 % Image format
@@ -360,7 +368,4 @@
 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ia64|PLATFORM=sparc64] CONFIG_FPU (y)
 
-% FPU support
-! [PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FPU (y)
-
 ## armv7 made fpu hardware compulsory
 % FPU support
@@ -447,12 +452,5 @@
 @ "generic" Monitor or serial line
 @ "none" No output device
-! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&MACHINE=msim)|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice)
-
-% Output device class
-@ "generic" Monitor or serial line
-@ "monitor" Monitor
-@ "serial" Serial line
-@ "none" No output device
-! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] CONFIG_HID_OUT (choice)
+! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&(MACHINE=msim|MACHINE=bmalta|MACHINE=lmalta))|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice)
 
 % PC keyboard support
@@ -465,9 +463,9 @@
 ! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboard)&PLATFORM=arm32&MACHINE=integratorcp] CONFIG_PC_KBD (y/n)
 
-% Support for msim/GXemul keyboard
-! [CONFIG_HID_IN=generic&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_KBD (y/n)
-
-% Support for msim/GXemul printer
-! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_PRN (y/n)
+% Support for msim keyboard
+! [CONFIG_HID_IN=generic&MACHINE=msim] CONFIG_MSIM_KBD (y/n)
+
+% Support for msim printer
+! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&MACHINE=msim] CONFIG_MSIM_PRN (y/n)
 
 % Support for VIA CUDA controller
@@ -511,8 +509,8 @@
 
 % Dummy serial line input
-! [CONFIG_MIPS_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y)
+! [CONFIG_MSIM_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y)
 
 % Dummy serial line output
-! [CONFIG_MIPS_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y)
+! [CONFIG_MSIM_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y)
 
 % Serial line input module
@@ -527,7 +525,4 @@
 % Framebuffer support
 ! [CONFIG_HID_OUT=generic&(PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ppc32)] CONFIG_FB (y/n)
-
-% Framebuffer support
-! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=monitor)&PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FB (y/n)
 
 % Framebuffer support
Index: boot/arch/mips32/Makefile.inc
===================================================================
--- boot/arch/mips32/Makefile.inc	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ boot/arch/mips32/Makefile.inc	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -31,17 +31,4 @@
 EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32
 
-RD_SRVS_NON_ESSENTIAL += \
-	$(USPACE_PATH)/srv/bd/gxe_bd/gxe_bd
-
-ifeq ($(MACHINE),lgxemul)
-	BFD_NAME = elf32-tradlittlemips
-	BFD_OUTPUT = ecoff-littlemips
-	ENDIANESS = LE
-endif
-ifeq ($(MACHINE),bgxemul)
-	BFD_NAME = elf32-tradbigmips
-	BFD_OUTPUT = ecoff-bigmips
-	ENDIANESS = BE
-endif
 ifeq ($(MACHINE),msim)
 	BFD_NAME = elf32-tradlittlemips
@@ -49,4 +36,15 @@
 	ENDIANESS = LE
 endif
+ifeq ($(MACHINE),lmalta)
+	BFD_NAME = elf32-tradlittlemips
+	BFD_OUTPUT = elf32-tradlittlemips 
+	ENDIANESS = LE
+endif
+ifeq ($(MACHINE),bmalta)
+	BFD_NAME = elf32-tradbigmips
+	BFD_OUTPUT = elf32-tradbigmips 
+	ENDIANESS = BE
+endif
+
 
 SOURCES = \
Index: boot/arch/mips32/_link.ld.in
===================================================================
--- boot/arch/mips32/_link.ld.in	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ boot/arch/mips32/_link.ld.in	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -2,5 +2,9 @@
 
 SECTIONS {
+#if defined(MACHINE_msim)
 	. = 0xbfc00000;
+#elif defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	. = 0x80103000;
+#endif
 	.text : {
 		*(BOOTSTRAP);
Index: boot/arch/mips32/include/arch.h
===================================================================
--- boot/arch/mips32/include/arch.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ boot/arch/mips32/include/arch.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -33,4 +33,5 @@
 #define PAGE_SIZE   (1 << PAGE_WIDTH)
 
+#if defined(MACHINE_msim)
 #define CPUMAP_OFFSET    0x00001000
 #define STACK_OFFSET     0x00002000
@@ -41,7 +42,21 @@
 #define MSIM_VIDEORAM_ADDRESS  0xb0000000
 #define MSIM_DORDER_ADDRESS    0xb0000100
+#endif
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+#define CPUMAP_OFFSET    0x00100000
+#define STACK_OFFSET     0x00101000
+#define BOOTINFO_OFFSET  0x00102000
+#define BOOT_OFFSET      0x00200000
+#define LOADER_OFFSET    0x00103000
+
+#define YAMON_SUBR_BASE		PA2KA(0x1fc00500)
+#define YAMON_SUBR_PRINT_COUNT	(YAMON_SUBR_BASE + 0x4)
+#endif
 
 #ifndef __ASM__
 	#define PA2KA(addr)    (((uintptr_t) (addr)) + 0x80000000)
+	#define PA2KSEG(addr)  (((uintptr_t) (addr)) + 0xa0000000)
+	#define KA2PA(addr)    (((uintptr_t) (addr)) - 0x80000000)
 	#define KSEG2PA(addr)  (((uintptr_t) (addr)) - 0xa0000000)
 #else
Index: boot/arch/mips32/include/types.h
===================================================================
--- boot/arch/mips32/include/types.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ boot/arch/mips32/include/types.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -47,4 +47,7 @@
 
 typedef struct {
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	uint32_t sdram_size;
+#endif
 	uint32_t cpumap;
 	size_t cnt;
Index: boot/arch/mips32/src/asm.S
===================================================================
--- boot/arch/mips32/src/asm.S	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ boot/arch/mips32/src/asm.S	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -51,4 +51,12 @@
 	and $a0, $a1, $a0
 	mtc0 $a0, $status
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	/*
+	 * Remember the size of the SDRAM in bootinfo.
+	 */
+	la $a0, PA2KA(BOOTINFO_OFFSET)
+	sw $a3, 0($a0)
+#endif
 	
 	/*
Index: boot/arch/mips32/src/main.c
===================================================================
--- boot/arch/mips32/src/main.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ boot/arch/mips32/src/main.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -65,6 +65,9 @@
 	for (i = 0; i < COMPONENTS; i++)
 		printf(" %p|%p: %s image (%zu/%zu bytes)\n", components[i].start,
-		    (void *) KSEG2PA(components[i].start), components[i].name,
-		    components[i].inflated, components[i].size);
+		    (uintptr_t) components[i].start >= PA2KSEG(0) ?
+		    (void *) KSEG2PA(components[i].start) :
+		    (void *) KA2PA(components[i].start),
+		    components[i].name, components[i].inflated,
+		    components[i].size);
 	
 	void *dest[COMPONENTS];
@@ -93,4 +96,5 @@
 	
 	for (i = cnt; i > 0; i--) {
+#ifdef MACHINE_msim
 		void *tail = dest[i - 1] + components[i].inflated;
 		if (tail >= ((void *) PA2KA(LOADER_OFFSET))) {
@@ -99,4 +103,5 @@
 			halt();
 		}
+#endif
 		
 		printf("%s ", components[i - 1].name);
Index: boot/arch/mips32/src/putchar.c
===================================================================
--- boot/arch/mips32/src/putchar.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ boot/arch/mips32/src/putchar.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -32,9 +32,36 @@
 #include <str.h>
 
+#ifdef PUTCHAR_ADDRESS
+#undef PUTCHAR_ADDRESS
+#endif
+
+#if defined(MACHINE_msim)
+#define _putchar(ch)	msim_putchar((ch))
+static void msim_putchar(const wchar_t ch)
+{
+	*((char *) MSIM_VIDEORAM_ADDRESS) = ch;
+}
+#endif
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+#define _putchar(ch)	yamon_putchar((ch))
+typedef void (**yamon_print_count_ptr_t)(uint32_t, const char *, uint32_t);
+yamon_print_count_ptr_t yamon_print_count =
+    (yamon_print_count_ptr_t) YAMON_SUBR_PRINT_COUNT;
+
+static void yamon_putchar(const wchar_t wch)
+{
+	const char ch = (char) wch;
+
+	(*yamon_print_count)(0, &ch, 1);
+}
+#endif
+
 void putchar(const wchar_t ch)
 {
 	if (ascii_check(ch))
-		*((char *) MSIM_VIDEORAM_ADDRESS) = ch;
+		_putchar(ch);
 	else
-		*((char *) MSIM_VIDEORAM_ADDRESS) = U_SPECIAL;
+		_putchar(U_SPECIAL);
 }
+
Index: ntrib/conf/mips32-gx.sh
===================================================================
--- contrib/conf/mips32-gx.sh	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ 	(revision )
@@ -1,17 +1,0 @@
-#!/bin/sh
-
-DISK_IMG=hdisk.img
-
-# Create a disk image if it does not exist
-if [ ! -f "$DISK_IMG" ]; then
-	tools/mkfat.py 1048576 uspace/dist/data "$DISK_IMG"
-fi
-
-if [ "$1" == "-E" ] && [ -n "$2" ]; then
-	MACHINE="$2"
-	shift 2
-else
-	MACHINE="oldtestmips"
-fi
-
-gxemul $@ -E "$MACHINE" -C R4000 -X image.boot -d d0:"$DISK_IMG"
Index: faults/mips32/GXemul/Makefile.config
===================================================================
--- defaults/mips32/GXemul/Makefile.config	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ 	(revision )
@@ -1,2 +1,0 @@
-# Machine type
-MACHINE = lgxemul
Index: defaults/mips32/malta-be/Makefile.config
===================================================================
--- defaults/mips32/malta-be/Makefile.config	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ defaults/mips32/malta-be/Makefile.config	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,2 @@
+# Machine type
+MACHINE = bmalta 
Index: defaults/mips32/malta-le/Makefile.config
===================================================================
--- defaults/mips32/malta-le/Makefile.config	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ defaults/mips32/malta-le/Makefile.config	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,2 @@
+# Machine type
+MACHINE = lmalta 
Index: kernel/arch/mips32/Makefile.inc
===================================================================
--- kernel/arch/mips32/Makefile.inc	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/Makefile.inc	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -36,14 +36,14 @@
 #
 
-ifeq ($(MACHINE),lgxemul)
+ifeq ($(MACHINE),msim)
 	BFD_NAME = elf32-tradlittlemips
 	ENDIANESS = LE
 endif
-ifeq ($(MACHINE),bgxemul)
+ifeq ($(MACHINE),bmalta)
 	BFD_NAME = elf32-tradbigmips
 	ENDIANESS = BE
 	GCC_CFLAGS += -D__BE__
 endif
-ifeq ($(MACHINE),msim)
+ifeq ($(MACHINE),lmalta)
 	BFD_NAME = elf32-tradlittlemips
 	ENDIANESS = LE
@@ -69,4 +69,20 @@
 	arch/$(KARCH)/src/fpu_context.c \
 	arch/$(KARCH)/src/ddi/ddi.c \
-	arch/$(KARCH)/src/smp/dorder.c \
-	arch/$(KARCH)/src/smp/smp.c
+	arch/$(KARCH)/src/smp/smp.c \
+	arch/$(KARCH)/src/machine_func.c
+
+ifeq ($(MACHINE),msim)
+	ARCH_SOURCES += \
+		arch/$(KARCH)/src/smp/dorder.c
+endif
+
+ifeq ($(MACHINE),lmalta)
+        ARCH_SOURCES += arch/$(KARCH)/src/mach/malta/malta.c
+endif
+ifeq ($(MACHINE),bmalta)
+        ARCH_SOURCES += arch/$(KARCH)/src/mach/malta/malta.c
+endif
+ifeq ($(MACHINE),msim)
+        ARCH_SOURCES += arch/$(KARCH)/src/mach/msim/msim.c
+endif
+
Index: kernel/arch/mips32/_link.ld.in
===================================================================
--- kernel/arch/mips32/_link.ld.in	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/_link.ld.in	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -10,5 +10,11 @@
 #define mips mips
 
+#if defined(MACHINE_msim)
 #define KERNEL_LOAD_ADDRESS 0x80100000
+#endif
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+#define KERNEL_LOAD_ADDRESS 0x80200000
+#endif
 
 OUTPUT_ARCH(mips)
Index: kernel/arch/mips32/include/arch/arch.h
===================================================================
--- kernel/arch/mips32/include/arch/arch.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/include/arch/arch.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -44,4 +44,8 @@
 extern size_t cpu_count;
 
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+extern size_t sdram_size;
+#endif
+
 typedef struct {
 	void *addr;
@@ -51,4 +55,7 @@
 
 typedef struct {
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	uint32_t sdram_size;
+#endif
 	uint32_t cpumap;
 	size_t cnt;
Index: kernel/arch/mips32/include/arch/cp0.h
===================================================================
--- kernel/arch/mips32/include/arch/cp0.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/include/arch/cp0.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -45,4 +45,7 @@
 #define cp0_status_im_shift  8
 #define cp0_status_im_mask   0xff00
+
+#define cp0_cause_ip_shift  8
+#define cp0_cause_ip_mask   0xff00
 
 #define cp0_cause_excno(cause)   ((cause >> 2) & 0x1f)
Index: kernel/arch/mips32/include/arch/mach/malta/malta.h
===================================================================
--- kernel/arch/mips32/include/arch/mach/malta/malta.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ kernel/arch/mips32/include/arch/mach/malta/malta.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2013 Jakub Jermar 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup mips32 
+ * @{
+ */
+/** @file
+ *  @brief MIPS Malta platform driver.
+ */
+
+#ifndef KERN_mips32_malta_H_
+#define KERN_mips32_malta_H_
+
+#include <arch/machine_func.h>
+
+extern struct mips32_machine_ops malta_machine_ops;
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/mips32/include/arch/mach/msim/msim.h
===================================================================
--- kernel/arch/mips32/include/arch/mach/msim/msim.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ kernel/arch/mips32/include/arch/mach/msim/msim.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2013 Jakub Jermar 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup mips32 
+ * @{
+ */
+/** @file
+ *  @brief msim platform driver.
+ */
+
+#ifndef KERN_mips32_msim_H_
+#define KERN_mips32_msim_H_
+
+#include <arch/machine_func.h>
+
+extern struct mips32_machine_ops msim_machine_ops;
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/mips32/include/arch/machine_func.h
===================================================================
--- kernel/arch/mips32/include/arch/machine_func.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ kernel/arch/mips32/include/arch/machine_func.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2007 Michal Kebrt
+ * Copyright (c) 2009 Vineeth Pillai
+ * Copyrithg (c) 2012 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup mips32
+ * @{
+ */
+/** @file
+ *  @brief Declarations of machine specific functions.
+ *
+ *  These functions allow us to support various kinds of mips32 machines
+ *  in a unified way.
+ */
+
+#ifndef KERN_mips32_MACHINE_FUNC_H_
+#define KERN_mips32_MACHINE_FUNC_H_
+
+#include <typedefs.h>
+
+struct mips32_machine_ops {
+	void (*machine_init)(void);
+	void (*machine_cpu_halt)(void);
+	void (*machine_get_memory_extents)(uintptr_t *, size_t *);
+	void (*machine_frame_init)(void);
+	void (*machine_output_init)(void);
+	void (*machine_input_init)(void);
+	const char *(*machine_get_platform_name)(void);
+};
+
+/** Pointer to mips32_machine_ops structure being used. */
+extern struct mips32_machine_ops *machine_ops;
+
+extern void machine_ops_init(void);
+
+extern void machine_init(void);
+extern void machine_cpu_halt(void);
+extern void machine_get_memory_extents(uintptr_t *, size_t *);
+extern void machine_frame_init(void);
+extern void machine_output_init(void);
+extern void machine_input_init(void);
+extern const char *machine_get_platform_name(void);
+
+#endif
+
+/** @}
+ */
Index: kernel/arch/mips32/include/arch/mm/tlb.h
===================================================================
--- kernel/arch/mips32/include/arch/mm/tlb.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/include/arch/mm/tlb.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -41,8 +41,15 @@
 #include <trace.h>
 
+#if defined(PROCESSOR_R4000)
 #define TLB_ENTRY_COUNT  48
+#define TLB_INDEX_BITS   6
+#elif defined(PROCESSOR_4Kc)
+#define TLB_ENTRY_COUNT  16
+#define TLB_INDEX_BITS   4
+#else
+#error Please define TLB_ENTRY_COUNT for the target processor.
+#endif
 
-#define TLB_WIRED               1
-#define TLB_KSTACK_WIRED_INDEX  0
+#define TLB_WIRED              	0 
 
 #define TLB_PAGE_MASK_4K    (0x000 << 13)
@@ -112,9 +119,9 @@
 #ifdef __BE__
 		unsigned p : 1;
-		unsigned : 25;
-		unsigned index : 6;
+		unsigned : 32 - TLB_INDEX_BITS - 1;
+		unsigned index : TLB_INDEX_BITS;
 #else
-		unsigned index : 6;
-		unsigned : 25;
+		unsigned index : TLB_INDEX_BITS;
+		unsigned : 32 - TLB_INDEX_BITS - 1;
 		unsigned p : 1;
 #endif
Index: kernel/arch/mips32/src/exception.c
===================================================================
--- kernel/arch/mips32/src/exception.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/src/exception.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -165,10 +165,21 @@
 static void interrupt_exception(unsigned int n, istate_t *istate)
 {
+	uint32_t ip;
+	uint32_t im;
+
 	/* Decode interrupt number and process the interrupt */
-	uint32_t cause = (cp0_cause_read() >> 8) & 0xff;
+	ip = (cp0_cause_read() & cp0_cause_ip_mask) >> cp0_cause_ip_shift;
+	im = (cp0_status_read() & cp0_status_im_mask) >> cp0_status_im_shift;
 	
 	unsigned int i;
 	for (i = 0; i < 8; i++) {
-		if (cause & (1 << i)) {
+
+		/*
+		 * The interrupt could only occur if it is unmasked in the
+		 * status register. On the other hand, an interrupt can be
+		 * apparently pending even if it is masked, so we need to
+		 * check both the masked and pending interrupts.
+		 */
+		if (im & ip & (1 << i)) {
 			irq_t *irq = irq_dispatch_and_lock(i);
 			if (irq) {
Index: kernel/arch/mips32/src/interrupt.c
===================================================================
--- kernel/arch/mips32/src/interrupt.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/src/interrupt.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -45,9 +45,15 @@
 #define IRQ_COUNT   8
 #define TIMER_IRQ   7
+
+#ifdef MACHINE_msim
 #define DORDER_IRQ  5
+#endif
 
 function virtual_timer_fnc = NULL;
 static irq_t timer_irq;
+
+#ifdef MACHINE_msim
 static irq_t dorder_irq;
+#endif
 
 // TODO: This is SMP unsafe!!!
@@ -151,4 +157,5 @@
 }
 
+#ifdef MACHINE_msim
 static irq_ownership_t dorder_claim(irq_t *irq)
 {
@@ -160,4 +167,5 @@
 	dorder_ipi_ack(1 << dorder_cpuid());
 }
+#endif
 
 /* Initialize basic tables for exception dispatching */
@@ -176,4 +184,5 @@
 	cp0_unmask_int(TIMER_IRQ);
 	
+#ifdef MACHINE_msim
 	irq_initialize(&dorder_irq);
 	dorder_irq.devno = device_assign_devno();
@@ -184,4 +193,5 @@
 	
 	cp0_unmask_int(DORDER_IRQ);
+#endif
 }
 
Index: kernel/arch/mips32/src/mach/malta/malta.c
===================================================================
--- kernel/arch/mips32/src/mach/malta/malta.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ kernel/arch/mips32/src/mach/malta/malta.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2013 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup mips32 
+ * @{
+ */
+/** @file
+ *  @brief MIPS Malta platform driver.
+ */
+
+#include <arch/mach/malta/malta.h>
+#include <console/console.h>
+#include <console/chardev.h>
+#include <arch/mm/page.h>
+
+static void malta_init(void);
+static void malta_cpu_halt(void);
+static void malta_get_memory_extents(uintptr_t *, size_t *);
+static void malta_frame_init(void);
+static void malta_output_init(void);
+static void malta_input_init(void);
+static const char *malta_get_platform_name(void);
+
+struct mips32_machine_ops malta_machine_ops = {
+	.machine_init = malta_init,
+	.machine_cpu_halt = malta_cpu_halt,
+	.machine_get_memory_extents = malta_get_memory_extents,
+	.machine_frame_init = malta_frame_init,
+	.machine_output_init = malta_output_init,
+	.machine_input_init = malta_input_init,
+	.machine_get_platform_name = malta_get_platform_name	
+};
+
+void malta_init(void)
+{
+}
+
+void malta_cpu_halt(void)
+{
+}
+
+void malta_get_memory_extents(uintptr_t *start, size_t *size)
+{
+}
+
+void malta_frame_init(void)
+{
+}
+
+#define YAMON_SUBR_BASE         PA2KA(0x1fc00500)
+#define YAMON_SUBR_PRINT_COUNT  (YAMON_SUBR_BASE + 0x4)
+
+typedef void (**yamon_print_count_ptr_t)(uint32_t, const char *, uint32_t);
+
+yamon_print_count_ptr_t yamon_print_count =
+    (yamon_print_count_ptr_t) YAMON_SUBR_PRINT_COUNT;
+
+static void yamon_putchar(outdev_t *dev, const wchar_t wch)
+{
+
+        const char ch = (char) wch;
+
+        (*yamon_print_count)(0, &ch, 1);
+}
+
+static outdev_t yamon_outdev;
+static outdev_operations_t yamon_outdev_ops = {
+	.write = yamon_putchar,
+	.redraw = NULL
+};
+
+void malta_output_init(void)
+{
+	outdev_initialize("yamon", &yamon_outdev, &yamon_outdev_ops);
+	stdout_wire(&yamon_outdev);
+}
+
+void malta_input_init(void)
+{
+}
+
+const char *malta_get_platform_name(void)
+{
+	return "malta";
+}
+
+/** @}
+ */
Index: kernel/arch/mips32/src/mach/msim/msim.c
===================================================================
--- kernel/arch/mips32/src/mach/msim/msim.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ kernel/arch/mips32/src/mach/msim/msim.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2013 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup mips32 
+ * @{
+ */
+/** @file
+ *  @brief msim platform driver.
+ */
+
+#include <arch/mach/msim/msim.h>
+#include <console/console.h>
+#include <sysinfo/sysinfo.h>
+#include <arch/drivers/msim.h>
+#include <genarch/drivers/dsrln/dsrlnin.h>
+#include <genarch/drivers/dsrln/dsrlnout.h>
+#include <genarch/srln/srln.h>
+
+static void msim_init(void);
+static void msim_cpu_halt(void);
+static void msim_get_memory_extents(uintptr_t *, size_t *);
+static void msim_frame_init(void);
+static void msim_output_init(void);
+static void msim_input_init(void);
+static const char *msim_get_platform_name(void);
+
+struct mips32_machine_ops msim_machine_ops = {
+	.machine_init = msim_init,
+	.machine_cpu_halt = msim_cpu_halt,
+	.machine_get_memory_extents = msim_get_memory_extents,
+	.machine_frame_init = msim_frame_init,
+	.machine_output_init = msim_output_init,
+	.machine_input_init = msim_input_init,
+	.machine_get_platform_name = msim_get_platform_name	
+};
+
+void msim_init(void)
+{
+}
+
+void msim_cpu_halt(void)
+{
+}
+
+void msim_get_memory_extents(uintptr_t *start, size_t *size)
+{
+}
+
+void msim_frame_init(void)
+{
+}
+
+void msim_output_init(void)
+{
+#ifdef CONFIG_MSIM_PRN
+	outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
+	if (dsrlndev)
+		stdout_wire(dsrlndev);
+#endif
+}
+
+void msim_input_init(void)
+{
+#ifdef CONFIG_MSIM_KBD
+	/*
+	 * Initialize the msim keyboard port. Then initialize the serial line
+	 * module and connect it to the msim keyboard. Enable keyboard
+	 * interrupts.
+	 */
+	dsrlnin_instance_t *dsrlnin_instance
+	    = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ);
+	if (dsrlnin_instance) {
+		srln_instance_t *srln_instance = srln_init();
+		if (srln_instance) {
+			indev_t *sink = stdin_wire();
+			indev_t *srln = srln_wire(srln_instance, sink);
+			dsrlnin_wire(dsrlnin_instance, srln);
+			cp0_unmask_int(MSIM_KBD_IRQ);
+		}
+	}
+	
+	/*
+	 * This is the necessary evil until the userspace driver is entirely
+	 * self-sufficient.
+	 */
+	sysinfo_set_item_val("kbd", NULL, true);
+	sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
+	sysinfo_set_item_val("kbd.address.physical", NULL,
+	    PA2KA(MSIM_KBD_ADDRESS));
+#endif
+}
+
+const char *msim_get_platform_name(void)
+{
+	return "msim";
+}
+
+/** @}
+ */
Index: kernel/arch/mips32/src/machine_func.c
===================================================================
--- kernel/arch/mips32/src/machine_func.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ kernel/arch/mips32/src/machine_func.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2009 Vineeth Pillai
+ * Copyright (c) 2012 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup mips32
+ * @{
+ */
+/** @file
+ *  @brief Definitions of machine specific functions.
+ *
+ *  These functions allow us to support various kinds of mips32 machines
+ *  in a unified way.
+ */
+
+#include <arch/machine_func.h>
+#if defined(MACHINE_msim)
+#include <arch/mach/msim/msim.h>
+#elif defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+#include <arch/mach/malta/malta.h>
+#endif
+
+/** Pointer to machine_ops structure being used. */
+struct mips32_machine_ops *machine_ops;
+
+/** Initialize machine_ops pointer. */
+void machine_ops_init(void)
+{
+#if defined(MACHINE_msim)
+	machine_ops = &msim_machine_ops;
+#elif defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	machine_ops = &malta_machine_ops;
+#else
+#error Machine type not defined.
+#endif
+}
+
+void machine_init(void)
+{
+	(machine_ops->machine_init)();
+}
+
+
+/** Halts CPU. */
+void machine_cpu_halt(void)
+{
+	(machine_ops->machine_cpu_halt)();
+}
+
+/** Get extents of available memory.
+ *
+ * @param start		Place to store memory start address.
+ * @param size		Place to store memory size.
+ */
+void machine_get_memory_extents(uintptr_t *start, size_t *size)
+{
+	(machine_ops->machine_get_memory_extents)(start, size);
+}
+
+/*
+ * Machine specific frame initialization
+ */
+void machine_frame_init(void)
+{
+	(machine_ops->machine_frame_init)();
+}
+
+/*
+ * configure the output device.
+ */
+void machine_output_init(void)
+{
+	(machine_ops->machine_output_init)();
+}
+
+/*
+ * configure the input device.
+ */
+void machine_input_init(void)
+{
+	(machine_ops->machine_input_init)();
+}
+
+const char *machine_get_platform_name(void)
+{
+	if (machine_ops->machine_get_platform_name)
+		return machine_ops->machine_get_platform_name();
+	return NULL;
+}
+
+/** @}
+ */
Index: kernel/arch/mips32/src/mips32.c
===================================================================
--- kernel/arch/mips32/src/mips32.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/src/mips32.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -41,14 +41,9 @@
 #include <memstr.h>
 #include <userspace.h>
-#include <console/console.h>
 #include <syscall/syscall.h>
 #include <sysinfo/sysinfo.h>
 #include <arch/debug.h>
 #include <arch/debugger.h>
-#include <arch/drivers/msim.h>
-#include <genarch/fb/fb.h>
-#include <genarch/drivers/dsrln/dsrlnin.h>
-#include <genarch/drivers/dsrln/dsrlnout.h>
-#include <genarch/srln/srln.h>
+#include <arch/machine_func.h>
 
 /* Size of the code jumping to the exception handler code
@@ -70,4 +65,8 @@
 
 size_t cpu_count = 0;
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+size_t sdram_size = 0;
+#endif
 
 /** Performs mips32-specific initialization before main_bsp() is called. */
@@ -88,4 +87,11 @@
 			cpu_count++;
 	}
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	sdram_size = bootinfo->sdram_size;
+#endif
+
+	/* Initialize machine_ops pointer. */
+	machine_ops_init();
 }
 
@@ -124,26 +130,7 @@
 {
 	interrupt_init();
-	
-#ifdef CONFIG_FB
-	/* GXemul framebuffer */
-	fb_properties_t gxemul_prop = {
-		.addr = 0x12000000,
-		.offset = 0,
-		.x = 640,
-		.y = 480,
-		.scan = 1920,
-		.visual = VISUAL_RGB_8_8_8,
-	};
-	
-	outdev_t *fbdev = fb_init(&gxemul_prop);
-	if (fbdev)
-		stdout_wire(fbdev);
-#endif
-
-#ifdef CONFIG_MIPS_PRN
-	outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
-	if (dsrlndev)
-		stdout_wire(dsrlndev);
-#endif
+
+	machine_init();
+	machine_output_init();
 }
 
@@ -158,45 +145,10 @@
 void arch_post_smp_init(void)
 {
-	static const char *platform;
-
 	/* Set platform name. */
-#ifdef MACHINE_msim
-	platform = "msim";
-#endif
-#ifdef MACHINE_bgxemul
-	platform = "gxemul";
-#endif
-#ifdef MACHINE_lgxemul
-	platform = "gxemul";
-#endif
-	sysinfo_set_item_data("platform", NULL, (void *) platform,
-	    str_size(platform));
-
-#ifdef CONFIG_MIPS_KBD
-	/*
-	 * Initialize the msim/GXemul keyboard port. Then initialize the serial line
-	 * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
-	 */
-	dsrlnin_instance_t *dsrlnin_instance
-	    = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ);
-	if (dsrlnin_instance) {
-		srln_instance_t *srln_instance = srln_init();
-		if (srln_instance) {
-			indev_t *sink = stdin_wire();
-			indev_t *srln = srln_wire(srln_instance, sink);
-			dsrlnin_wire(dsrlnin_instance, srln);
-			cp0_unmask_int(MSIM_KBD_IRQ);
-		}
-	}
-	
-	/*
-	 * This is the necessary evil until the userspace driver is entirely
-	 * self-sufficient.
-	 */
-	sysinfo_set_item_val("kbd", NULL, true);
-	sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
-	sysinfo_set_item_val("kbd.address.physical", NULL,
-	    PA2KA(MSIM_KBD_ADDRESS));
-#endif
+	sysinfo_set_item_data("platform", NULL,
+	    (void *) machine_get_platform_name(),
+	    str_size(machine_get_platform_name()));
+
+	machine_input_init();
 }
 
Index: kernel/arch/mips32/src/mm/frame.c
===================================================================
--- kernel/arch/mips32/src/mm/frame.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/src/mm/frame.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -40,5 +40,8 @@
 #include <mm/asid.h>
 #include <config.h>
+#ifdef MACHINE_msim
 #include <arch/drivers/msim.h>
+#endif
+#include <arch/arch.h>
 #include <print.h>
 
@@ -84,9 +87,7 @@
 		return false;
 #endif
-	
-#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
-	/* gxemul devices */
-	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
-	    0x10000000, MiB2SIZE(256)))
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	if (frame >= (sdram_size >> ZERO_PAGE_WIDTH))
 		return false;
 #endif
@@ -225,11 +226,4 @@
 					if (ZERO_PAGE_VALUE != 0xdeadbeef)
 						avail = false;
-#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
-					else {
-						ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
-						if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
-							avail = false;
-					}
-#endif
 				}
 			}
@@ -247,4 +241,30 @@
 	/* Blacklist interrupt vector frame */
 	frame_mark_unavailable(0, 1);
+
+#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
+	/* Blacklist memory regions used by YAMON.
+	 *
+	 * The YAMON User's Manual vaguely says the following physical addresses
+	 * are taken by YAMON:
+	 *
+	 * 0x1000	YAMON functions
+	 * 0x5000	YAMON code
+	 *
+	 * These addresses overlap with the beginning of the SDRAM so we need to
+	 * make sure they cannot be allocated.
+	 *
+	 * The User's Manual unfortunately does not say where does the SDRAM
+	 * portion used by YAMON end.
+	 *
+	 * Looking into the YAMON 02.21 sources, it looks like the first free
+	 * address is computed dynamically and depends on the size of the YAMON
+	 * image. From the YAMON binary, it appears to be 0xc0d50 or roughly
+	 * 772 KiB for that particular version.
+	 *
+	 * Linux is linked to 1MiB which seems to be a safe bet and a reasonable
+	 * upper bound for memory taken by YAMON. We will use it too.
+	 */
+	frame_mark_unavailable(0, 1024 * 1024 / FRAME_SIZE);
+#endif
 	
 	/* Cleanup */
Index: kernel/arch/mips32/src/mm/tlb.c
===================================================================
--- kernel/arch/mips32/src/mm/tlb.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips32/src/mm/tlb.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -48,5 +48,12 @@
 #include <symtab.h>
 
-static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *);
+#define VPN_SHIFT	12	
+#define ADDR2VPN(a)	((a) >> VPN_SHIFT)
+#define ADDR2VPN2(a)	(ADDR2VPN((a)) >> 1)
+#define VPN2ADDR(vpn)	((vpn) << VPN_SHIFT)
+#define VPN22ADDR(vpn2)	(VPN2ADDR(vpn2) << 1)
+
+#define BANK_SELECT_BIT(a)	(((a) >> PAGE_WIDTH) & 1) 
+	
 
 /** Initialize TLB.
@@ -84,14 +91,11 @@
 {
 	entry_lo_t lo;
-	entry_hi_t hi;
-	asid_t asid;
 	uintptr_t badvaddr;
 	pte_t *pte;
 	
 	badvaddr = cp0_badvaddr_read();
-	asid = AS->asid;
-	
-	pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate);
-	if (pte) {
+
+	pte = page_mapping_find(AS, badvaddr, true);
+	if (pte && pte->p) {
 		/*
 		 * Record access to PTE.
@@ -99,5 +103,4 @@
 		pte->a = 1;
 
-		tlb_prepare_entry_hi(&hi, asid, badvaddr);
 		tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d,
 		    pte->cacheable, pte->pfn);
@@ -106,6 +109,5 @@
 		 * New entry is to be inserted into TLB
 		 */
-		cp0_entry_hi_write(hi.value);
-		if ((badvaddr / PAGE_SIZE) % 2 == 0) {
+		if (BANK_SELECT_BIT(badvaddr) == 0) {
 			cp0_entry_lo0_write(lo.value);
 			cp0_entry_lo1_write(0);
@@ -116,5 +118,8 @@
 		cp0_pagemask_write(TLB_PAGE_MASK_16K);
 		tlbwr();
-	}
+		return;
+	}
+
+	(void) as_page_fault(badvaddr, PF_ACCESS_READ, istate);
 }
 
@@ -125,25 +130,33 @@
 void tlb_invalid(istate_t *istate)
 {
+	entry_lo_t lo;
 	tlb_index_t index;
 	uintptr_t badvaddr;
-	entry_lo_t lo;
-	entry_hi_t hi;
 	pte_t *pte;
-
-	badvaddr = cp0_badvaddr_read();
 
 	/*
 	 * Locate the faulting entry in TLB.
 	 */
-	hi.value = cp0_entry_hi_read();
-	tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
-	cp0_entry_hi_write(hi.value);
 	tlbp();
 	index.value = cp0_index_read();
 
+#if defined(PROCESSOR_4Kc)
+	/*
+	 * This can happen on a 4Kc when Status.EXL is 1 and there is a TLB miss.
+	 * EXL is 1 when interrupts are disabled. The combination of a TLB miss
+	 * and disabled interrupts is possible in copy_to/from_uspace().
+	 */
+	if (index.p) {
+		tlb_refill(istate);
+		return;
+	}
+#endif
+
 	ASSERT(!index.p);
 
-	pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate);
-	if (pte) {
+	badvaddr = cp0_badvaddr_read();
+
+	pte = page_mapping_find(AS, badvaddr, true);
+	if (pte && pte->p) {
 		/*
 		 * Read the faulting TLB entry.
@@ -162,11 +175,13 @@
 		 * The entry is to be updated in TLB.
 		 */
-		if ((badvaddr / PAGE_SIZE) % 2 == 0)
+		if (BANK_SELECT_BIT(badvaddr) == 0)
 			cp0_entry_lo0_write(lo.value);
 		else
 			cp0_entry_lo1_write(lo.value);
-		cp0_pagemask_write(TLB_PAGE_MASK_16K);
 		tlbwi();
-	}
+		return;
+	}
+
+	(void) as_page_fault(badvaddr, PF_ACCESS_READ, istate);
 }
 
@@ -177,18 +192,12 @@
 void tlb_modified(istate_t *istate)
 {
+	entry_lo_t lo;
 	tlb_index_t index;
 	uintptr_t badvaddr;
-	entry_lo_t lo;
-	entry_hi_t hi;
 	pte_t *pte;
-
-	badvaddr = cp0_badvaddr_read();
 
 	/*
 	 * Locate the faulting entry in TLB.
 	 */
-	hi.value = cp0_entry_hi_read();
-	tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
-	cp0_entry_hi_write(hi.value);
 	tlbp();
 	index.value = cp0_index_read();
@@ -199,6 +208,8 @@
 	ASSERT(!index.p);
 
-	pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate);
-	if (pte) {
+	badvaddr = cp0_badvaddr_read();
+
+	pte = page_mapping_find(AS, badvaddr, true);
+	if (pte && pte->p && pte->w) {
 		/*
 		 * Read the faulting TLB entry.
@@ -218,54 +229,13 @@
 		 * The entry is to be updated in TLB.
 		 */
-		if ((badvaddr / PAGE_SIZE) % 2 == 0)
+		if (BANK_SELECT_BIT(badvaddr) == 0)
 			cp0_entry_lo0_write(lo.value);
 		else
 			cp0_entry_lo1_write(lo.value);
-		cp0_pagemask_write(TLB_PAGE_MASK_16K);
 		tlbwi();
-	}
-}
-
-/** Try to find PTE for faulting address.
- *
- * @param badvaddr	Faulting virtual address.
- * @param access	Access mode that caused the fault.
- * @param istate	Pointer to interrupted state.
- *
- * @return		PTE on success, NULL otherwise.
- */
-pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate)
-{
-	entry_hi_t hi;
-	pte_t *pte;
-
-	hi.value = cp0_entry_hi_read();
-
-	ASSERT(hi.asid == AS->asid);
-
-	/*
-	 * Check if the mapping exists in page tables.
-	 */	
-	pte = page_mapping_find(AS, badvaddr, true);
-	if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) {
-		/*
-		 * Mapping found in page tables.
-		 * Immediately succeed.
-		 */
-		return pte;
-	}
-
-	/*
-	 * Mapping not found in page tables.
-	 * Resort to higher-level page fault handler.
-	 */
-	if (as_page_fault(badvaddr, access, istate) == AS_PF_OK) {
-		pte = page_mapping_find(AS, badvaddr, true);
-		ASSERT(pte && pte->p);
-		ASSERT(pte->w || access != PF_ACCESS_WRITE);
-		return pte;
-	}
-
-	return NULL;
+		return;
+	}
+
+	(void) as_page_fault(badvaddr, PF_ACCESS_WRITE, istate);
 }
 
@@ -284,5 +254,6 @@
 void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr)
 {
-	hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2);
+	hi->value = 0;
+	hi->vpn2 = ADDR2VPN2(ALIGN_DOWN(addr, PAGE_SIZE));
 	hi->asid = asid;
 }
@@ -291,12 +262,15 @@
 void tlb_print(void)
 {
-	page_mask_t mask;
-	entry_lo_t lo0, lo1;
+	page_mask_t mask, mask_save;
+	entry_lo_t lo0, lo0_save, lo1, lo1_save;
 	entry_hi_t hi, hi_save;
 	unsigned int i;
 
 	hi_save.value = cp0_entry_hi_read();
-	
-	printf("[nr] [asid] [vpn2] [mask] [gvdc] [pfn ]\n");
+	lo0_save.value = cp0_entry_lo0_read();
+	lo1_save.value = cp0_entry_lo1_read();
+	mask_save.value = cp0_pagemask_read();
+	
+	printf("[nr] [asid] [vpn2    ] [mask] [gvdc] [pfn     ]\n");
 	
 	for (i = 0; i < TLB_ENTRY_COUNT; i++) {
@@ -309,12 +283,15 @@
 		lo1.value = cp0_entry_lo1_read();
 		
-		printf("%-4u %-6u %#6x %#6x  %1u%1u%1u%1u  %#6x\n",
-		    i, hi.asid, hi.vpn2, mask.mask,
-		    lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn);
-		printf("                           %1u%1u%1u%1u  %#6x\n",
-		    lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
+		printf("%-4u %-6u %0#10x %-#6x  %1u%1u%1u%1u  %0#10x\n",
+		    i, hi.asid, VPN22ADDR(hi.vpn2), mask.mask,
+		    lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn << FRAME_WIDTH);
+		printf("                               %1u%1u%1u%1u  %0#10x\n",
+		    lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn << FRAME_WIDTH);
 	}
 	
 	cp0_entry_hi_write(hi_save.value);
+	cp0_entry_lo0_write(lo0_save.value);
+	cp0_entry_lo1_write(lo1_save.value);
+	cp0_pagemask_write(mask_save.value);
 }
 
@@ -322,11 +299,11 @@
 void tlb_invalidate_all(void)
 {
-	ipl_t ipl;
 	entry_lo_t lo0, lo1;
 	entry_hi_t hi_save;
 	int i;
 
+	ASSERT(interrupts_disabled());
+
 	hi_save.value = cp0_entry_hi_read();
-	ipl = interrupts_disable();
 
 	for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) {
@@ -346,5 +323,4 @@
 	}
 	
-	interrupts_restore(ipl);
 	cp0_entry_hi_write(hi_save.value);
 }
@@ -356,13 +332,12 @@
 void tlb_invalidate_asid(asid_t asid)
 {
-	ipl_t ipl;
 	entry_lo_t lo0, lo1;
 	entry_hi_t hi, hi_save;
 	int i;
 
+	ASSERT(interrupts_disabled());
 	ASSERT(asid != ASID_INVALID);
 
 	hi_save.value = cp0_entry_hi_read();
-	ipl = interrupts_disable();
 	
 	for (i = 0; i < TLB_ENTRY_COUNT; i++) {
@@ -386,5 +361,4 @@
 	}
 	
-	interrupts_restore(ipl);
 	cp0_entry_hi_write(hi_save.value);
 }
@@ -400,8 +374,9 @@
 {
 	unsigned int i;
-	ipl_t ipl;
 	entry_lo_t lo0, lo1;
 	entry_hi_t hi, hi_save;
 	tlb_index_t index;
+
+	ASSERT(interrupts_disabled());
 	
 	if (asid == ASID_INVALID)
@@ -409,8 +384,6 @@
 
 	hi_save.value = cp0_entry_hi_read();
-	ipl = interrupts_disable();
 
 	for (i = 0; i < cnt + 1; i += 2) {
-		hi.value = 0;
 		tlb_prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE);
 		cp0_entry_hi_write(hi.value);
@@ -439,5 +412,4 @@
 	}
 	
-	interrupts_restore(ipl);
 	cp0_entry_hi_write(hi_save.value);
 }
Index: kernel/arch/mips64/src/mips64.c
===================================================================
--- kernel/arch/mips64/src/mips64.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips64/src/mips64.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -46,5 +46,7 @@
 #include <arch/debug.h>
 #include <arch/debugger.h>
+#ifdef MACHINE_msim
 #include <arch/drivers/msim.h>
+#endif
 #include <genarch/fb/fb.h>
 #include <genarch/drivers/dsrln/dsrlnin.h>
@@ -125,5 +127,5 @@
 	interrupt_init();
 	
-#ifdef CONFIG_MIPS_PRN
+#ifdef CONFIG_MSIM_PRN
 	outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
 	if (dsrlndev)
@@ -151,8 +153,9 @@
 	    str_size(platform));
 	
-#ifdef CONFIG_MIPS_KBD
-	/*
-	 * Initialize the msim/GXemul keyboard port. Then initialize the serial line
-	 * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
+#ifdef CONFIG_MSIM_KBD
+	/*
+	 * Initialize the msim keyboard port. Then initialize the serial line
+	 * module and connect it to the msim keyboard. Enable keyboard
+	 * interrupts.
 	 */
 	dsrlnin_instance_t *dsrlnin_instance
Index: kernel/arch/mips64/src/mm/frame.c
===================================================================
--- kernel/arch/mips64/src/mm/frame.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/arch/mips64/src/mm/frame.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -40,5 +40,7 @@
 #include <mm/asid.h>
 #include <config.h>
+#ifdef MACHINE_msim
 #include <arch/drivers/msim.h>
+#endif
 #include <print.h>
 
Index: kernel/genarch/include/genarch/drivers/amdm37x_dispc/amdm37x_dispc.h
===================================================================
--- kernel/genarch/include/genarch/drivers/amdm37x_dispc/amdm37x_dispc.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
+++ kernel/genarch/include/genarch/drivers/amdm37x_dispc/amdm37x_dispc.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -0,0 +1,394 @@
+/*
+ * Copyright (c) 2012 Jan Vesely
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** @addtogroup genarch
+ * @{
+ */
+/**
+ * @file
+ * @brief Texas Instruments AM/DM37x SDRAM Memory Scheduler.
+ */
+
+#ifndef KERN_AMDM37x_DISPC_H_
+#define KERN_AMDM37x_DISPC_H_
+
+/* AMDM37x TRM p. 1813 */
+#define AMDM37x_DISPC_BASE_ADDRESS 0x48050400
+#define AMDM37x_DISPC_SIZE 1024
+
+#define __paddname(line) PADD32_ ## line
+#define _paddname(line) __paddname(line)
+#define PADD32(count) uint32_t _paddname(__LINE__)[count]
+
+#include <typedefs.h>
+
+typedef struct {
+	const ioport32_t revision;
+#define AMDM37X_DISPC_REVISION_MASK  0xff
+
+	PADD32(3);
+	ioport32_t sysconfig;
+#define AMDM37X_DISPC_SYSCONFIG_AUTOIDLE_FLAG  (1 << 0)
+#define AMDM37X_DISPC_SYSCONFIG_SOFTRESET_FLAG  (1 << 1)
+#define AMDM37X_DISPC_SYSCONFIG_ENWAKEUP_FLAG  (1 << 2)
+#define AMDM37X_DISPC_SYSCONFIG_SIDLEMODE_MASK  0x3
+#define AMDM37X_DISPC_SYSCONFIG_SIDLEMODE_SHIFT  3
+#define AMDM37X_DISPC_SYSCONFIG_CLOCKACTIVITY_MASK  0x3
+#define AMDM37X_DISPC_SYSCONFIG_CLOCKACTIVITY_SHIFT  8
+#define AMDM37X_DISPC_SYSCONFIG_MIDLEMODE_MASK  0x3
+#define AMDM37X_DISPC_SYSCONFIG_MIDLEMODE_SHIFT  12
+
+	const ioport32_t sysstatus;
+#define AMDM37X_DISPC_SYSSTATUS_RESETDONE_FLAG  (1 << 0)
+
+	ioport32_t irqstatus;
+	ioport32_t irqenable;
+#define AMDM37X_DISPC_IRQ_FRAMEDONE_FLAG  (1 << 0)
+#define AMDM37X_DISPC_IRQ_VSYNC_FLAG  (1 << 1)
+#define AMDM37X_DISPC_IRQ_EVSYNCEVEN_FLAG  (1 << 2)
+#define AMDM37X_DISPC_IRQ_EVSYNCODD_FLAG  (1 << 3)
+#define AMDM37X_DISPC_IRQ_ACBIASCOUNTSTATUS_FLAG  (1 << 4)
+#define AMDM37X_DISPC_IRQ_PROGRAMMEDLINENUMBER_FLAG  (1 << 5)
+#define AMDM37X_DISPC_IRQ_GFXFIFOUNDERFLOW_FLAG  (1 << 6)
+#define AMDM37X_DISPC_IRQ_GFXENDWINDOW_FLAG  (1 << 7)
+#define AMDM37X_DISPC_IRQ_PALETTEGAMMALOADING_FLAG  (1 << 8)
+#define AMDM37X_DISPC_IRQ_OPCERROR_FLAG  (1 << 9)
+#define AMDM37X_DISPC_IRQ_VID1FIFOUNDERFLOW_FLAG  (1 << 10)
+#define AMDM37X_DISPC_IRQ_VID1ENDWINDOW_FLAG  (1 << 11)
+#define AMDM37X_DISPC_IRQ_VID2FIFOUNDERFLOW_FLAG  (1 << 12)
+#define AMDM37X_DISPC_IRQ_VID2ENDWINDOW_FLAG  (1 << 13)
+#define AMDM37X_DISPC_IRQ_SYNCLOST_FLAG  (1 << 14)
+#define AMDM37X_DISPC_IRQ_SYNCLOSTDIGITAL_FLAG  (1 << 15)
+#define AMDM37X_DISPC_IRQ_WAKEUP_FLAG  (1 << 16)
+
+	PADD32(8);
+	ioport32_t control;
+#define AMDM37X_DISPC_CONTROL_LCD_ENABLE_FLAG  (1 << 0)
+#define AMDM37X_DISPC_CONTROL_DIGITAL_ENABLE_FLAG  (1 << 1)
+#define AMDM37X_DISPC_CONTROL_MONOCOLOR_FLAG  (1 << 2)
+#define AMDM37X_DISPC_CONTROL_STNTFT_FLAG  (1 << 3)
+#define AMDM37X_DISPC_CONTROL_M8B_FLAG  (1 << 4)
+#define AMDM37X_DISPC_CONTROL_GOLCD_FLAG  (1 << 5)
+#define AMDM37X_DISPC_CONTROL_GODIGITAL_FLAG  (1 << 6)
+#define AMDM37X_DISPC_CONTROL_STDITHERENABLE_FLAG  (1 << 7)
+#define AMDM37X_DISPC_CONTROL_TFTDATALINES_MASK  0x3
+#define AMDM37X_DISPC_CONTROL_TFTDATALINES_SHIFT  8
+#define AMDM37X_DISPC_CONTROL_TFTDATALINES_12B  0
+#define AMDM37X_DISPC_CONTROL_TFTDATALINES_16B  1
+#define AMDM37X_DISPC_CONTROL_TFTDATALINES_18B  2
+#define AMDM37X_DISPC_CONTROL_TFTDATALINES_24B  3
+#define AMDM37X_DISPC_CONTROL_STALLMODE_FLAG  (1 << 11)
+#define AMDM37X_DISPC_CONTROL_OVERLAYOPTIMIZATION_FLAG  (1 << 12)
+#define AMDM37X_DISPC_CONTROL_GPIN0_FLAG  (1 << 13)
+#define AMDM37X_DISPC_CONTROL_GPIN1_FLAG  (1 << 14)
+#define AMDM37X_DISPC_CONTROL_GPOUT0_FLAG  (1 << 15)
+#define AMDM37X_DISPC_CONTROL_GPOUT1_FLAG  (1 << 16)
+#define AMDM37X_DISPC_CONTROL_HT_MASK  0x7
+#define AMDM37X_DISPC_CONTROL_HT_SHIFT  17
+#define AMDM37X_DISPC_CONTROL_TDMENABLE_FLAG  (1 << 20)
+#define AMDM37X_DISPC_CONTROL_TDMPARALLELMODE_MASK  0x3
+#define AMDM37X_DISPC_CONTROL_TDMPARELLELMODE_SHIFT  21
+#define AMDM37X_DISPC_CONTROL_TDMCYCLEFORMAT_MASK  0x3
+#define AMDM37X_DISPC_CONTROL_TDMCYCLEFORMAT_SHIFT  23
+#define AMDM37X_DISPC_CONTROL_TDMUNUSEDBITS_MASK  0x3
+#define AMDM37X_DISPC_CONTROL_TDMUNUSEDBITS_SHIFT  25
+#define AMDM37X_DISPC_CONTROL_PCKFREEENABLE_FLAG  (1 << 27)
+#define AMDM37X_DISPC_CONTROL_LCDENABLESIGNAL_FLAG  (1 << 28)
+#define AMDM37X_DISPC_CONTROL_KCDENABLEPOL_FLAG  (1 << 29)
+#define AMDM37X_DISPC_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK  0x3
+#define AMDM37X_DISPC_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT  30
+
+	ioport32_t config;
+#define AMDM37X_DISPC_CONFIG_PIXELGATED_FLAG  (1 << 0)
+#define AMDM37X_DISPC_CONFIG_LOADMODE_MASK  0x3
+#define AMDM37X_DISPC_CONFIG_LOADMODE_SHIFT  1
+#define AMDM37X_DISPC_CONFIG_LOADMODE_PGDATAEVERYFRAME  0x0
+#define AMDM37X_DISPC_CONFIG_LOADMODE_PGUSER  0x1
+#define AMDM37X_DISPC_CONFIG_LOADMODE_DATAEVERYFRAME  0x2
+#define AMDM37X_DISPC_CONFIG_LOADMODE_PGDFIRSTFRAME  0x3
+#define AMDM37X_DISPC_CONFIG_PALETTEGAMMATABLE_FLAG  (1 << 3)
+#define AMDM37X_DISPC_CONFIG_PIXELDATAGATED_FLAG  (1 << 4)
+#define AMDM37X_DISPC_CONFIG_PIXELCLOCKGATED_FLAG  (1 << 5)
+#define AMDM37X_DISPC_CONFIG_HSYNCGATED_FLAG  (1 << 6)
+#define AMDM37X_DISPC_CONFIG_VSYNCGATED_FLAG  (1 << 7)
+#define AMDM37X_DISPC_CONFIG_ACBIASGATED_FLAG  (1 << 8)
+#define AMDM37X_DISPC_CONFIG_FUNCGATED_FLAG  (1 << 9)
+#define AMDM37X_DISPC_CONFIG_TCKLCDENABLE_FLAG  (1 << 10)
+#define AMDM37X_DISPC_CONFIG_TCKLCDSELECTION_FLAG  (1 << 11)
+#define AMDM37X_DISPC_CONFIG_TCKDIGENABLE_FLAG  (1 << 12)
+#define AMDM37X_DISPC_CONFIG_TCKDIGSELECTION_FLAG  (1 << 13)
+#define AMDM37X_DISPC_CONFIG_FIFOMERGE_FLAG  (1 << 14)
+#define AMDM37X_DISPC_CONFIG_CPR_FLAG  (1 << 15)
+#define AMDM37X_DISPC_CONFIG_FIFOHANDCHECK_FLAG  (1 << 16)
+#define AMDM37X_DISPC_CONFIG_FIFOFILLING_FLAG  (1 << 17)
+#define AMDM37X_DISPC_CONFIG_LCDPALPHABLENDERENABLDE_FLAG  (1 << 18)
+#define AMDM37X_DISPC_CONFIG_TVALPHABLENDERENABLE_FLAG  (1 << 19)
+
+	PADD32(1);
+	ioport32_t default_color[2];
+	ioport32_t trans_color[2];
+#define AMDM37X_DISPC_COLOR_MASK 0xffffff
+
+	const ioport32_t line_status;
+	ioport32_t line_number;
+#define AMDM37X_DISPC_LINE_NUMBER_MASK 0x3ff
+
+	ioport32_t timing_h;
+#define AMDM37X_DISPC_TIMING_H_HSW_MASK 0xff
+#define AMDM37X_DISPC_TIMING_H_HSW_SHIFT 0
+#define AMDM37X_DISPC_TIMING_H_HFP_MASK 0xfff
+#define AMDM37X_DISPC_TIMING_H_HFP_SHIFT 8
+#define AMDM37X_DISPC_TIMING_H_HBP_MASK 0xfff
+#define AMDM37X_DISPC_TIMING_H_HBP_SHIFT 20
+
+	ioport32_t timing_v;
+#define AMDM37X_DISPC_TIMING_V_VSW_MASK 0xff
+#define AMDM37X_DISPC_TIMING_V_VSW_SHIFT 0
+#define AMDM37X_DISPC_TIMING_V_VFP_MASK 0xfff
+#define AMDM37X_DISPC_TIMING_V_VFP_SHIFT 8
+#define AMDM37X_DISPC_TIMING_V_VBP_MASK 0xfff
+#define AMDM37X_DISPC_TIMING_V_VBP_SHIFT 20
+
+	ioport32_t pol_freq;
+#define AMDM37X_DISPC_POL_FREQ_ACB_MASK  0xff
+#define AMDM37X_DISPC_POL_FREQ_ACB_SHIFT 0
+#define AMDM37X_DISPC_POL_FREQ_ACBI_MASK  0xf
+#define AMDM37X_DISPC_POL_FREQ_ACBI_SHIFT 8
+#define AMDM37X_DISPC_POL_FREQ_IVS_FLAG  (1 << 12)
+#define AMDM37X_DISPC_POL_FREQ_IHS_FLAG  (1 << 13)
+#define AMDM37X_DISPC_POL_FREQ_IPC_FLAG  (1 << 14)
+#define AMDM37X_DISPC_POL_FREQ_IEO_FLAG  (1 << 15)
+#define AMDM37X_DISPC_POL_FREQ_RF_FLAG  (1 << 16)
+#define AMDM37X_DISPC_POL_FREQ_ONOFF_FLAG  (1 << 17)
+
+	ioport32_t divisor;
+#define AMDM37X_DISPC_DIVISOR_PCD_MASK  0xff
+#define AMDM37X_DISPC_DIVISOR_PCD_SHIFT  0
+#define AMDM37X_DISPC_DIVISOR_LCD_MASK  0xff
+#define AMDM37X_DISPC_DIVISOR_LCD_SHIFT  16
+
+	ioport32_t global_alpha;
+#define AMDM37X_DISPC_GLOBAL_ALPHA_GFXGLOBALALPHA_MASK  0xff
+#define AMDM37X_DISPC_GLOBAL_ALPHA_GFXGLOBALALPHA_SHIFT  0
+#define AMDM37X_DISPC_GLOBAL_ALPHA_VID2GLOBALALPHA_MASK  0xff
+#define AMDM37X_DISPC_GLOBAL_ALPHA_VID2GLOBALALPHA_SHIFT  16
+
+	ioport32_t size_dig;
+	ioport32_t size_lcd;
+
+	struct {
+		ioport32_t ba[2];
+		ioport32_t position;
+#define AMDM37X_DISPC_GFX_POSITION_GFXPOSX_MASK  0x7ff
+#define AMDM37X_DISPC_GFX_POSITION_GFXPOSX_SHIFT  0
+#define AMDM37X_DISPC_GFX_POSITION_GFXPOSY_MASK  0x7ff
+#define AMDM37X_DISPC_GFX_POSITION_GFXPOSY_SHIFT  16
+
+		ioport32_t size;
+#define AMDM37X_DISPC_SIZE_WIDTH_MASK  0x7ff
+#define AMDM37X_DISPC_SIZE_WIDTH_SHIFT  0
+#define AMDM37X_DISPC_SIZE_HEIGHT_MASK  0x7ff
+#define AMDM37X_DISPC_SIZE_HEIGHT_SHIFT  16
+
+		PADD32(4);
+		ioport32_t attributes;
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_ENABLE_FLAG  (1 << 0)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_MASK  0xf
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_SHIFT  1
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_ARGB16  0x5
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGB16  0x6
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGB24_32  0x8
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGB24  0x9
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_ARGB  0xc
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGBA  0xd
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGBX  0xe
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_REPLICATIONENABLE_FLAG  (1 << 5)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXBURSTSIZE_MASK  0x3
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXBURSTSIZE_SHIFT  6
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXCHANNELOUT_FLAG  (1 << 8)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXNIBBLEMODE_FLAG  (1 << 9)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXENDIANNES_FLAG  (1 << 10)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXFIFOPRELOAD_FLAG  (1 << 11)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXROTATION_MASK  0x3
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXROTATION_SHIFT  12
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXARBITRATION_FLAG  (1 << 14)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_GFXSELFREFRESH_FLAG  (1 << 15)
+#define AMDM37X_DISPC_GFX_ATTRIBUTES_PREMULTIALPHA_FLAG  (1 << 28)
+
+
+		ioport32_t fifo_threshold;
+		const ioport32_t fifo_size_status;
+		ioport32_t row_inc;
+		ioport32_t pixel_inc;
+		ioport32_t window_skip;
+		ioport32_t table_ba;
+	} gfx;
+
+	struct {
+		ioport32_t ba[2];
+		ioport32_t position;
+		ioport32_t size;
+		ioport32_t attributes;
+		ioport32_t fifo_threshold;
+		const ioport32_t fifo_size_status;
+		ioport32_t row_inc;
+		ioport32_t pixel_inc;
+		ioport32_t fir;
+		ioport32_t picture_size;
+		ioport32_t accui[2];
+		struct {
+			ioport32_t hi;
+			ioport32_t hvi;
+		} fir_coef[8];
+		ioport32_t conv_coef[5];
+		PADD32(2);
+	} vid[2];
+	/* 0x1d4 */
+	ioport32_t data_cycle[3];
+	/* 0x1e0 */
+	ioport32_t vid_fir_coef_v[8];
+	/* 0x200 */
+	PADD32(8);
+	/* 0x220 */
+	ioport32_t cpr_coef_r;
+	ioport32_t cpr_coef_g;
+	ioport32_t cpr_coef_b;
+	ioport32_t gfx_preload;
+
+	/* 0x230 */
+	ioport32_t vid_preload[2];
+
+} __attribute__((packed)) amdm37x_dispc_regs_t;
+
+
+static inline void amdm37x_dispc_setup_fb(amdm37x_dispc_regs_t *regs,
+    unsigned x, unsigned y, unsigned bpp, uintptr_t pa)
+{
+	ASSERT(regs);
+	/* Init sequence for dispc is in chapter 7.6.5.1.4 p. 1810,
+	 * no idea what parts of that work. */
+
+	/* Disable all interrupts */
+	regs->irqenable = 0;
+
+	/* Pixel format specifics*/
+	uint32_t attrib_pixel_format = 0;
+	uint32_t control_data_lanes = 0;
+	switch (bpp)
+	{
+	case 32:
+		attrib_pixel_format = AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGBX;
+		control_data_lanes = AMDM37X_DISPC_CONTROL_TFTDATALINES_24B;
+		break;
+	case 24:
+		attrib_pixel_format = AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGB24;
+		control_data_lanes = AMDM37X_DISPC_CONTROL_TFTDATALINES_24B;
+		break;
+	case 16:
+		attrib_pixel_format = AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_RGB16;
+		control_data_lanes = AMDM37X_DISPC_CONTROL_TFTDATALINES_16B;
+		break;
+	default:
+		ASSERT(false);
+	}
+
+	/* Prepare sizes */
+	const uint32_t size_reg =
+	    (((x - 1) & AMDM37X_DISPC_SIZE_WIDTH_MASK)
+	        << AMDM37X_DISPC_SIZE_WIDTH_SHIFT) |
+	    (((y - 1) & AMDM37X_DISPC_SIZE_HEIGHT_MASK)
+	        << AMDM37X_DISPC_SIZE_HEIGHT_SHIFT);
+
+	/* modes taken from u-boot, for 1024x768 */
+	// TODO replace magic values with actual correct values
+//	regs->timing_h = 0x1a4024c9;
+//	regs->timing_v = 0x02c00509;
+//	regs->pol_freq = 0x00007028;
+//	regs->divisor  = 0x00010001;
+
+	/* setup output */
+	regs->size_lcd = size_reg;
+	regs->size_dig = size_reg;
+
+	/* Nice blue default color */
+	regs->default_color[0] = 0x0000ff;
+	regs->default_color[1] = 0x0000ff;
+
+	/* Setup control register */
+	uint32_t control = 0 |
+		AMDM37X_DISPC_CONTROL_PCKFREEENABLE_FLAG |
+		(control_data_lanes << AMDM37X_DISPC_CONTROL_TFTDATALINES_SHIFT) |
+		AMDM37X_DISPC_CONTROL_GPOUT0_FLAG |
+		AMDM37X_DISPC_CONTROL_GPOUT1_FLAG;
+	regs->control = control;
+
+	/* No gamma stuff only data */
+	uint32_t config = (AMDM37X_DISPC_CONFIG_LOADMODE_DATAEVERYFRAME
+	            << AMDM37X_DISPC_CONFIG_LOADMODE_SHIFT);
+	regs->config = config;
+
+
+	/* Set framebuffer base address */
+	regs->gfx.ba[0] = pa;
+	regs->gfx.ba[1] = pa;
+	regs->gfx.position = 0;
+
+	/* Setup fb size */
+	regs->gfx.size = size_reg;
+
+	/* Set pixel format */
+	uint32_t attribs = 0 |
+	    (attrib_pixel_format << AMDM37X_DISPC_GFX_ATTRIBUTES_FORMAT_SHIFT);
+	regs->gfx.attributes = attribs;
+
+	/* 0x03ff03c0 is the default */
+	regs->gfx.fifo_threshold = 0x03ff03c0;
+	/* This value should be stride - width, 1 means next pixel i.e.
+	 * stride == width */
+	regs->gfx.row_inc = 1;
+	/* number of bytes to next pixel in BPP multiples */
+	regs->gfx.pixel_inc = 1;
+	/* only used if video is played over fb */
+	regs->gfx.window_skip = 0;
+	/* Gamma and palette table */
+	regs->gfx.table_ba = 0;
+
+	/* enable frame buffer graphics */
+	regs->gfx.attributes |= AMDM37X_DISPC_GFX_ATTRIBUTES_ENABLE_FLAG;
+	/* Update register values */
+	regs->control |= AMDM37X_DISPC_CONTROL_GOLCD_FLAG;
+	regs->control |= AMDM37X_DISPC_CONTROL_GODIGITAL_FLAG;
+	/* Enable output */
+	regs->control |= AMDM37X_DISPC_CONTROL_LCD_ENABLE_FLAG;
+	regs->control |= AMDM37X_DISPC_CONTROL_DIGITAL_ENABLE_FLAG;
+}
+
+
+#endif
+/**
+ * @}
+ */
Index: kernel/generic/include/mm/tlb.h
===================================================================
--- kernel/generic/include/mm/tlb.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ kernel/generic/include/mm/tlb.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -73,6 +73,6 @@
 extern void tlb_shootdown_ipi_recv(void);
 #else
-#define tlb_shootdown_start(w, x, y, z)	(0)
-#define tlb_shootdown_finalize(i)	((i) = (i));
+#define tlb_shootdown_start(w, x, y, z)	interrupts_disable()	
+#define tlb_shootdown_finalize(i)	(interrupts_restore(i));
 #define tlb_shootdown_ipi_recv()
 #endif /* CONFIG_SMP */
Index: release/Makefile
===================================================================
--- release/Makefile	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ release/Makefile	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -33,6 +33,5 @@
 
 PROFILES = amd64 arm32/integratorcp arm32/gta02 arm32/beagleboardxm ia32 \
-    ia64/i460GX ia64/ski mips32/GXemul mips32/msim ppc32 \
-    sparc64/ultra
+    ia64/i460GX ia64/ski mips32/msim ppc32 sparc64/ultra
 
 BZR = bzr
Index: tools/autotool.py
===================================================================
--- tools/autotool.py	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ tools/autotool.py	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -676,9 +676,9 @@
 				common['CC_ARGS'].append("-mabi=32")
 				
-				if ((config['MACHINE'] == "lgxemul") or (config['MACHINE'] == "msim")):
+				if ((config['MACHINE'] == "msim") or (config['MACHINE'] == "lmalta")):
 					target = config['PLATFORM']
 					gnu_target = "mipsel-linux-gnu"
 				
-				if (config['MACHINE'] == "bgxemul"):
+				if ((config['MACHINE'] == "bmalta")):
 					target = "mips32eb"
 					gnu_target = "mips-linux-gnu"
Index: uspace/Makefile
===================================================================
--- uspace/Makefile	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ uspace/Makefile	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -93,5 +93,4 @@
 	srv/bd/sata_bd \
 	srv/bd/file_bd \
-	srv/bd/gxe_bd \
 	srv/bd/rd \
 	srv/bd/part/guid_part \
Index: uspace/app/init/init.c
===================================================================
--- uspace/app/init/init.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ uspace/app/init/init.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -369,5 +369,4 @@
 #ifdef CONFIG_START_BD
 	srv_start("/srv/ata_bd");
-	srv_start("/srv/gxe_bd");
 #endif
 	
Index: pace/srv/bd/gxe_bd/Makefile
===================================================================
--- uspace/srv/bd/gxe_bd/Makefile	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ 	(revision )
@@ -1,36 +1,0 @@
-#
-# Copyright (c) 2005 Martin Decky
-# Copyright (c) 2007 Jakub Jermar
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# - Redistributions of source code must retain the above copyright
-#   notice, this list of conditions and the following disclaimer.
-# - Redistributions in binary form must reproduce the above copyright
-#   notice, this list of conditions and the following disclaimer in the
-#   documentation and/or other materials provided with the distribution.
-# - The name of the author may not be used to endorse or promote products
-#   derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-
-USPACE_PREFIX = ../../..
-BINARY = gxe_bd
-
-SOURCES = \
-	gxe_bd.c
-
-include $(USPACE_PREFIX)/Makefile.common
Index: pace/srv/bd/gxe_bd/gxe_bd.c
===================================================================
--- uspace/srv/bd/gxe_bd/gxe_bd.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ 	(revision )
@@ -1,340 +1,0 @@
-/*
- * Copyright (c) 2009 Jiri Svoboda
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup bd
- * @{
- */
-
-/**
- * @file
- * @brief GXemul disk driver
- */
-
-#include <stdio.h>
-#include <ddi.h>
-#include <async.h>
-#include <as.h>
-#include <bd_srv.h>
-#include <fibril_synch.h>
-#include <loc.h>
-#include <sys/types.h>
-#include <errno.h>
-#include <macros.h>
-#include <task.h>
-
-#define NAME       "gxe_bd"
-#define NAMESPACE  "bd"
-
-enum {
-	CTL_READ_START	= 0,
-	CTL_WRITE_START = 1,
-};
-
-enum {
-	STATUS_FAILURE	= 0
-};
-
-enum {
-	MAX_DISKS	= 2
-};
-
-/** GXE disk hardware registers */
-typedef struct {
-	uint32_t offset_lo;
-	uint32_t pad0;
-	uint32_t offset_hi;
-	uint32_t pad1;
-
-	uint32_t disk_id;
-	uint32_t pad2[3];
-
-	uint32_t control;
-	uint32_t pad3[3];
-
-	uint32_t status;
-
-	uint32_t pad4[3];
-	uint8_t pad5[0x3fc0];
-
-	uint8_t buffer[512];
-} gxe_bd_hw_t;
-
-/** GXE block device soft state */
-typedef struct {
-	/** Block device service structure */
-	bd_srvs_t bds;
-	int disk_id;
-} gxe_bd_t;
-
-static const size_t block_size = 512;
-
-static uintptr_t dev_physical = 0x13000000;
-static gxe_bd_hw_t *dev;
-
-static service_id_t service_id[MAX_DISKS];
-
-static fibril_mutex_t dev_lock[MAX_DISKS];
-
-static gxe_bd_t gxe_bd[MAX_DISKS];
-
-static int gxe_bd_init(void);
-static void gxe_bd_connection(ipc_callid_t iid, ipc_call_t *icall, void *);
-static int gxe_bd_read_block(int disk_id, uint64_t ba, void *buf);
-static int gxe_bd_write_block(int disk_id, uint64_t ba, const void *buf);
-
-static int gxe_bd_open(bd_srvs_t *, bd_srv_t *);
-static int gxe_bd_close(bd_srv_t *);
-static int gxe_bd_read_blocks(bd_srv_t *, aoff64_t, size_t, void *, size_t);
-static int gxe_bd_write_blocks(bd_srv_t *, aoff64_t, size_t, const void *, size_t);
-static int gxe_bd_get_block_size(bd_srv_t *, size_t *);
-static int gxe_bd_get_num_blocks(bd_srv_t *, aoff64_t *);
-
-static bd_ops_t gxe_bd_ops = {
-	.open = gxe_bd_open,
-	.close = gxe_bd_close,
-	.read_blocks = gxe_bd_read_blocks,
-	.write_blocks = gxe_bd_write_blocks,
-	.get_block_size = gxe_bd_get_block_size,
-	.get_num_blocks = gxe_bd_get_num_blocks
-};
-
-static gxe_bd_t *bd_srv_gxe(bd_srv_t *bd)
-{
-	return (gxe_bd_t *) bd->srvs->sarg;
-}
-
-int main(int argc, char **argv)
-{
-	printf(NAME ": GXemul disk driver\n");
-
-	if (gxe_bd_init() != EOK)
-		return -1;
-
-	printf(NAME ": Accepting connections\n");
-	task_retval(0);
-	async_manager();
-
-	/* Not reached */
-	return 0;
-}
-
-static int gxe_bd_init(void)
-{
-	async_set_client_connection(gxe_bd_connection);
-	int rc = loc_server_register(NAME);
-	if (rc != EOK) {
-		printf("%s: Unable to register driver.\n", NAME);
-		return rc;
-	}
-	
-	void *vaddr;
-	rc = pio_enable((void *) dev_physical, sizeof(gxe_bd_hw_t), &vaddr);
-	if (rc != EOK) {
-		printf("%s: Could not initialize device I/O space.\n", NAME);
-		return rc;
-	}
-	
-	dev = vaddr;
-	
-	for (unsigned int i = 0; i < MAX_DISKS; i++) {
-		char name[16];
-		
-		bd_srvs_init(&gxe_bd[i].bds);
-		gxe_bd[i].bds.ops = &gxe_bd_ops;
-		gxe_bd[i].bds.sarg = (void *)&gxe_bd[i];
-		
-		snprintf(name, 16, "%s/disk%u", NAMESPACE, i);
-		rc = loc_service_register(name, &service_id[i]);
-		if (rc != EOK) {
-			printf("%s: Unable to register device %s.\n", NAME,
-			    name);
-			return rc;
-		}
-		
-		fibril_mutex_initialize(&dev_lock[i]);
-	}
-	
-	return EOK;
-}
-
-static void gxe_bd_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg)
-{
-	service_id_t dsid;
-	int disk_id, i;
-
-	/* Get the device handle. */
-	dsid = IPC_GET_ARG1(*icall);
-
-	/* Determine which disk device is the client connecting to. */
-	disk_id = -1;
-	for (i = 0; i < MAX_DISKS; i++)
-		if (service_id[i] == dsid)
-			disk_id = i;
-
-	if (disk_id < 0) {
-		async_answer_0(iid, EINVAL);
-		return;
-	}
-
-	bd_conn(iid, icall, &gxe_bd[disk_id].bds);
-}
-
-/** Open device. */
-static int gxe_bd_open(bd_srvs_t *bds, bd_srv_t *bd)
-{
-	return EOK;
-}
-
-/** Close device. */
-static int gxe_bd_close(bd_srv_t *bd)
-{
-	return EOK;
-}
-
-/** Read multiple blocks from the device. */
-static int gxe_bd_read_blocks(bd_srv_t *bd, aoff64_t ba, size_t cnt,
-    void *buf, size_t size)
-{
-	int disk_id = bd_srv_gxe(bd)->disk_id;
-	int rc;
-
-	if (size < cnt * block_size)
-		return EINVAL;
-
-	while (cnt > 0) {
-		rc = gxe_bd_read_block(disk_id, ba, buf);
-		if (rc != EOK)
-			return rc;
-
-		++ba;
-		--cnt;
-		buf += block_size;
-	}
-
-	return EOK;
-}
-
-/** Write multiple blocks to the device. */
-static int gxe_bd_write_blocks(bd_srv_t *bd, aoff64_t ba, size_t cnt,
-    const void *buf, size_t size)
-{
-	int disk_id = bd_srv_gxe(bd)->disk_id;
-	int rc;
-
-	if (size < cnt * block_size)
-		return EINVAL;
-
-	while (cnt > 0) {
-		rc = gxe_bd_write_block(disk_id, ba, buf);
-		if (rc != EOK)
-			return rc;
-
-		++ba;
-		--cnt;
-		buf += block_size;
-	}
-
-	return EOK;
-}
-
-/** Get device block size. */
-static int gxe_bd_get_block_size(bd_srv_t *bd, size_t *rsize)
-{
-	*rsize = block_size;
-	return EOK;
-}
-
-/** Get number of blocks on device. */
-static int gxe_bd_get_num_blocks(bd_srv_t *bd, aoff64_t *rnb)
-{
-	return ENOTSUP;
-}
-
-/** Read a block from the device. */
-static int gxe_bd_read_block(int disk_id, uint64_t ba, void *buf)
-{
-	uint32_t status;
-	uint64_t byte_addr;
-	size_t i;
-	uint32_t w;
-
-	byte_addr = ba * block_size;
-
-	fibril_mutex_lock(&dev_lock[disk_id]);
-	pio_write_32(&dev->offset_lo, (uint32_t) byte_addr);
-	pio_write_32(&dev->offset_hi, byte_addr >> 32);
-	pio_write_32(&dev->disk_id, disk_id);
-	pio_write_32(&dev->control, CTL_READ_START);
-
-	status = pio_read_32(&dev->status);
-	if (status == STATUS_FAILURE) {
-		fibril_mutex_unlock(&dev_lock[disk_id]);
-		return EIO;
-	}
-
-	for (i = 0; i < block_size; i++) {
-		((uint8_t *) buf)[i] = w = pio_read_8(&dev->buffer[i]);
-	}
-
-	fibril_mutex_unlock(&dev_lock[disk_id]);
-	return EOK;
-}
-
-/** Write a block to the device. */
-static int gxe_bd_write_block(int disk_id, uint64_t ba, const void *buf)
-{
-	uint32_t status;
-	uint64_t byte_addr;
-	size_t i;
-
-	byte_addr = ba * block_size;
-
-	fibril_mutex_lock(&dev_lock[disk_id]);
-
-	for (i = 0; i < block_size; i++) {
-		pio_write_8(&dev->buffer[i], ((const uint8_t *) buf)[i]);
-	}
-
-	pio_write_32(&dev->offset_lo, (uint32_t) byte_addr);
-	pio_write_32(&dev->offset_hi, byte_addr >> 32);
-	pio_write_32(&dev->disk_id, disk_id);
-	pio_write_32(&dev->control, CTL_WRITE_START);
-
-	status = pio_read_32(&dev->status);
-	if (status == STATUS_FAILURE) {
-		fibril_mutex_unlock(&dev_lock[disk_id]);
-		return EIO;
-	}
-
-	fibril_mutex_unlock(&dev_lock[disk_id]);
-	return EOK;
-}
-
-/**
- * @}
- */
Index: uspace/srv/hid/input/Makefile
===================================================================
--- uspace/srv/hid/input/Makefile	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ uspace/srv/hid/input/Makefile	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -39,5 +39,4 @@
 	port/adb_mouse.c \
 	port/chardev.c \
-	port/gxemul.c \
 	port/msim.c \
 	port/niagara.c \
@@ -48,5 +47,4 @@
 	proto/mousedev.c \
 	ctl/apple.c \
-	ctl/gxe_fb.c \
 	ctl/kbdev.c \
 	ctl/pc.c \
Index: pace/srv/hid/input/ctl/gxe_fb.c
===================================================================
--- uspace/srv/hid/input/ctl/gxe_fb.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ 	(revision )
@@ -1,248 +1,0 @@
-/*
- * Copyright (c) 2011 Jiri Svoboda
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup kbd_ctl
- * @ingroup input
- * @{
- */
-/**
- * @file
- * @brief GXEmul framebuffer-mode keyboard controller driver.
- */
-
-#include <io/console.h>
-#include <io/keycode.h>
-#include "../stroke.h"
-#include "../gsp.h"
-#include "../kbd.h"
-#include "../kbd_port.h"
-#include "../kbd_ctl.h"
-
-static void gxe_fb_ctl_parse(sysarg_t);
-static int gxe_fb_ctl_init(kbd_dev_t *);
-static void gxe_fb_ctl_set_ind(kbd_dev_t *, unsigned int);
-
-kbd_ctl_ops_t gxe_fb_ctl = {
-	.parse = gxe_fb_ctl_parse,
-	.init = gxe_fb_ctl_init,
-	.set_ind = gxe_fb_ctl_set_ind
-};
-
-static kbd_dev_t *kbd_dev;
-
-/** Scancode parser */
-static gsp_t sp;
-
-/** Current parser state */
-static int ds;
-
-#include <stdio.h>
-
-static int seq_defs[] = {
-	/* Not shifted */
-
-	0,	KC_BACKTICK,	0x60, GSP_END,
-
-	0,	KC_1,		0x31, GSP_END,
-	0,	KC_2,		0x32, GSP_END,
-	0,	KC_3,		0x33, GSP_END,
-	0,	KC_4,		0x34, GSP_END,
-	0,	KC_5,		0x35, GSP_END,
-	0,	KC_6,		0x36, GSP_END,
-	0,	KC_7,		0x37, GSP_END,
-	0,	KC_8,		0x38, GSP_END,
-	0,	KC_9,		0x39, GSP_END,
-	0,	KC_0,		0x30, GSP_END,
-
-	0,	KC_MINUS,	0x2d, GSP_END,
-	0,	KC_EQUALS,	0x3d, GSP_END,
-	0,	KC_BACKSPACE,	0x08, GSP_END,
-
-	0,	KC_TAB,		0x09, GSP_END,
-
-	0,	KC_Q,		0x71, GSP_END,
-	0,	KC_W,		0x77, GSP_END,
-	0,	KC_E,		0x65, GSP_END,
-	0,	KC_R,		0x72, GSP_END,
-	0,	KC_T,		0x74, GSP_END,
-	0,	KC_Y,		0x79, GSP_END,
-	0,	KC_U,		0x75, GSP_END,
-	0,	KC_I,		0x69, GSP_END,
-	0,	KC_O,		0x6f, GSP_END,
-	0,	KC_P,		0x70, GSP_END,
-
-	0,	KC_LBRACKET,	0x5b, GSP_END,
-	0,	KC_RBRACKET,	0x5d, GSP_END,
-
-	0,	KC_A,		0x61, GSP_END,
-	0,	KC_S,		0x73, GSP_END,
-	0,	KC_D,		0x64, GSP_END,
-	0,	KC_F,		0x66, GSP_END,
-	0,	KC_G,		0x67, GSP_END,
-	0,	KC_H,		0x68, GSP_END,
-	0,	KC_J,		0x6a, GSP_END,
-	0,	KC_K,		0x6b, GSP_END,
-	0,	KC_L,		0x6c, GSP_END,
-
-	0,	KC_SEMICOLON,	0x3b, GSP_END,
-	0,	KC_QUOTE,	0x27, GSP_END,
-	0,	KC_BACKSLASH,	0x5c, GSP_END,
-
-	0,	KC_Z,		0x7a, GSP_END,
-	0,	KC_X,		0x78, GSP_END,
-	0,	KC_C,		0x63, GSP_END,
-	0,	KC_V,		0x76, GSP_END,
-	0,	KC_B,		0x62, GSP_END,
-	0,	KC_N,		0x6e, GSP_END,
-	0,	KC_M,		0x6d, GSP_END,
-
-	0,	KC_COMMA,	0x2c, GSP_END,
-	0,	KC_PERIOD,	0x2e, GSP_END,
-	0,	KC_SLASH,	0x2f, GSP_END,
-
-	/* Shifted */
-
-	KM_SHIFT,	KC_BACKTICK,	0x7e, GSP_END,
-
-	KM_SHIFT,	KC_1,		0x21, GSP_END,
-	KM_SHIFT,	KC_2,		0x40, GSP_END,
-	KM_SHIFT,	KC_3,		0x23, GSP_END,
-	KM_SHIFT,	KC_4,		0x24, GSP_END,
-	KM_SHIFT,	KC_5,		0x25, GSP_END,
-	KM_SHIFT,	KC_6,		0x5e, GSP_END,
-	KM_SHIFT,	KC_7,		0x26, GSP_END,
-	KM_SHIFT,	KC_8,		0x2a, GSP_END,
-	KM_SHIFT,	KC_9,		0x28, GSP_END,
-	KM_SHIFT,	KC_0,		0x29, GSP_END,
-
-	KM_SHIFT,	KC_MINUS,	0x5f, GSP_END,
-	KM_SHIFT,	KC_EQUALS,	0x2b, GSP_END,
-
-	KM_SHIFT,	KC_Q,		0x51, GSP_END,
-	KM_SHIFT,	KC_W,		0x57, GSP_END,
-	KM_SHIFT,	KC_E,		0x45, GSP_END,
-	KM_SHIFT,	KC_R,		0x52, GSP_END,
-	KM_SHIFT,	KC_T,		0x54, GSP_END,
-	KM_SHIFT,	KC_Y,		0x59, GSP_END,
-	KM_SHIFT,	KC_U,		0x55, GSP_END,
-	KM_SHIFT,	KC_I,		0x49, GSP_END,
-	KM_SHIFT,	KC_O,		0x4f, GSP_END,
-	KM_SHIFT,	KC_P,		0x50, GSP_END,
-
-	KM_SHIFT,	KC_LBRACKET,	0x7b, GSP_END,
-	KM_SHIFT,	KC_RBRACKET,	0x7d, GSP_END,
-
-	KM_SHIFT,	KC_A,		0x41, GSP_END,
-	KM_SHIFT,	KC_S,		0x53, GSP_END,
-	KM_SHIFT,	KC_D,		0x44, GSP_END,
-	KM_SHIFT,	KC_F,		0x46, GSP_END,
-	KM_SHIFT,	KC_G,		0x47, GSP_END,
-	KM_SHIFT,	KC_H,		0x48, GSP_END,
-	KM_SHIFT,	KC_J,		0x4a, GSP_END,
-	KM_SHIFT,	KC_K,		0x4b, GSP_END,
-	KM_SHIFT,	KC_L,		0x4c, GSP_END,
-
-	KM_SHIFT,	KC_SEMICOLON,	0x3a, GSP_END,
-	KM_SHIFT,	KC_QUOTE,	0x22, GSP_END,
-	KM_SHIFT,	KC_BACKSLASH,	0x7c, GSP_END,
-
-	KM_SHIFT,	KC_Z,		0x5a, GSP_END,
-	KM_SHIFT,	KC_X,		0x58, GSP_END,
-	KM_SHIFT,	KC_C,		0x43, GSP_END,
-	KM_SHIFT,	KC_V,		0x56, GSP_END,
-	KM_SHIFT,	KC_B,		0x42, GSP_END,
-	KM_SHIFT,	KC_N,		0x4e, GSP_END,
-	KM_SHIFT,	KC_M,		0x4d, GSP_END,
-
-	KM_SHIFT,	KC_COMMA,	0x3c, GSP_END,
-	KM_SHIFT,	KC_PERIOD,	0x3e, GSP_END,
-	KM_SHIFT,	KC_SLASH,	0x3f, GSP_END,
-
-	/* ... */
-
-	0,	KC_SPACE,	0x20, GSP_END,
-	0,	KC_ENTER,	0x0a, GSP_END,
-	0,	KC_ENTER,	0x0d, GSP_END,
-
-	0,	KC_ESCAPE,	0x1b, 0x1b, GSP_END,
-
-	0,	KC_F1,		0x1b, 0x5b, 0x4f, 0x50, GSP_END,
-	0,	KC_F2,		0x1b, 0x5b, 0x4f, 0x51, GSP_END,
-	0,	KC_F3,		0x1b, 0x5b, 0x4f, 0x52, GSP_END,
-	0,	KC_F4,		0x1b, 0x5b, 0x4f, 0x53, GSP_END,
-	0,	KC_F5,		0x1b, 0x5b, 0x31, 0x35, GSP_END,
-	0,	KC_F6,		0x1b, 0x5b, 0x31, 0x37, GSP_END,
-	0,	KC_F7,		0x1b, 0x5b, 0x31, 0x38, GSP_END,
-	0,	KC_F8,		0x1b, 0x5b, 0x31, 0x39, GSP_END,
-	0,	KC_F9,		0x1b, 0x5b, 0x32, 0x38, GSP_END,
-	0,	KC_F10,		0x1b, 0x5b, 0x32, 0x39, GSP_END,
-	0,	KC_F11,		0x1b, 0x5b, 0x32, 0x33, GSP_END,
-	0,	KC_F12,		0x1b, 0x5b, 0x32, 0x34, GSP_END,
-
-	0,	KC_INSERT,	0x1b, 0x5b, 0x32, 0x7e, GSP_END,
-	0,	KC_HOME,	0x1b, 0x5b, 0x48, GSP_END,
-	0,	KC_PAGE_UP,	0x1b, 0x5b, 0x35, 0x7e, GSP_END,
-	0,	KC_DELETE,	0x1b, 0x5b, 0x33, 0x7e, GSP_END,
-	0,	KC_END,		0x1b, 0x5b, 0x46, GSP_END,
-	0,	KC_PAGE_DOWN,	0x1b, 0x5b, 0x36, 0x7e, GSP_END,
-
-	0,	KC_UP,		0x1b, 0x5b, 0x41, GSP_END,
-	0,	KC_LEFT,	0x1b, 0x5b, 0x44, GSP_END,
-	0,	KC_DOWN,	0x1b, 0x5b, 0x42, GSP_END,
-	0,	KC_RIGHT,	0x1b, 0x5b, 0x43, GSP_END,
-
-	0,	0
-};
-
-static int gxe_fb_ctl_init(kbd_dev_t *kdev)
-{
-	kbd_dev = kdev;
-	ds = 0;
-
-	gsp_init(&sp);
-	return gsp_insert_defs(&sp, seq_defs);
-}
-
-static void gxe_fb_ctl_parse(sysarg_t scancode)
-{
-	unsigned mods, key;
-
-	ds = gsp_step(&sp, ds, scancode, &mods, &key);
-	if (key != 0) {
-		stroke_sim(kbd_dev, mods, key);
-	}
-}
-
-static void gxe_fb_ctl_set_ind(kbd_dev_t *kdev, unsigned mods)
-{
-	(void) mods;
-}
-
-/**
- * @}
- */ 
Index: uspace/srv/hid/input/input.c
===================================================================
--- uspace/srv/hid/input/input.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ uspace/srv/hid/input/input.c	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -440,10 +440,4 @@
 	kbd_add_dev(&msim_port, &stty_ctl);
 #endif
-#if (defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)) && defined(CONFIG_FB)
-	kbd_add_dev(&gxemul_port, &gxe_fb_ctl);
-#endif
-#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) && !defined(CONFIG_FB)
-	kbd_add_dev(&gxemul_port, &stty_ctl);
-#endif
 #if defined(UARCH_ppc32)
 	kbd_add_dev(&adb_port, &apple_ctl);
Index: uspace/srv/hid/input/kbd_ctl.h
===================================================================
--- uspace/srv/hid/input/kbd_ctl.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ uspace/srv/hid/input/kbd_ctl.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -49,5 +49,4 @@
 
 extern kbd_ctl_ops_t apple_ctl;
-extern kbd_ctl_ops_t gxe_fb_ctl;
 extern kbd_ctl_ops_t kbdev_ctl;
 extern kbd_ctl_ops_t pc_ctl;
Index: uspace/srv/hid/input/kbd_port.h
===================================================================
--- uspace/srv/hid/input/kbd_port.h	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ uspace/srv/hid/input/kbd_port.h	(revision 2b95d13f98bfcaac3a7fb025f44c611b5d228c08)
@@ -51,5 +51,4 @@
 extern kbd_port_ops_t adb_port;
 extern kbd_port_ops_t chardev_port;
-extern kbd_port_ops_t gxemul_port;
 extern kbd_port_ops_t msim_port;
 extern kbd_port_ops_t niagara_port;
Index: pace/srv/hid/input/port/gxemul.c
===================================================================
--- uspace/srv/hid/input/port/gxemul.c	(revision eceff5f61ce871257409875152a1d0af843c1455)
+++ 	(revision )
@@ -1,131 +1,0 @@
-/*
- * Copyright (c) 2007 Michal Kebrt
- * Copyright (c) 2011 Jiri Svoboda
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/** @addtogroup kbd_port
- * @{
- * @ingroup  kbd
- */
-/** @file
- * @brief GXEmul keyboard port driver.
- */
-
-#include <async.h>
-#include <sysinfo.h>
-#include <ddi.h>
-#include <errno.h>
-#include "../kbd_port.h"
-#include "../kbd.h"
-
-static int gxemul_port_init(kbd_dev_t *);
-static void gxemul_port_yield(void);
-static void gxemul_port_reclaim(void);
-static void gxemul_port_write(uint8_t data);
-
-kbd_port_ops_t gxemul_port = {
-	.init = gxemul_port_init,
-	.yield = gxemul_port_yield,
-	.reclaim = gxemul_port_reclaim,
-	.write = gxemul_port_write
-};
-
-static kbd_dev_t *kbd_dev;
-
-static irq_pio_range_t gxemul_ranges[] = {
-	{
-		.base = 0,
-		.size = 1
-	}
-};
-
-static irq_cmd_t gxemul_cmds[] = {
-	{ 
-		.cmd = CMD_PIO_READ_8, 
-		.addr = (void *) 0, 	/* will be patched in run-time */
-		.dstarg = 2,
-	},
-	{
-		.cmd = CMD_ACCEPT
-	}
-};
-
-static irq_code_t gxemul_kbd = {
-	sizeof(gxemul_ranges) / sizeof(irq_pio_range_t),
-	gxemul_ranges,
-	sizeof(gxemul_cmds) / sizeof(irq_cmd_t),
-	gxemul_cmds
-};
-
-static void gxemul_irq_handler(ipc_callid_t iid, ipc_call_t *call);
-
-/** Initializes keyboard handler. */
-static int gxemul_port_init(kbd_dev_t *kdev)
-{
-	kbd_dev = kdev;
-	
-	sysarg_t addr;
-	if (sysinfo_get_value("kbd.address.physical", &addr) != EOK)
-		return -1;
-	
-	sysarg_t inr;
-	if (sysinfo_get_value("kbd.inr", &inr) != EOK)
-		return -1;
-	
-	async_set_interrupt_received(gxemul_irq_handler);
-	gxemul_ranges[0].base = addr;
-	gxemul_cmds[0].addr = (void *) addr;
-	irq_register(inr, device_assign_devno(), 0, &gxemul_kbd);
-	return 0;
-}
-
-static void gxemul_port_yield(void)
-{
-}
-
-static void gxemul_port_reclaim(void)
-{
-}
-
-static void gxemul_port_write(uint8_t data)
-{
-	(void) data;
-}
-
-/** Process data sent when a key is pressed.
- *
- * @param keybuffer Buffer of pressed keys.
- * @param call      IPC call.
- *
- */
-static void gxemul_irq_handler(ipc_callid_t iid, ipc_call_t *call)
-{
-	kbd_push_data(kbd_dev, IPC_GET_ARG2(*call));
-}
-
-/** @}
- */
