Changeset 2c49fbbe in mainline

Timestamp:

2006-02-28T17:57:42Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a0d74fd

Parents:

95042fd

Message:

ia64 work.
Proper TLB fault handlers' headers and prototypes.
PFN 0 needs no longer be marked unavailable to frame allocator.

Location:

arch/ia64

Files:

• include/mm/tlb.h (modified) (2 diffs)
• src/mm/frame.c (modified) (1 diff)
• src/mm/tlb.c (modified) (6 diffs)

arch/ia64/include/mm/tlb.h

@@ -35 +35 @@
 #include <arch/mm/page.h>
 #include <arch/mm/asid.h>
-#include <arch/register.h>
+#include <arch/interrupt.h>
+#include <arch/types.h>
 #include <typedefs.h>
 
@@ -46 +47 @@
 extern void itr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr);
 
-extern void alternate_instruction_tlb_fault(void);
-extern void alternate_data_tlb_fault(void);
-extern void data_nested_tlb_fault(void);
-extern void data_dirty_bit_fault(void);
-extern void instruction_access_bit_fault(void);
-extern void data_access_bit_fault(void);
-extern void page_not_present(void);
+extern void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate);
+extern void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate);
+extern void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate);
+extern void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate);
+extern void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate);
+extern void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate);
+extern void page_not_present(__u64 vector, struct exception_regdump *pstate);
 
 #endif
-
-

arch/ia64/src/mm/frame.c

@@ -44 +44 @@
         
         /*
-         * Workaround to prevent slab allocator from allocating frame 0.
-         * Remove the following statement when the kernel is no longer
-         * identity mapped.
-         */
-        frame_mark_unavailable(0, 1);
-
-        /*
          * Blacklist ROM regions.
          */

arch/ia64/src/mm/tlb.c

@@ -34 +34 @@
 #include <arch/mm/tlb.h>
 #include <arch/barrier.h>
+#include <arch/interrupt.h>
 #include <typedefs.h>
+#include <panic.h>
 
 /** Invalidate all TLB entries. */
@@ -103 +105 @@
         __asm__ volatile (
                 "mov r8=psr;;\n"
-                "and r9=r8,%0;;\n"              /* (~PSR_IC_MASK) */
-                "mov psr.l=r9;;\n"
+                "rsm %0;;\n"                    /* PSR_IC_MASK */
                 "srlz.d;;\n"
                 "srlz.i;;\n"
@@ -115 +116 @@
                 "srlz.d;;\n"
                 :
-                : "r" (~PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (dtc)
-                : "p6", "p7", "r8", "r9"
+                : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (dtc)
+                : "p6", "p7", "r8"
         );
         
@@ -183 +184 @@
         __asm__ volatile (
                 "mov r8=psr;;\n"
-                "and r9=r8,%0;;\n"              /* (~PSR_IC_MASK) */
-                "mov psr.l=r9;;\n"
+                "rsm %0;;\n"                    /* PSR_IC_MASK */
                 "srlz.d;;\n"
                 "srlz.i;;\n"
@@ -195 +195 @@
                 "srlz.d;;\n"
                 :
-                :"r" (~PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (tr), "r" (dtr)
-                : "p6", "p7", "r8", "r9"
+                : "i" (PSR_IC_MASK), "r" (va), "r" (entry.word[1]), "r" (entry.word[0]), "r" (tr), "r" (dtr)
+                : "p6", "p7", "r8"
         );
         
@@ -206 +206 @@
 }
 
-void alternate_instruction_tlb_fault(void)
-{
-        panic("%s\n", __FUNCTION__);
-}
-
-void alternate_data_tlb_fault(void)
-{
-        panic("%s\n", __FUNCTION__);
-}
-
-void data_nested_tlb_fault(void)
-{
-        panic("%s\n", __FUNCTION__);
-}
-
-void data_dirty_bit_fault(void)
-{
-        panic("%s\n", __FUNCTION__);
-}
-
-void instruction_access_bit_fault(void)
-{
-        panic("%s\n", __FUNCTION__);
-}
-
-void data_access_bit_fault(void)
-{
-        panic("%s\n", __FUNCTION__);
-}
-
-void page_not_present(void)
-{
-        panic("%s\n", __FUNCTION__);
-}
+void alternate_instruction_tlb_fault(__u64 vector, struct exception_regdump *pstate)
+{
+        panic("%s\n", __FUNCTION__);
+}
+
+void alternate_data_tlb_fault(__u64 vector, struct exception_regdump *pstate)
+{
+        panic("%s: %P\n", __FUNCTION__, pstate->cr_ifa);
+}
+
+void data_nested_tlb_fault(__u64 vector, struct exception_regdump *pstate)
+{
+        panic("%s\n", __FUNCTION__);
+}
+
+void data_dirty_bit_fault(__u64 vector, struct exception_regdump *pstate)
+{
+        panic("%s\n", __FUNCTION__);
+}
+
+void instruction_access_bit_fault(__u64 vector, struct exception_regdump *pstate)
+{
+        panic("%s\n", __FUNCTION__);
+}
+
+void data_access_bit_fault(__u64 vector, struct exception_regdump *pstate)
+{
+        panic("%s\n", __FUNCTION__);
+}
+
+void page_not_present(__u64 vector, struct exception_regdump *pstate)
+{
+        panic("%s\n", __FUNCTION__);
+}