Changes in uspace/drv/uhci-hcd/hc.h [6ce42e85:302a4b6] in mainline

File:

• uspace/drv/uhci-hcd/hc.h (modified) (4 diffs)

uspace/drv/uhci-hcd/hc.h

@@ -48 +48 @@
 #include "transfer_list.h"
 
+/** UHCI I/O registers layout */
 typedef struct uhci_regs {
+        /** Command register, controls HC behaviour */
         uint16_t usbcmd;
 #define UHCI_CMD_MAX_PACKET (1 << 7)
@@ -59 +61 @@
 #define UHCI_CMD_RUN_STOP  (1 << 0)
 
+        /** Status register, 1 means interrupt is asserted (if enabled) */
         uint16_t usbsts;
 #define UHCI_STATUS_HALTED (1 << 5)
@@ -66 +69 @@
 #define UHCI_STATUS_ERROR_INTERRUPT (1 << 1)
 #define UHCI_STATUS_INTERRUPT (1 << 0)
+#define UHCI_STATUS_NM_INTERRUPTS \
+    (UHCI_STATUS_PROCESS_ERROR | UHCI_STATUS_SYSTEM_ERROR)
 
+        /** Interrupt enabled registers */
         uint16_t usbintr;
 #define UHCI_INTR_SHORT_PACKET (1 << 3)
@@ -73 +79 @@
 #define UHCI_INTR_CRC (1 << 0)
 
+        /** Register stores frame number used in SOF packet */
         uint16_t frnum;
+
+        /** Pointer(physical) to the Frame List */
         uint32_t flbaseadd;
+
+        /** SOF modification to match external timers */
         uint8_t sofmod;
 } regs_t;
 
 #define UHCI_FRAME_LIST_COUNT 1024
-#define UHCI_CLEANER_TIMEOUT 10000
+#define UHCI_INT_EMULATOR_TIMEOUT 10000
 #define UHCI_DEBUGER_TIMEOUT 5000000
 #define UHCI_ALLOWED_HW_FAIL 5
+#define UHCI_NEEDED_IRQ_COMMANDS 5
 
+/* Main HC driver structure */
 typedef struct hc {
+        /** USB bus driver, devices and addresses */
         usb_device_keeper_t manager;
+        /** USB bus driver, endpoints */
         usb_endpoint_manager_t ep_manager;
 
+        /** Addresses of I/O registers */
         regs_t *registers;
 
+        /** Frame List contains 1024 link pointers */
         link_pointer_t *frame_list;
 
+        /** List and queue of interrupt transfers */
+        transfer_list_t transfers_interrupt;
+        /** List and queue of low speed control transfers */
+        transfer_list_t transfers_control_slow;
+        /** List and queue of full speed bulk transfers */
         transfer_list_t transfers_bulk_full;
+        /** List and queue of full speed control transfers */
         transfer_list_t transfers_control_full;
-        transfer_list_t transfers_control_slow;
-        transfer_list_t transfers_interrupt;
 
+        /** Pointer table to the above lists, helps during scheduling */
         transfer_list_t *transfers[2][4];
 
+        /** Code to be executed in kernel interrupt handler */
         irq_code_t interrupt_code;
 
-        fid_t cleaner;
-        fid_t debug_checker;
+        /** Commands that form interrupt code */
+        irq_cmd_t interrupt_commands[UHCI_NEEDED_IRQ_COMMANDS];
+
+        /** Fibril periodically checking status register*/
+        fid_t interrupt_emulator;
+
+        /** Indicator of hw interrupts availability */
         bool hw_interrupts;
+
+        /** Number of hw failures detected. */
         unsigned hw_failures;
-
-        ddf_fun_t *ddf_instance;
 } hc_t;