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  • kernel/arch/amd64/src/fpu_context.c

    ra1f60f3 r3194d83  
    5757{
    5858        /* TODO: Zero all SSE, MMX etc. registers */
     59        /* Default value of SCR register is 0x1f80,
     60         * it masks all FPU exceptions*/
    5961        asm volatile (
    6062                "fninit\n"
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