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  • kernel/arch/ia32/src/fpu_context.c

    r9d58539 r3194d83  
    3737#include <arch.h>
    3838#include <cpu.h>
     39
     40
     41/** x87 FPU scr values (P3+ MMX2) */
     42enum {
     43        X87_FLUSH_ZERO_FLAG = (1 << 15),
     44        X87_ROUND_CONTROL_MASK = (0x3 << 13),
     45        x87_ROUND_TO_NEAREST_EVEN = (0x0 << 13),
     46        X87_ROUND_DOWN_TO_NEG_INF = (0x1 << 13),
     47        X87_ROUND_UP_TO_POS_INF = (0x2 << 13),
     48        X87_ROUND_TO_ZERO = (0x3 << 13),
     49        X87_PRECISION_MASK = (1 << 12),
     50        X87_UNDERFLOW_MASK = (1 << 11),
     51        X87_OVERFLOW_MASK = (1 << 10),
     52        X87_ZERO_DIV_MASK = (1 << 9),
     53        X87_DENORMAL_OP_MASK = (1 << 8),
     54        X87_INVALID_OP_MASK = (1 << 7),
     55        X87_DENOM_ZERO_FLAG = (1 << 6),
     56        X87_PRECISION_EXC_FLAG = (1 << 5),
     57        X87_UNDERFLOW_EXC_FLAG = (1 << 4),
     58        X87_OVERFLOW_EXC_FLAG = (1 << 3),
     59        X87_ZERO_DIV_EXC_FLAG = (1 << 2),
     60        X87_DENORMAL_EXC_FLAG = (1 << 1),
     61        X87_INVALID_OP_EXC_FLAG = (1 << 0),
     62
     63        X87_ALL_MASK = X87_PRECISION_MASK | X87_UNDERFLOW_MASK | X87_OVERFLOW_MASK | X87_ZERO_DIV_MASK | X87_DENORMAL_OP_MASK | X87_INVALID_OP_MASK,
     64};
     65
    3966
    4067typedef void (*fpu_context_function)(fpu_context_t *fctx);
     
    98125}
    99126
     127/** Initialize x87 FPU. Mask all exceptions. */
    100128void fpu_init()
    101129{
     
    111139                "ldmxcsr %[help0]\n"
    112140                : [help0] "+m" (help0), [help1] "+r" (help1)
    113                 : [magic] "i" (0x1f80)
     141                : [magic] "i" (X87_ALL_MASK)
    114142        );
    115143}
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