Changes in / [69c1995:3194d83] in mainline


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1 deleted
10 edited

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  • HelenOS.config

    r69c1995 r3194d83  
    9999! [PLATFORM=arm32&MACHINE=beagleboardxm] PROCESSOR (choice)
    100100
     101
    101102% RAM disk format
    102103@ "tmpfs" TMPFS image
    … …  
    346347% FPU support
    347348! [PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FPU (y)
    348 
    349 ## armv7 made fpu hardware compulsory
    350 % FPU support
    351 ! [PLATFORM=arm32&PROCESSOR=armv7_a] CONFIG_FPU (y)
    352 
    353 % FPU support
    354 ! [PLATFORM=arm32&MACHINE=integratorcp] CONFIG_FPU (y)
    355349
    356350

  • kernel/arch/arm32/Makefile.inc

    r69c1995 r3194d83  
    3535GCC_CFLAGS += -fno-omit-frame-pointer -mapcs-frame -march=$(subst _,-,$(PROCESSOR)) -mno-unaligned-access
    3636
    37 ifeq ($(CONFIG_FPU),y)
    38 # This is necessary to allow vmsr insn and fpexc manipulation
    39 # Use vfp32 to allow context save/restore of d16-d31 regs.
    40 GCC_CFLAGS += -mfloat-abi=hard -mfpu=vfp3
    41 endif
    42 
    4337BITS = 32
    4438ENDIANESS = LE
    … …  
    5246        arch/$(KARCH)/src/machine_func.c \
    5347        arch/$(KARCH)/src/context.S \
    54         arch/$(KARCH)/src/fpu_context.c \
    5548        arch/$(KARCH)/src/dummy.S \
    5649        arch/$(KARCH)/src/cpu/cpu.c \

  • kernel/arch/arm32/include/cpu.h

    r69c1995 r3194d83  
    4343/** Struct representing ARM CPU identification. */
    4444typedef struct {
    45         /** Implementor (vendor) number. */
     45        /** Implementator (vendor) number. */
    4646        uint32_t imp_num;
    4747

  • kernel/arch/arm32/include/fpu_context.h

    r69c1995 r3194d83  
    4141#include <typedefs.h>
    4242
    43 #define FPU_CONTEXT_ALIGN    8
     43#define FPU_CONTEXT_ALIGN    0
    4444
    45 /* ARM Architecture reference manual, p B-1529.
    46  */
    4745typedef struct {
    48         uint32_t fpexc;
    49         uint32_t fpscr;
    50         uint32_t s[64];
    5146} fpu_context_t;
    52 
    53 void fpu_setup(void);
    54 
    55 bool handle_if_fpu_exception(void);
    5647
    5748#endif

  • kernel/arch/arm32/src/cpu/cpu.c

    r69c1995 r3194d83  
    3939#include <print.h>
    4040
    41 /** Implementers (vendor) names */
    42 static const char * implementer(unsigned id)
    43 {
    44         switch (id)
    45         {
    46         case 0x41: return "ARM Limited";
    47         case 0x44: return "Digital Equipment Corporation";
    48         case 0x4d: return "Motorola, Freescale Semiconductor Inc.";
    49         case 0x51: return "Qualcomm Inc.";
    50         case 0x56: return "Marvell Semiconductor Inc.";
    51         case 0x69: return "Intel Corporation";
    52         }
    53         return "Unknown implementer";
    54 }
     41/** Number of indexes left out in the #imp_data array */
     42#define IMP_DATA_START_OFFSET 0x40
     43
     44/** Implementators (vendor) names */
     45static const char *imp_data[] = {
     46        "?",                                     /* IMP_DATA_START_OFFSET */
     47        "ARM Limited",                           /* 0x41 */
     48        "", "",                                  /* 0x42 - 0x43 */
     49        "Digital Equipment Corporation",         /* 0x44 */
     50        "", "", "", "", "", "", "", "",          /* 0x45 - 0x4c */
     51        "Motorola, Freescale Semicondutor Inc.", /* 0x4d */
     52        "", "", "",                              /* 0x4e - 0x50 */
     53        "Qualcomm Inc.",                         /* 0x51 */
     54        "", "", "", "",                          /* 0x52 - 0x55 */
     55        "Marvell Semiconductor",                 /* 0x56 */
     56        "", "", "", "", "", "", "", "", "", "",  /* 0x57 - 0x60 */
     57        "", "", "", "", "", "", "", "",          /* 0x61 - 0x68 */
     58        "Intel Corporation"                      /* 0x69 */
     59};
     60
     61/** Length of the #imp_data array */
     62static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
    5563
    5664/** Architecture names */
    57 static const char * architecture_string(cpu_arch_t *arch)
    58 {
    59         static const char *arch_data[] = {
    60                 "ARM",       /* 0x0 */
    61                 "ARMv4",       /* 0x1 */
    62                 "ARMv4T",      /* 0x2 */
    63                 "ARMv5",       /* 0x3 */
    64                 "ARMv5T",      /* 0x4 */
    65                 "ARMv5TE",     /* 0x5 */
    66                 "ARMv5TEJ",    /* 0x6 */
    67                 "ARMv6"        /* 0x7 */
    68         };
    69         if (arch->arch_num < (sizeof(arch_data) / sizeof(arch_data[0])))
    70                 return arch_data[arch->arch_num];
    71         else
    72                 return arch_data[0];
    73 }
     65static const char *arch_data[] = {
     66        "?",       /* 0x0 */
     67        "4",       /* 0x1 */
     68        "4T",      /* 0x2 */
     69        "5",       /* 0x3 */
     70        "5T",      /* 0x4 */
     71        "5TE",     /* 0x5 */
     72        "5TEJ",    /* 0x6 */
     73        "6"        /* 0x7 */
     74};
     75
     76/** Length of the #arch_data array */
     77static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
    7478
    7579
    7680/** Retrieves processor identification from CP15 register 0.
    77  *
     81 * 
    7882 * @param cpu Structure for storing CPU identification.
    79  * See page B4-1630 of ARM Architecture Reference Manual.
    8083 */
    8184static void arch_cpu_identify(cpu_arch_t *cpu)
    … …  
    9295        cpu->prim_part_num = (ident << 16) >> 20;
    9396        cpu->rev_num = (ident << 28) >> 28;
    94         // TODO CPUs with arch_num == 0xf use CPUID scheme for identification
    9597}
    9698
    … …  
    134136        );
    135137#endif
    136 #ifdef CONFIG_FPU
    137         fpu_setup();
    138 #endif
    139138}
    140139
    … …  
    148147void cpu_print_report(cpu_t *m)
    149148{
    150         printf("cpu%d: vendor=%s, architecture=%s, part number=%x, "
     149        const char *vendor = imp_data[0];
     150        const char *architecture = arch_data[0];
     151        cpu_arch_t * cpu_arch = &m->arch;
     152
     153        const unsigned imp_offset = cpu_arch->imp_num - IMP_DATA_START_OFFSET;
     154
     155        if (imp_offset < imp_data_length) {
     156                vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
     157        }
     158
     159        // TODO CPUs with arch_num == 0xf use CPUID scheme for identification
     160        if (cpu_arch->arch_num < arch_data_length) {
     161                architecture = arch_data[cpu_arch->arch_num];
     162        }
     163
     164        printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
    151165            "variant=%x, revision=%x\n",
    152             m->id, implementer(m->arch.imp_num),
    153             architecture_string(&m->arch), m->arch.prim_part_num,
    154             m->arch.variant_num, m->arch.rev_num);
     166            m->id, vendor, architecture, cpu_arch->prim_part_num,
     167            cpu_arch->variant_num, cpu_arch->rev_num);
    155168}
    156169

  • kernel/arch/arm32/src/dummy.S

    r69c1995 r3194d83  
    3232.global asm_delay_loop
    3333
     34.global fpu_context_restore
     35.global fpu_context_save
     36.global fpu_enable
     37.global fpu_init
     38
    3439.global sys_tls_set
    3540.global dummy
    … …  
    4146        mov     pc, lr
    4247
     48fpu_context_restore:
     49        mov     pc, lr
     50   
     51fpu_context_save:
     52        mov     pc, lr
     53   
     54fpu_enable:
     55        mov     pc, lr
     56
     57fpu_init:
     58        mov     pc, lr
     59   
    4360# not used on ARM
    4461sys_tls_set:

  • kernel/arch/arm32/src/exception.c

    r69c1995 r3194d83  
    161161}
    162162
    163 /** Undefined instruction exception handler.
    164  *
    165  * Calls scheduler_fpu_lazy_request
    166  */
    167 static void undef_insn_exception(unsigned int exc_no, istate_t *istate)
    168 {
    169         if (!handle_if_fpu_exception()) {
    170                 fault_if_from_uspace(istate, "Undefined instruction.");
    171                 panic_badtrap(istate, exc_no, "Undefined instruction.");
    172         } else {
    173                 /*
    174                  * Retry the failing instruction,
    175                  * ARM Architecture Reference Manual says on p.B1-1169
    176                  * that offset for undef instruction exception is 4
    177                  */
    178                 istate->pc -= 4;
    179         }
    180 }
    181 
    182163/** Initializes exception handling.
    183164 *
    … …  
    193174        install_exception_handlers();
    194175       
    195         exc_register(EXC_UNDEF_INSTR, "undefined instruction", true,
    196             (iroutine_t) undef_insn_exception);
    197176        exc_register(EXC_IRQ, "interrupt", true,
    198177            (iroutine_t) irq_exception);

  • kernel/arch/arm32/src/ras.c

    r69c1995 r3194d83  
    6767void ras_check(unsigned int n, istate_t *istate)
    6868{
    69         bool restart = false;
     69        uintptr_t rewrite_pc = istate->pc;
    7070
    7171        if (istate_from_uspace(istate)) {
    … …  
    7373                        if ((ras_page[RAS_START] < istate->pc) &&
    7474                            (ras_page[RAS_END] > istate->pc)) {
    75                                 restart = true;
     75                                rewrite_pc = ras_page[RAS_START];
    7676                        }
    7777                        ras_page[RAS_START] = 0;
    7878                        ras_page[RAS_END] = 0xffffffff;
    79                 }
     79                }       
    8080        }
    8181
    8282        exc_dispatch(n, istate);
    83         if (restart)
    84                 istate->pc = ras_page[RAS_START];
     83
     84        istate->pc = rewrite_pc;
    8585}
    8686

  • tools/toolchain.sh

    r69c1995 r3194d83  
    5353EOF
    5454
    55 BINUTILS_VERSION="2.23.1"
     55BINUTILS_VERSION="2.22"
    5656BINUTILS_RELEASE=""
    5757GCC_VERSION="4.7.2"
    … …  
    274274        GDB_SOURCE="ftp://ftp.gnu.org/gnu/gdb/"
    275275       
    276         download_fetch "${BINUTILS_SOURCE}" "${BINUTILS}" "33adb18c3048d057ac58d07a3f1adb38"
     276        download_fetch "${BINUTILS_SOURCE}" "${BINUTILS}" "ee0f10756c84979622b992a4a61ea3f5"
    277277        download_fetch "${GCC_SOURCE}" "${GCC}" "cc308a0891e778cfda7a151ab8a6e762"
    278278        download_fetch "${GDB_SOURCE}" "${GDB}" "24a6779a9fe0260667710de1b082ef61"

  • uspace/lib/c/arch/arm32/Makefile.common

    r69c1995 r3194d83  
    2828#
    2929
     30BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a
    3031GCC_CFLAGS += -ffixed-r9 -mtp=soft -fno-omit-frame-pointer -mapcs-frame -march=$(subst _,-,$(PROCESSOR))
    31 
    32 ifeq ($(CONFIG_FPU),y)
    33 GCC_CFLAGS += -mfloat-abi=hard
    34 else
    35 BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a
    36 endif
    3732
    3833ENDIANESS = LE
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