Changes in uspace/drv/nic/rtl8139/defs.h [5cd3d67:321052f7] in mainline
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uspace/drv/nic/rtl8139/defs.h
r5cd3d67 r321052f7 29 29 /** @file rtl8139_defs.h 30 30 * 31 * Registers, bit positions and masks definition 32 * of the RTL8139 network family cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_ 36 #define RTL8139_DEFS_H_ 37 31 * Registers, bit positions and masks definition of the RTL8139 network family 32 * cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_INCLUDED_ 36 #define RTL8139_DEFS_H_INCLUDED_ 38 37 #include <sys/types.h> 39 38 #include <libarch/ddi.h> 40 39 41 /** Size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** Maximal transmitted frame length 45 * 46 * Maximal transmitted frame length in bytes 47 * allowed according to the RTL8139 documentation 48 * (see SIZE part of TSD documentation). 49 * 50 */ 51 #define RTL8139_FRAME_MAX_LENGTH 1792 40 41 /** The size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** The maximal transmitted frame length in bytes allowed according to RTL8139 45 * documentation (see SIZE part of TSD documentation) 46 */ 47 #define RTL8139_FRAME_MAX_LENGTH 1792 48 52 49 53 50 /** HW version 54 51 * 55 * As can be detected from HWVERID part of TCR 56 * (Transmit Configuration Register). 57 * 58 */ 59 typedef enum { 52 * as can be detected from HWVERID part of TCR 53 * (Transmit Configuration Register) 54 */ 55 enum rtl8139_version_id { 60 56 RTL8139 = 0, /**< RTL8139 */ 61 57 RTL8139A, /**< RTL8139A */ … … 70 66 RTL8101, /**< RTL8101 */ 71 67 RTL8139_VER_COUNT /**< Count of known RTL versions, the last value */ 72 } rtl8139_version_id_t; 68 }; 69 70 extern const char* model_names[RTL8139_VER_COUNT]; 73 71 74 72 /** Registers of RTL8139 family card offsets from the memory address base */ … … 77 75 MAC0 = IDR0, /**< Alias for IDR0 */ 78 76 79 // 0x 06 - 0x07 reserved77 // 0x6 - 0x7 reserved 80 78 81 79 MAR0 = 0x08, /**< Multicast mask registers 8 1b registers sequence */ … … 215 213 pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED); 216 214 } 217 218 215 /** Allow to change Config0-4 and BMCR register */ 219 216 static inline void rtl8139_regs_unlock(void *io_base) … … 420 417 421 418 /** Maximal runt frame size + 1 */ 422 #define RTL8139_RUNT_MAX_SIZE 419 #define RTL8139_RUNT_MAX_SIZE 64 423 420 424 421 /** Bits in frame header */ … … 473 470 474 471 /** Mapping of HW version -> version ID */ 475 struct rtl8139_hwver_map { 476 uint32_t hwverid; /**< HW version value in the register */477 rtl8139_version_id_tver_id; /**< appropriate version id */472 struct rtl8139_hwver_map { 473 uint32_t hwverid; /**< HW version value in the register */ 474 enum rtl8139_version_id ver_id; /**< appropriate version id */ 478 475 }; 479 476 480 477 /** Mapping of HW version -> version ID */ 481 478 extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1]; 482 extern const char* model_names[RTL8139_VER_COUNT];483 479 484 480 /** Size in the frame header while copying from RxFIFO to Rx buffer */ 485 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 486 481 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 487 482 /** The only supported pause frame time value */ 488 #define RTL8139_PAUSE_VAL 483 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF) 489 484 490 485 /** Size of the frame header in front of the received frame */ 491 #define RTL_FRAME_HEADER_SIZE 486 #define RTL_FRAME_HEADER_SIZE 4 492 487 493 488 /** 8k buffer */
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