Changeset 32a89bf in mainline


Ignore:
Timestamp:
2005-05-20T21:39:19Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
14def1f6
Parents:
0cb0a72
Message:

IA-64 work.
Add application registers ar.lc, ar.ec, ar.ccv, ar.csd, ar.ssd to context_t.
Add store/load operations for ar.lc, ar.ec, ar.ccv, ar.csd, ar.ssd to context_save()/restore().
Add application registers ar.rcs, ar.bsp and ar.rnat to context_t.
Proper store/load operations for ar.rcs, ar.bsp and ar.rnat is in the works.

FPU cleanup.
Remove call set_TS_flag() from cpu_identify().
Remove unneeded includes from FPU test #1.

Files:
5 edited

Legend:

Unmodified
Added
Removed
  • arch/ia32/src/cpu/cpu.c

    r0cb0a72 r32a89bf  
    132132                CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;                                           
    133133        }
    134     set_TS_flag();
    135134}
    136135
  • arch/ia32/src/fpu_context.c

    r0cb0a72 r32a89bf  
    11/*
    2  *
    32 * Copyright (C) 2005 Jakub Vana
    43 * All rights reserved.
  • arch/ia64/include/context.h

    r0cb0a72 r32a89bf  
    3939
    4040struct context {
    41         __u64 pfs;
    42         __u64 unat_caller;
    43         __u64 unat_callee;
     41
     42        /*
     43         * Application registers
     44         */
     45        __u64 ar_pfs;
     46        __u64 ar_unat_caller;
     47        __u64 ar_unat_callee;
     48        __u64 ar_rsc;
     49        __u64 ar_bsp;
     50        __u64 ar_rnat;
     51        __u64 ar_lc;
     52        __u64 ar_ec;
     53        __u64 ar_ccv;
     54        __u64 ar_csd;
     55        __u64 ar_ssd;
    4456
    4557        /*
  • arch/ia64/src/context.S

    r0cb0a72 r32a89bf  
    3333
    3434context_save:
    35         alloc loc0 = ar.pfs, 1, 10, 0, 0
     35        alloc loc0 = ar.pfs, 1, 11, 0, 0
    3636        mov loc1 = ar.unat      ;;
    37        
     37        /* loc2 */
     38        mov loc3 = ar.rsc
     39        mov loc4 = ar.bsp
     40        mov loc5 = ar.rnat
     41        mov loc6 = ar.lc
     42        mov loc7 = ar.ec
     43        mov loc8 = ar.ccv
     44        mov loc9 = ar.csd
     45        mov loc10 = ar.ssd
     46       
     47        /*
     48         * Save application registers
     49         */
    3850        st8 [in0] = loc0, 8     ;;      /* save ar.pfs */
    3951        st8 [in0] = loc1, 8     ;;      /* save ar.unat (caller) */
    4052        mov loc2 = in0          ;;
    4153        add in0 = 8, in0        ;;      /* skip ar.unat (callee) */
    42        
    43         /*
    44          * TODO: save the rest of the context registers.
    45          */
    46 
     54        st8 [in0] = loc3, 8     ;;      /* save ar.rsc */
     55        st8 [in0] = loc4, 8     ;;      /* save ar.bsp */
     56        st8 [in0] = loc5, 8     ;;      /* save ar.rnat */
     57        st8 [in0] = loc6, 8     ;;      /* save ar.lc */
     58        st8 [in0] = loc7, 8     ;;      /* save ar.ec */
     59        st8 [in0] = loc8, 8     ;;      /* save ar.ccv */
     60        st8 [in0] = loc9, 8     ;;      /* save ar.csd */
     61        st8 [in0] = loc10, 8    ;;      /* save ar.ssd */       
     62       
    4763        /*
    4864         * Save general registers including NaT bits
     
    116132
    117133context_restore:
    118         alloc loc0 = ar.pfs, 1, 10, 0, 0        ;;
    119 
    120         /*
    121          * TODO: restore the rest of the context registers.
    122          */
    123        
    124         ld8 loc0 = [in0], 8     ;;      /* load pfs */
    125         ld8 loc1 = [in0], 8     ;;      /* load unat (caller) */
    126         ld8 loc2 = [in0], 8     ;;      /* load unat (callee) */
    127        
     134        alloc loc0 = ar.pfs, 1, 11, 0, 0        ;;
     135
     136        ld8 loc0 = [in0], 8     ;;      /* load ar.pfs */
     137        ld8 loc1 = [in0], 8     ;;      /* load ar.unat (caller) */
     138        ld8 loc2 = [in0], 8     ;;      /* load ar.unat (callee) */
     139        ld8 loc3 = [in0], 8     ;;      /* load ar.rsc */
     140        ld8 loc4 = [in0], 8     ;;      /* load ar.bsp */
     141        ld8 loc5 = [in0], 8     ;;      /* load ar.rnat */
     142        ld8 loc6 = [in0], 8     ;;      /* load ar.lc */
     143        ld8 loc7 = [in0], 8     ;;      /* load ar.ec */
     144        ld8 loc8 = [in0], 8     ;;      /* load ar.ccv */
     145        ld8 loc9 = [in0], 8     ;;      /* load ar.csd */
     146        ld8 loc10 = [in0], 8    ;;      /* load ar.ssd */
     147       
     148        /*
     149         * Restore application registers
     150         */
    128151        mov ar.unat = loc2      ;;
     152        /* TODO: restore ar.rsc, ar.rnat, ar.bspstore */       
     153        mov ar.lc = loc6
     154        mov ar.ec = loc7
     155        mov ar.ccv = loc8
     156        mov ar.csd = loc9
     157        mov ar.ssd = loc10
    129158       
    130159        /*
  • test/fpu/fpu1/test.c

    r0cb0a72 r32a89bf  
    2828 */
    2929
    30 #include <arch/interrupt.h>
    3130#include <print.h>
    3231#include <debug.h>
    3332#include <panic.h>
    34 #include <arch/i8259.h>
    35 #include <func.h>
    36 #include <cpu.h>
    37 #include <arch/asm.h>
    38 #include <mm/tlb.h>
    3933
    4034#include <test.h>
    41 #include <arch.h>
    4235#include <arch/smp/atomic.h>
    4336#include <proc/thread.h>
     37
     38#include <arch.h>
    4439
    4540#define THREADS         150*2
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