Changeset 34db7fa in mainline
- Timestamp:
- 2006-12-12T12:32:02Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 96348adc
- Parents:
- df496c5
- Location:
- kernel
- Files:
-
- 23 added
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/generic/src/console/cmd.c
rdf496c5 r34db7fa 68 68 #ifdef CONFIG_TEST 69 69 #include <test.h> 70 #endif 71 72 #ifdef CONFIG_BENCH 73 #include <arch/cycle.h> 70 74 #endif 71 75 … … 859 863 } 860 864 865 static bool run_test(const test_t * test) 866 { 867 printf("%s\t\t%s\n", test->name, test->desc); 868 #ifdef CONFIG_BENCH 869 uint64_t t0 = get_cycle(); 870 #endif 871 char * ret = test->entry(); 872 #ifdef CONFIG_BENCH 873 uint64_t dt = get_cycle() - t0; 874 printf("Time: %llu cycles\n", dt); 875 #endif 876 877 if (ret == NULL) { 878 printf("Test passed\n"); 879 return true; 880 } 881 882 printf("%s\n", ret); 883 return false; 884 } 885 861 886 /** Command for returning kernel tests 862 887 * … … 872 897 for (test = tests; test->name != NULL; test++) { 873 898 if (test->safe) { 874 printf("\n%s\t\t%s\n\n", test->name, test->desc); 875 test->entry(); 899 printf("\n"); 900 if (!run_test(test)) 901 break; 876 902 } 877 903 } … … 882 908 if (strcmp(test->name, argv->buffer) == 0) { 883 909 fnd = true; 884 test->entry();910 run_test(test); 885 911 break; 886 912 } … … 888 914 889 915 if (!fnd) 890 printf("Unknown test .\n");916 printf("Unknown test\n"); 891 917 } 892 918 -
kernel/test/atomic/atomic1.c
rdf496c5 r34db7fa 32 32 #include <debug.h> 33 33 34 #ifdef CONFIG_BENCH 35 #include <arch/cycle.h> 36 #endif 37 38 void test_atomic1(void) 34 char * test_atomic1(void) 39 35 { 40 #ifdef CONFIG_BENCH41 uint64_t t0 = get_cycle();42 #endif43 36 atomic_t a; 44 37 45 38 atomic_set(&a, 10); 46 printf("Testing atomic_set() and atomic_get().\n"); 47 ASSERT(atomic_get(&a) == 10); 48 printf("Testing atomic_postinc()\n"); 49 ASSERT(atomic_postinc(&a) == 10); 50 ASSERT(atomic_get(&a) == 11); 51 printf("Testing atomic_postdec()\n"); 52 ASSERT(atomic_postdec(&a) == 11); 53 ASSERT(atomic_get(&a) == 10); 54 printf("Testing atomic_preinc()\n"); 55 ASSERT(atomic_preinc(&a) == 11); 56 ASSERT(atomic_get(&a) == 11); 57 printf("Testing atomic_predec()\n"); 58 ASSERT(atomic_postdec(&a) == 11); 59 ASSERT(atomic_get(&a) == 10); 60 61 printf("Test passed.\n"); 62 #ifdef CONFIG_BENCH 63 uint64_t dt = get_cycle() - t0; 64 printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); 65 #endif 39 if (atomic_get(&a) != 10) 40 return "Failed atomic_set()/atomic_get()"; 41 42 if (atomic_postinc(&a) != 10) 43 return "Failed atomic_postinc()"; 44 if (atomic_get(&a) != 11) 45 return "Failed atomic_get() after atomic_postinc()"; 46 47 if (atomic_postdec(&a) != 11) 48 return "Failed atomic_postdec()"; 49 if (atomic_get(&a) != 10) 50 return "Failed atomic_get() after atomic_postdec()"; 51 52 if (atomic_preinc(&a) != 11) 53 return "Failed atomic_preinc()"; 54 if (atomic_get(&a) != 11) 55 return "Failed atomic_get() after atomic_preinc()"; 56 57 if (atomic_predec(&a) != 10) 58 return "Failed atomic_predec()"; 59 if (atomic_get(&a) != 10) 60 return "Failed atomic_get() after atomic_predec()"; 61 62 return NULL; 66 63 } -
kernel/test/btree/btree1.c
rdf496c5 r34db7fa 32 32 #include <debug.h> 33 33 34 #ifdef CONFIG_BENCH35 #include <arch/cycle.h>36 #endif37 38 34 static void *data = (void *) 0xdeadbeef; 39 35 40 voidtest_btree1(void)36 char * test_btree1(void) 41 37 { 42 #ifdef CONFIG_BENCH43 uint64_t t0 = get_cycle();44 #endif45 38 btree_t t; 46 39 int i; … … 164 157 165 158 btree_print(&t); 166 #ifdef CONFIG_BENCH 167 uint64_t dt = get_cycle() - t0; 168 printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); 169 #endif 159 160 return NULL; 170 161 } -
kernel/test/debug/mips1.c
rdf496c5 r34db7fa 26 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 27 */ 28 29 #ifdef mips32 28 30 29 31 #include <print.h> … … 38 40 #include <arch.h> 39 41 42 char * test_mips1(void) 43 { 44 printf("You should enter kconsole debug mode now.\n"); 45 46 asm volatile ( 47 "break\n" 48 ); 49 50 return "Back from debug mode"; 51 } 40 52 41 void test_mips1(void)42 {43 #ifdef mips3244 printf("MIPS debug test #1\n");45 46 printf("You should enter kconsole debug mode now.\n");47 48 asm __volatile__ ("break");49 50 printf("Test passed.\n");51 #else52 printf("This test is availaible only on MIPS32 platform.\n");53 53 #endif 54 } -
kernel/test/fault/fault1.c
rdf496c5 r34db7fa 39 39 40 40 41 voidtest_fault1(void)41 char * test_fault1(void) 42 42 { 43 44 ((int *)(0))[1]=0;45 43 ((int *)(0))[1] = 0; 44 45 return "Written to NULL"; 46 46 } -
kernel/test/fpu/fpu1.c
rdf496c5 r34db7fa 28 28 */ 29 29 30 #if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen)) 31 30 32 #include <print.h> 31 33 #include <debug.h> … … 39 41 #include <arch/arch.h> 40 42 41 #ifdef CONFIG_BENCH 42 #include <arch/cycle.h> 43 #endif 44 45 #if (defined(ia32) || defined(amd64) || defined(ia64) || defined(ia32xen)) 46 47 #define THREADS 150*2 43 44 #define THREADS 150 48 45 #define ATTEMPTS 100 49 46 … … 53 50 54 51 #ifdef KERN_ia32_ARCH_H_ 55 static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; } 52 static inline double sqrt(double x) 53 { 54 double v; 55 56 asm ( 57 "fsqrt\n" 58 : "=t" (v) 59 : "0" (x) 60 ); 61 62 return v; 63 } 56 64 #endif 57 65 58 66 #ifdef KERN_amd64_ARCH_H_ 59 static inline double sqrt(double x) { double v; __asm__ ("fsqrt\n" : "=t" (v) : "0" (x)); return v; } 67 static inline double sqrt(double x) 68 { 69 double v; 70 71 asm ( 72 "fsqrt\n" 73 : "=t" (v) 74 : "0" (x) 75 ); 76 77 return v; 78 } 60 79 #endif 61 80 62 81 #ifdef KERN_ia64_ARCH_H_ 82 83 #undef PI_10e8 84 #define PI_10e8 3141592 85 63 86 static inline long double sqrt(long double a) 64 87 { … … 66 89 long double lx = 0; 67 90 68 if(a<0.00000000000000001) return 0; 91 if (a < 0.00000000000000001) 92 return 0; 69 93 70 while(x !=lx)71 {72 lx=x;73 x=(x+(a/x))/2;74 }94 while(x != lx) { 95 lx = x; 96 x = (x + (a / x)) / 2; 97 } 98 75 99 return x; 76 100 } … … 78 102 79 103 80 81 104 static atomic_t threads_ok; 105 static atomic_t threads_fault; 82 106 static waitq_t can_start; 83 107 … … 92 116 93 117 for (i = 0; i<ATTEMPTS; i++) { 94 le=-1; 95 e=0; 96 f=1; 97 98 for(d=1;e!=le;d*=f,f+=1) { 99 le=e; 100 e=e+1/d; 101 } 102 103 if((int)(100000000*e)!=E_10e8) 104 panic("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*e),(unative_t) E_10e8); 105 } 106 107 printf("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*e),(unative_t) E_10e8); 118 le = -1; 119 e = 0; 120 f = 1; 121 122 for (d = 1; e != le; d *= f, f += 1) { 123 le = e; 124 e = e + 1 / d; 125 } 126 127 if ((int) (100000000 * e) != E_10e8) { 128 printf("tid%d: e*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000 * e), (unative_t) E_10e8); 129 atomic_inc(&threads_fault); 130 break; 131 } 132 } 108 133 atomic_inc(&threads_ok); 109 134 } … … 111 136 static void pi(void *data) 112 137 { 113 114 #ifdef KERN_ia64_ARCH_H_115 #undef PI_10e8116 #define PI_10e8 3141592117 #endif118 119 120 138 int i; 121 139 double lpi, pi; … … 126 144 waitq_sleep(&can_start); 127 145 128 129 for (i = 0; i<ATTEMPTS; i++) { 146 for (i = 0; i < ATTEMPTS; i++) { 130 147 lpi = -1; 131 148 pi = 0; 132 149 133 for (n =2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) {150 for (n = 2, ab = sqrt(2); lpi != pi; n *= 2, ab = ad) { 134 151 double sc, cd; 135 152 136 sc = sqrt(1 - (ab *ab/4));153 sc = sqrt(1 - (ab * ab / 4)); 137 154 cd = 1 - sc; 138 ad = sqrt(ab *ab/4 + cd*cd);155 ad = sqrt(ab * ab / 4 + cd * cd); 139 156 lpi = pi; 140 157 pi = 2 * n * ad; … … 142 159 143 160 #ifdef KERN_ia64_ARCH_H_ 144 if((int)(1000000*pi)!=PI_10e8) 145 panic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (1000000*pi),(unative_t) (PI_10e8/100)); 161 if ((int) (1000000 * pi) != PI_10e8) { 162 printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (1000000 * pi), (unative_t) (PI_10e8 / 100)); 163 atomic_inc(&threads_fault); 164 break; 165 } 146 166 #else 147 if ((int)(100000000*pi)!=PI_10e8)148 p anic("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*pi),(unative_t) PI_10e8);149 #endif 150 151 }152 153 printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000*pi),(unative_t) PI_10e8);167 if ((int) (100000000 * pi) != PI_10e8) { 168 printf("tid%d: pi*10e8=%zd should be %zd\n", THREAD->tid, (unative_t) (100000000 * pi), (unative_t) PI_10e8); 169 atomic_inc(&threads_fault); 170 break; 171 } 172 #endif 173 } 154 174 atomic_inc(&threads_ok); 155 175 } 156 176 157 void test_fpu1(void) 158 { 159 #ifdef CONFIG_BENCH 160 uint64_t t0 = get_cycle(); 161 #endif 162 thread_t *t; 163 int i; 177 char * test_fpu1(void) 178 { 179 unsigned int i, total = 0; 164 180 165 181 waitq_initialize(&can_start); 166 167 printf("FPU test #1\n"); 168 printf("Creating %d threads... ", THREADS); 169 170 for (i=0; i<THREADS/2; i++) { 171 if (!(t = thread_create(e, NULL, TASK, 0, "e"))) 172 panic("could not create thread\n"); 182 atomic_set(&threads_ok, 0); 183 atomic_set(&threads_fault, 0); 184 printf("Creating %d threads... ", 2 * THREADS); 185 186 for (i = 0; i < THREADS; i++) { 187 thread_t *t; 188 189 if (!(t = thread_create(e, NULL, TASK, 0, "e"))) { 190 printf("could not create thread %d\n", 2 * i); 191 break; 192 } 173 193 thread_ready(t); 174 if (!(t = thread_create(pi, NULL, TASK, 0, "pi"))) 175 panic("could not create thread\n"); 194 total++; 195 196 if (!(t = thread_create(pi, NULL, TASK, 0, "pi"))) { 197 printf("could not create thread %d\n", 2 * i + 1); 198 break; 199 } 176 200 thread_ready(t); 201 total++; 177 202 } 178 203 printf("ok\n"); … … 180 205 thread_sleep(1); 181 206 waitq_wakeup(&can_start, WAKEUP_ALL); 182 183 while (atomic_get(&threads_ok) != THREADS) 184 ; 185 186 printf("Test passed.\n"); 187 #ifdef CONFIG_BENCH 188 uint64_t dt = get_cycle() - t0; 189 printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); 190 #endif 191 } 192 193 #else 194 195 void test_fpu1(void) 196 { 197 printf("This test is available only on Intel/AMD platforms."); 198 } 199 200 #endif 207 208 while (atomic_get(&threads_ok) != total) { 209 printf("Threads left: %d\n", total - atomic_get(&threads_ok)); 210 thread_sleep(1); 211 } 212 213 if (atomic_get(&threads_fault) == 0) 214 return NULL; 215 216 return "Test failed"; 217 } 218 219 #endif -
kernel/test/fpu/mips2.c
rdf496c5 r34db7fa 27 27 */ 28 28 29 #ifdef mips32 30 29 31 #include <print.h> 30 32 #include <debug.h> … … 38 40 #include <arch.h> 39 41 40 #ifdef mips3241 42 42 #define THREADS 50 43 43 #define DELAY 10000L … … 45 45 46 46 static atomic_t threads_ok; 47 static atomic_t threads_fault; 47 48 static waitq_t can_start; 48 49 … … 50 51 { 51 52 int i; 52 int arg __attribute__((aligned(16))) = (int) ((unative_t) data);53 int arg __attribute__((aligned(16))) = (int) ((unative_t) data); 53 54 int after_arg __attribute__((aligned(16))); 54 55 55 56 thread_detach(THREAD); 56 57 57 58 waitq_sleep(&can_start); 58 59 59 for (i = 0; i <ATTEMPTS; i++) {60 __asm__volatile (60 for (i = 0; i < ATTEMPTS; i++) { 61 asm volatile ( 61 62 "mtc1 %0,$1" 62 : "=r"(arg)63 64 63 : "=r" (arg) 64 ); 65 65 66 delay(DELAY); 66 __asm__ volatile ( 67 68 asm volatile ( 67 69 "mfc1 %0, $1" 68 : "=r"(after_arg)69 70 : "=r" (after_arg) 71 ); 70 72 71 if(arg != after_arg) 72 panic("General reg tid%d: arg(%d) != %d\n", 73 THREAD->tid, arg, after_arg); 73 if (arg != after_arg) { 74 printf("General reg tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); 75 atomic_inc(&threads_fault); 76 break; 77 } 74 78 } 75 76 79 atomic_inc(&threads_ok); 77 80 } … … 80 83 { 81 84 int i; 82 int arg __attribute__((aligned(16))) = (int) ((unative_t) data);85 int arg __attribute__((aligned(16))) = (int) ((unative_t) data); 83 86 int after_arg __attribute__((aligned(16))); 84 87 85 88 thread_detach(THREAD); 86 89 87 90 waitq_sleep(&can_start); 88 91 89 for (i = 0; i <ATTEMPTS; i++) {90 __asm__volatile (92 for (i = 0; i < ATTEMPTS; i++) { 93 asm volatile ( 91 94 "mtc1 %0,$1" 92 : "=r"(arg)93 95 : "=r" (arg) 96 ); 94 97 95 98 scheduler(); 96 __asm__volatile (99 asm volatile ( 97 100 "mfc1 %0,$1" 98 : "=r"(after_arg)99 101 : "=r" (after_arg) 102 ); 100 103 101 if(arg != after_arg) 102 panic("General reg tid%d: arg(%d) != %d\n", 103 THREAD->tid, arg, after_arg); 104 if (arg != after_arg) { 105 panic("General reg tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); 106 atomic_inc(&threads_fault); 107 break; 108 } 104 109 } 105 106 110 atomic_inc(&threads_ok); 107 111 } 108 112 109 113 110 voidtest_mips2(void)114 char * test_mips2(void) 111 115 { 112 thread_t *t; 113 int i; 116 unsigned int i, total = 0; 117 118 waitq_initialize(&can_start); 119 atomic_set(&threads_ok, 0); 120 atomic_set(&threads_fault, 0); 121 printf("Creating %d threads... ", 2 * THREADS); 114 122 115 waitq_initialize(&can_start); 116 117 printf("MIPS test #1\n"); 118 printf("Creating %d threads... ", THREADS); 119 120 for (i=0; i<THREADS/2; i++) { 121 if (!(t = thread_create(testit1, (void *)((unative_t)i*2), TASK, 0, "testit1"))) 122 panic("could not create thread\n"); 123 for (i = 0; i < THREADS; i++) { 124 thread_t *t; 125 126 if (!(t = thread_create(testit1, (void *) ((unative_t) 2 * i), TASK, 0, "testit1"))) { 127 printf("could not create thread %d\n", 2 * i); 128 break; 129 } 123 130 thread_ready(t); 124 if (!(t = thread_create(testit2, (void *)((unative_t)i*2+1), TASK, 0, "testit2"))) 125 panic("could not create thread\n"); 131 total++; 132 133 if (!(t = thread_create(testit2, (void *) ((unative_t) 2 * i + 1), TASK, 0, "testit2"))) { 134 printf("could not create thread %d\n", 2 * i + 1); 135 break; 136 } 126 137 thread_ready(t); 138 total++; 127 139 } 128 129 140 printf("ok\n"); 130 141 131 142 thread_sleep(1); 132 143 waitq_wakeup(&can_start, WAKEUP_ALL); 133 134 while (atomic_get(&threads_ok) != THREADS) 135 ; 136 137 printf("Test passed.\n"); 138 } 139 140 #else 141 142 void test_mips2(void) 143 { 144 printf("This test is availaible only on MIPS32 platform.\n"); 144 145 while (atomic_get(&threads_ok) != total) { 146 printf("Threads left: %d\n", total - atomic_get(&threads_ok)); 147 thread_sleep(1); 148 } 149 150 if (atomic_get(&threads_fault) == 0) 151 return NULL; 152 153 return "Test failed"; 145 154 } 146 155 -
kernel/test/fpu/sse1.c
rdf496c5 r34db7fa 27 27 */ 28 28 29 #if (defined(ia32) || defined(amd64) || defined(ia32xen)) 30 29 31 #include <print.h> 30 32 #include <debug.h> … … 38 40 #include <arch.h> 39 41 40 #ifdef CONFIG_BENCH 41 #include <arch/cycle.h> 42 #endif 43 44 #if (defined(ia32) || defined(amd64) || defined(ia32xen)) 45 46 #define THREADS 50 42 #define THREADS 25 47 43 #define DELAY 10000L 48 44 #define ATTEMPTS 5 49 45 50 46 static atomic_t threads_ok; 47 static atomic_t threads_fault; 51 48 static waitq_t can_start; 52 49 … … 54 51 { 55 52 int i; 56 int arg __attribute__((aligned(16))) = (int) ((unative_t) data);53 int arg __attribute__((aligned(16))) = (int) ((unative_t) data); 57 54 int after_arg __attribute__((aligned(16))); 58 55 … … 61 58 waitq_sleep(&can_start); 62 59 63 for (i = 0; i <ATTEMPTS; i++) {64 __asm__volatile (65 "movlpd %0, %%xmm2 "66 : "=m"(arg)67 60 for (i = 0; i < ATTEMPTS; i++) { 61 asm volatile ( 62 "movlpd %0, %%xmm2\n" 63 : "=m" (arg) 64 ); 68 65 69 66 delay(DELAY); 70 __asm__volatile (71 "movlpd %%xmm2, %0 "72 : "=m"(after_arg)73 67 asm volatile ( 68 "movlpd %%xmm2, %0\n" 69 : "=m" (after_arg) 70 ); 74 71 75 if(arg != after_arg) 76 panic("tid%d: arg(%d) != %d\n", 77 THREAD->tid, arg, after_arg); 72 if (arg != after_arg) { 73 printf("tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); 74 atomic_inc(&threads_fault); 75 break; 76 } 78 77 } 79 80 78 atomic_inc(&threads_ok); 81 79 } … … 84 82 { 85 83 int i; 86 int arg __attribute__((aligned(16))) = (int) ((unative_t) data);84 int arg __attribute__((aligned(16))) = (int) ((unative_t) data); 87 85 int after_arg __attribute__((aligned(16))); 88 86 89 87 thread_detach(THREAD); 90 88 91 89 waitq_sleep(&can_start); 92 90 93 for (i = 0; i <ATTEMPTS; i++) {94 __asm__volatile (95 "movlpd %0, %%xmm2 "96 : "=m"(arg)97 91 for (i = 0; i < ATTEMPTS; i++) { 92 asm volatile ( 93 "movlpd %0, %%xmm2\n" 94 : "=m" (arg) 95 ); 98 96 99 97 scheduler(); 100 __asm__volatile (101 "movlpd %%xmm2, %0 "102 : "=m"(after_arg)103 98 asm volatile ( 99 "movlpd %%xmm2, %0\n" 100 : "=m" (after_arg) 101 ); 104 102 105 if(arg != after_arg) 106 panic("tid%d: arg(%d) != %d\n", 107 THREAD->tid, arg, after_arg); 103 if (arg != after_arg) { 104 printf("tid%d: arg(%d) != %d\n", THREAD->tid, arg, after_arg); 105 atomic_inc(&threads_fault); 106 break; 107 } 108 108 } 109 110 109 atomic_inc(&threads_ok); 111 110 } 112 111 113 112 114 voidtest_sse1(void)113 char * test_sse1(void) 115 114 { 116 #ifdef CONFIG_BENCH 117 uint64_t t0 = get_cycle(); 118 #endif 119 thread_t *t; 120 int i; 115 unsigned int i, total = 0; 121 116 122 117 waitq_initialize(&can_start); 118 atomic_set(&threads_ok, 0); 119 atomic_set(&threads_fault, 0); 120 printf("Creating %d threads... ", 2 * THREADS); 123 121 124 printf("SSE test #1\n"); 125 printf("Creating %d threads... ", THREADS); 126 127 for (i=0; i<THREADS/2; i++) { 128 if (!(t = thread_create(testit1, (void *)((unative_t)i*2), TASK, 0, "testit1"))) 129 panic("could not create thread\n"); 122 for (i = 0; i < THREADS; i++) { 123 thread_t *t; 124 125 if (!(t = thread_create(testit1, (void *) ((unative_t) 2 * i), TASK, 0, "testit1"))) { 126 printf("could not create thread %d\n", 2 * i); 127 break; 128 } 130 129 thread_ready(t); 131 if (!(t = thread_create(testit2, (void *)((unative_t)i*2+1), TASK, 0, "testit2"))) 132 panic("could not create thread\n"); 130 total++; 131 132 if (!(t = thread_create(testit2, (void *) ((unative_t) 2 * i + 1), TASK, 0, "testit2"))) { 133 printf("could not create thread %d\n", 2 * i + 1); 134 break; 135 } 133 136 thread_ready(t); 137 total++; 134 138 } 135 136 139 printf("ok\n"); 137 140 138 141 thread_sleep(1); 139 142 waitq_wakeup(&can_start, WAKEUP_ALL); 140 141 while (atomic_get(&threads_ok) != THREADS) 142 ; 143 144 printf("Test passed.\n"); 145 #ifdef CONFIG_BENCH 146 uint64_t dt = get_cycle() - t0; 147 printf("Time: %.*d cycles\n", sizeof(dt) * 2, dt); 148 #endif 149 } 150 151 #else 152 153 void test_sse1(void) 154 { 155 printf("This test is available only on SSE enabled platforms."); 143 144 while (atomic_get(&threads_ok) != total) { 145 printf("Threads left: %d\n", total - atomic_get(&threads_ok)); 146 thread_sleep(1); 147 } 148 149 if (atomic_get(&threads_fault) == 0) 150 return NULL; 151 152 return "Test failed"; 156 153 } 157 154 -
kernel/test/test.c
rdf496c5 r34db7fa 36 36 37 37 test_t tests[] = { 38 { 39 "atomic1", 40 "Test atomic operations", 41 &test_atomic1, 42 true 43 }, 44 { 45 "btree1", 46 "Test B-tree operations", 47 &test_btree1, 48 true 49 }, 50 { 51 "mips1", 52 "MIPS debug test", 53 &test_mips1, 54 true 55 }, 56 { 57 "fault1", 58 "Write to NULL (maybe page fault)", 59 &test_fault1, 60 false 61 }, 62 { 63 "fpu1", 64 "Intel FPU test", 65 &test_fpu1, 66 true 67 }, 68 { 69 "sse1", 70 "Intel SEE test", 71 &test_sse1, 72 true 73 }, 74 { 75 "mips2", 76 "MIPS FPU test", 77 &test_mips2, 78 true 79 }, 38 #include <atomic/atomic1.def> 39 #include <btree/btree1.def> 40 #include <debug/mips1.def> 41 #include <fault/fault1.def> 42 #include <fpu/fpu1.def> 43 #include <fpu/sse1.def> 44 #include <fpu/mips2.def> 45 /* 80 46 { 81 47 "falloc1", … … 173 139 &test_sysinfo1, 174 140 true 175 }, 141 },*/ 176 142 {NULL, NULL, NULL} 177 143 }; -
kernel/test/test.h
rdf496c5 r34db7fa 39 39 #include <typedefs.h> 40 40 41 typedef char * (* test_entry_t)(); 42 41 43 typedef struct { 42 44 char * name; 43 45 char * desc; 44 functionentry;46 test_entry_t entry; 45 47 bool safe; 46 48 } test_t; 47 49 48 extern voidtest_atomic1(void);49 extern voidtest_btree1(void);50 extern voidtest_mips1(void);51 extern voidtest_fault1(void);52 extern voidtest_fpu1(void);53 extern voidtest_sse1(void);54 extern voidtest_mips2(void);50 extern char * test_atomic1(void); 51 extern char * test_btree1(void); 52 extern char * test_mips1(void); 53 extern char * test_fault1(void); 54 extern char * test_fpu1(void); 55 extern char * test_sse1(void); 56 extern char * test_mips2(void); 55 57 extern void test_falloc1(void); 56 58 extern void test_falloc2(void);
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