Changes in kernel/arch/ia32/src/ia32.c [4a5ba372:36df4109] in mainline

File:

• kernel/arch/ia32/src/ia32.c (modified) (10 diffs)

kernel/arch/ia32/src/ia32.c

@@ -36 +36 @@
 
 #include <arch.h>
+#include <arch/arch.h>
 #include <typedefs.h>
 #include <errno.h>
@@ -50 +51 @@
 #include <genarch/drivers/ega/ega.h>
 #include <genarch/drivers/i8042/i8042.h>
+#include <genarch/drivers/ns16550/ns16550.h>
 #include <genarch/drivers/legacy/ia32/io.h>
 #include <genarch/fb/bfb.h>
 #include <genarch/kbrd/kbrd.h>
+#include <genarch/srln/srln.h>
 #include <genarch/multiboot/multiboot.h>
 #include <genarch/multiboot/multiboot2.h>
+#include <arch/pm.h>
+#include <arch/vreg.h>
 
 #ifdef CONFIG_SMP
 #include <arch/smp/apic.h>
 #endif
+
+static void ia32_pre_mm_init(void);
+static void ia32_post_mm_init(void);
+static void ia32_post_cpu_init(void);
+static void ia32_pre_smp_init(void);
+static void ia32_post_smp_init(void);
+
+arch_ops_t ia32_ops = {
+        .pre_mm_init = ia32_pre_mm_init,
+        .post_mm_init = ia32_post_mm_init,
+        .post_cpu_init = ia32_post_cpu_init,
+        .pre_smp_init = ia32_pre_smp_init,
+        .post_smp_init = ia32_post_smp_init,
+};
+
+arch_ops_t *arch_ops = &ia32_ops;
 
 /** Perform ia32-specific initialization before main_bsp() is called.
@@ -66 +87 @@
  *
  */
-void arch_pre_main(uint32_t signature, void *info)
+void ia32_pre_main(uint32_t signature, void *info)
 {
         /* Parse multiboot information obtained from the bootloader. */
@@ -79 +100 @@
 }
 
-void arch_pre_mm_init(void)
+void ia32_pre_mm_init(void)
 {
         pm_init();
@@ -92 +113 @@
 }
 
-void arch_post_mm_init(void)
-{
+void ia32_post_mm_init(void)
+{
+        vreg_init();
+
         if (config.cpu_active == 1) {
                 /* Initialize IRQ routing */
@@ -120 +143 @@
                 zone_merge_all();
         }
-}
-
-void arch_post_cpu_init()
+
+}
+
+void ia32_post_cpu_init(void)
 {
 #ifdef CONFIG_SMP
@@ -132 +156 @@
 }
 
-void arch_pre_smp_init(void)
+void ia32_pre_smp_init(void)
 {
         if (config.cpu_active == 1) {
@@ -141 +165 @@
 }
 
-void arch_post_smp_init(void)
+void ia32_post_smp_init(void)
 {
         /* Currently the only supported platform for ia32 is 'pc'. */
@@ -166 +190 @@
         }
 #endif
+
+#if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
+        /*
+         * Initialize the ns16550 controller.
+         */
+#ifdef CONFIG_NS16550_OUT
+        outdev_t *ns16550_out;
+        outdev_t **ns16550_out_ptr = &ns16550_out;
+#else
+        outdev_t **ns16550_out_ptr = NULL;
+#endif
+        ns16550_instance_t *ns16550_instance
+            = ns16550_init((ns16550_t *) NS16550_BASE, IRQ_NS16550, NULL, NULL,
+            ns16550_out_ptr);
+        if (ns16550_instance) {
+#ifdef CONFIG_NS16550
+                srln_instance_t *srln_instance = srln_init();
+                if (srln_instance) {
+                        indev_t *sink = stdin_wire();
+                        indev_t *srln = srln_wire(srln_instance, sink);
+                        ns16550_wire(ns16550_instance, srln);
+                        trap_virtual_enable_irqs(1 << IRQ_NS16550);
+                }
+#endif
+#ifdef CONFIG_NS16550_OUT
+                if (ns16550_out) {
+                        stdout_wire(ns16550_out);
+                }
+#endif
+        }
+#endif
         
         if (irqs_info != NULL)
@@ -183 +238 @@
 }
 
-/** Set thread-local-storage pointer
- *
- * TLS pointer is set in GS register. That means, the GS contains
- * selector, and the descriptor->base is the correct address.
- */
-sysarg_t sys_tls_set(uintptr_t addr)
-{
-        THREAD->arch.tls = addr;
-        set_tls_desc(addr);
-        
-        return EOK;
-}
-
 /** Construct function pointer
  *