Changeset 38a1a84 in mainline for arch/amd64/include/mm/asid.h

Timestamp:

2005-10-05T21:29:16Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

bca1b47

Parents:

49c1f93

Message:

MIPS32 memory management work.
Fix some bugs introduced yesterday (PTL3 index is indeed calculated by >> 14).
Introduce two new bits in pte_t (i.e. 'a' and 'w').
Implement TLB Invalid Exception and TLB Modified Exception. (Needs review and testing)

(No files)